- 58dcb0e Add option to commuteInstruction() which forces it to create a new (commuted) instruction. by Evan Cheng · 17 years ago
- 52e724a Infrastructure for getting the machine code size of a function and an instruction. X86, PowerPC and ARM are implemented by Nicolas Geoffray · 17 years ago
- 71a2cb2 detabify llvm, patch by Mike Stump! by Chris Lattner · 17 years ago
- 4a66e9a Change the "enable/disable" mechanism so that we can enable PPC register by Bill Wendling · 17 years ago
- cb341de fix 80 col violations. by Chris Lattner · 17 years ago
- 9348c69 Stylistic modifications. No functionality changes. by Nicolas Geoffray · 17 years ago
- 0404cd9 Add description of individual bits in CR. This fix PR1765. by Nicolas Geoffray · 17 years ago
- 880d0f6 Use a command-line option to turn register scavenging on/off for PPC. by Bill Wendling · 17 years ago
- 7194aaf This is the initial check-in for adding register scavenging to PPC. (Currently, by Bill Wendling · 17 years ago
- a4d16a1 commuteInstr() can now commute non-ssa machine instrs. by Evan Cheng · 18 years ago
- 5fd79d0 It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned. by Evan Cheng · 18 years ago
- cc8cd0c remove MachineOpCode typedef. by Chris Lattner · 18 years ago
- 43dbe05 Move even more functionality from MRegisterInfo into TargetInstrInfo. by Owen Anderson · 18 years ago
- f6372aa Move some more instruction creation methods from RegisterInfo into InstrInfo. by Owen Anderson · 18 years ago
- 264e6fe Fix a bug in my previous patch: refer to the impl not the pure virtual version. It's unclear why gcc would ever compile this... by Chris Lattner · 18 years ago
- 6410552 Fix a problem where lib/Target/TargetInstrInfo.h would include and use by Chris Lattner · 18 years ago
- d10fd97 Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the by Owen Anderson · 18 years ago
- 8aa797a Add new shorter predicates for testing machine operands for various types: by Chris Lattner · 18 years ago
- f738230 More cleanups for MachineOperand: by Chris Lattner · 18 years ago
- 9a1ceae Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm by Chris Lattner · 18 years ago
- 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 18 years ago
- 718cb66 Add lengthof and endof templates that hide a lot of sizeof computations. by Owen Anderson · 18 years ago
- 13e8b51 Handle blocks with 2 unconditional branches in AnalyzeBranch. by Dale Johannesen · 18 years ago
- bfd2ec4 Add a utility routine to check for unpredicated terminator instruction. by Evan Cheng · 18 years ago
- 126f17a BlockHasNoFallThrough() now returns true if block ends with a return instruction. by Evan Cheng · 18 years ago
- b5cdaa2 RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted. by Evan Cheng · 18 years ago
- 1e341729 Relex assertions to account for additional implicit def / use operands. by Evan Cheng · 18 years ago
- f5da133 What should be the last unnecessary <iostream>s in the library. by Bill Wendling · 19 years ago
- c0f64ff Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead by Evan Cheng · 19 years ago
- 18258c6 convert PPC::BCC to use the 'pred' operand instead of separate predicate by Chris Lattner · 19 years ago
- 289c2d5 rename PPC::COND_BRANCH to PPC::BCC by Chris Lattner · 19 years ago
- df4ed63 start using PPC predicates more consistently. by Chris Lattner · 19 years ago
- 6ce7dc2 Properly transfer kill / dead info. by Evan Cheng · 19 years ago
- 7ce4578 Matches MachineInstr changes. by Evan Cheng · 19 years ago
- ef13982 implement the BlockHasNoFallThrough hook by Chris Lattner · 19 years ago
- 7c4fe25 Implement support for branch reversal, fix a bug in branch analysis. by Chris Lattner · 19 years ago
- 879d09c Simplify code, no functionality change by Chris Lattner · 19 years ago
- 5410806 implement support for inserting a cond branch by Chris Lattner · 19 years ago
- 2dc7723 add support for inserting an uncond branch by Chris Lattner · 19 years ago
- c50e2bc implement branch inspection/modification methods. by Chris Lattner · 19 years ago
- 804e067 In 64-bit mode, 64-bit GPRs are callee saved, not 32-bit ones. by Chris Lattner · 19 years ago
- b410dc9 Rename OR4 -> OR. Move some PPC64-specific stuff to the 64-bit file by Chris Lattner · 19 years ago
- b1d26f6 Implement the getPointerRegClass method, which is required for the ptr_rc by Chris Lattner · 19 years ago
- e53f4a0 Move some methods out of MachineInstr into MachineOperand by Chris Lattner · 19 years ago
- 9c09c9e teach the ppc backend how to spill/reload vector regs by Chris Lattner · 19 years ago
- 335fd3c Add support for copying registers. still needed: spilling and reloading them by Chris Lattner · 19 years ago
- bbf1c72 implement TII::insertNoop by Chris Lattner · 19 years ago
- 3b478b3 add 64b gpr store to the possible list of isStoreToStackSlot opcodes. by Nate Begeman · 20 years ago
- 6524287 implement isStoreToStackSlot for PPC by Chris Lattner · 20 years ago
- 4083960 Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :) by Chris Lattner · 20 years ago
- 14c09b8 teach ppc backend these are copies by Chris Lattner · 20 years ago
- 1d9d742 First bits of 64 bit PowerPC stuff, currently disabled. A lot of this is by Nate Begeman · 20 years ago
- 21e463b More PPC32 -> PPC changes, as well as merging some classes that were by Nate Begeman · 20 years ago
- 16e71f2 Rename PPC32*.h to PPC*.h by Chris Lattner · 20 years ago
- 2668959 Rename PowerPC*.h to PPC*.h by Chris Lattner · 20 years ago
- 4c7b43b Eliminate PowerPC.td and PPC32.td, consolidating them into PPC.td by Chris Lattner · 20 years ago
- eb5d47d Fix a CQ regression from my patch to split F32/F64 into seperate register by Chris Lattner · 20 years ago
- 919c032 Modify the ppc backend to use two register classes for FP: F8RC and F4RC. by Chris Lattner · 20 years ago
- 043870d Teach the code generator that rlwimi is commutable if the rotate amount by Chris Lattner · 20 years ago
- b5f662f Remove trailing whitespace by Misha Brukman · 20 years ago
- 7af0248 Initial support for allocation condition registers by Nate Begeman · 20 years ago
- cb90de3 Add ori reg, reg, 0 as a move instruction. This can be generated from by Nate Begeman · 21 years ago
- f2ccb77 PowerPC 32-/64-bit split: Part I, PPC32* bit files, adapted from former PowerPC* by Misha Brukman · 21 years ago