1. c2cd2b2 Forgot a check. by Evan Cheng · 18 years ago
  2. 59d5b68 Enable a couple of xforms: by Evan Cheng · 18 years ago
  3. 7d33b4c Handle some non-exit blocks in tail merging. by Dale Johannesen · 18 years ago
  4. 4fee703 Parameter attributes on invoke calls were being lost due to the wrong by Duncan Sands · 18 years ago
  5. b682448 Detabify by Anton Korobeynikov · 18 years ago
  6. ecd94c8 Fix typo in comment. by Nick Lewycky · 18 years ago
  7. 3194f57 Use the personality function that was registered with MMI rather than by Duncan Sands · 18 years ago
  8. b464c44 Propagate alignment/volatility in two places. by Chris Lattner · 18 years ago
  9. 01dfdcd Spelling fix. by Duncan Sands · 18 years ago
  10. 2a07e2f Emit sections/directives in the proper order. This fixes PR1376. Also, by Anton Korobeynikov · 18 years ago
  11. 3b34636 A bitcast of a global variable may have been constant folded to a GEP - by Duncan Sands · 18 years ago
  12. a7d4a04 Don't create indexed load / store with zero offset! by Evan Cheng · 18 years ago
  13. 75c7d2b Allow i/s to match (gv+c). This fixes CodeGen/PowerPC/2007-05-03-InlineAsm-S-Constraint.ll by Chris Lattner · 18 years ago
  14. 1997473 Drop 'const' by Devang Patel · 18 years ago
  15. 6ad8256 Properly set arguments bitwidth of EHSELECT node by Anton Korobeynikov · 18 years ago
  16. 3e15bf3 Use 'static const char' instead of 'static const int'. by Devang Patel · 18 years ago
  17. c718288 Fix build error. by Lauro Ramos Venancio · 18 years ago
  18. 79dda2b Fix couple of bugs connected with eh info: by Anton Korobeynikov · 18 years ago
  19. 794fd75 Do not use typeinfo to identify pass in pass manager. by Devang Patel · 18 years ago
  20. 8e33473 If call frame is not part of stack frame and no dynamic alloc, eliminateFrameIndex() must adjust SP offset with size of call frames. by Evan Cheng · 18 years ago
  21. 498f559 Forgot about chain result; also UNDEF cannot have multiple values. by Evan Cheng · 18 years ago
  22. 7bf1c27 llvm bug #1350, parts 1, 2, and 3. by Nate Begeman · 18 years ago
  23. 5c3885c Under normal circumstances, when a frame pointer is not required, we reserve by Evan Cheng · 18 years ago
  24. 45a7ca9 * Only turn a load to UNDEF if all of its outputs have no uses (indexed loads by Evan Cheng · 18 years ago
  25. 77edc4b Fix PR1228 and CodeGen/Generic/2007-04-30-LandingPadBranchFolding.ll by Chris Lattner · 18 years ago
  26. c11ce86 print isLandingPad() for MBBs by Chris Lattner · 18 years ago
  27. e7cf56a Continue refactoring inline asm code. If there is an earlyclobber output by Chris Lattner · 18 years ago
  28. e47e75b Updates. by Evan Cheng · 18 years ago
  29. bf996f1 refactor GetRegistersForValue to take OpInfo as an argument instead of various by Chris Lattner · 18 years ago
  30. 3ff90dc refactor some code, no functionality change by Chris Lattner · 18 years ago
  31. 1f6f4c7 Clean up multi-line asam string printing. Instead of printing: by Chris Lattner · 18 years ago
  32. 6995cf6 generalize aggregate handling by Chris Lattner · 18 years ago
  33. c6c98af Implement review feedback by Anton Korobeynikov · 18 years ago
  34. 09e4b7e memory operands that have a direct operand should have their stores created by Chris Lattner · 18 years ago
  35. c83994e eliminate more redundant constraint type analysis by Chris Lattner · 18 years ago
  36. 2a600be merge constraint type analysis stuff together. by Chris Lattner · 18 years ago
  37. 0c58340 Significant refactoring of the inline asm stuff, to support future changes. by Chris Lattner · 18 years ago
  38. a80e118 Implement review feedback. Aliasees can be either GlobalValue's or by Anton Korobeynikov · 18 years ago
  39. 44b2c50 memory inputs to an inline asm are required to have an address available. by Chris Lattner · 18 years ago
  40. f2f3cd5 Fix CodeGen/Generic/2007-04-27-LargeMemObject.ll and by Chris Lattner · 18 years ago
  41. b017318 Fix this to match change to InlineAsm class. by Chris Lattner · 18 years ago
  42. eb7f34f Fix incorrect legalization of EHSELECTOR. This fixes by Chris Lattner · 18 years ago
  43. 4c6cfad Expand UINT_TO_FP in turns of SINT_TO_FP when UINTTOFP_* libcalls are not available. by Evan Cheng · 18 years ago
  44. 99f9a77 improve EH global handling, patch by Duncan Sands. by Chris Lattner · 18 years ago
  45. 64c0f84 enable Anton's shift/and switch lowering stuff! It now passes ppc bootstrap by Chris Lattner · 18 years ago
  46. ab8fd40 Fixx off-by-one bug, which prevents llvm-gcc bootstrap on ppc32 by Anton Korobeynikov · 18 years ago
  47. edc1d15 Fix a typo in a comment. by Dan Gohman · 18 years ago
  48. faa5107 Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion. by Evan Cheng · 18 years ago
  49. 8e29b21 Minor bug. by Evan Cheng · 18 years ago
  50. 0535028 Be careful when to add implicit kill / dead operands. Don't add them during / post reg-allocation. by Evan Cheng · 18 years ago
  51. 6c087e5 Match MachineFunction::UsedPhysRegs changes. by Evan Cheng · 18 years ago
  52. 505e551 Change UsedPhysRegs from array bool to BitVector to save some space. Setting / getting its states now go through MachineFunction. by Evan Cheng · 18 years ago
  53. ade31f9 Clean up. by Evan Cheng · 18 years ago
  54. e96f501 Data structure change to improve compile time (especially in debug mode). by Evan Cheng · 18 years ago
  55. c1a3520 This was lefted out. Fixed sumarray-dbl. by Evan Cheng · 18 years ago
  56. 8b0a8c8 Implement aliases. This fixes PR1017 and it's dependent bugs. CFE part by Anton Korobeynikov · 18 years ago
  57. 24a3cc4 Fix for PR1306. by Evan Cheng · 18 years ago
  58. 92efbfc Clean up. by Evan Cheng · 18 years ago
  59. ea84c5e support for >4G stack frames by Chris Lattner · 18 years ago
  60. a401b1e support > 4G stack objects by Chris Lattner · 18 years ago
  61. 6266c18 allow support for 64-bit stack objects by Chris Lattner · 18 years ago
  62. 964dd86 Be more careful about folding op(x, undef) when we have vector operands. by Chris Lattner · 18 years ago
  63. 95b3955 Assertion when using a 1-element vector for an add operation. Get the by Bill Wendling · 18 years ago
  64. f147a8d Use '-1U' where '-1UL' is obvious overkill, eliminating gcc warnings about by Scott Michel · 18 years ago
  65. 00d56b9 modify per review commentary by Dale Johannesen · 18 years ago
  66. 19f5469 make EmitAlignment work the way Chris says it should by Dale Johannesen · 18 years ago
  67. 95c218a PR400 phase 2. Propagate attributed load/store information through DAGs. by Christopher Lamb · 18 years ago
  68. 2c5c111 X86 TLS: Implement review feedback. by Lauro Ramos Venancio · 18 years ago
  69. c67bdc2 Revert Christopher Lamb's load/store alignment changes. by Reid Spencer · 18 years ago
  70. 2330e4d by Christopher Lamb · 18 years ago
  71. 0d3b678 Allow the lowering of ISD::GLOBAL_OFFSET_TABLE. by Lauro Ramos Venancio · 18 years ago
  72. b3a0417 Implement "general dynamic", "initial exec" and "local exec" TLS models for by Lauro Ramos Venancio · 18 years ago
  73. f44c728 VarInfo::UsedBlocks is no longer used. Remove. by Evan Cheng · 18 years ago
  74. 61a4c07 allow SRL to simplify its operands, as it doesn't demand all bits as input. by Chris Lattner · 18 years ago
  75. ec06e9a When replacing a node in SimplifyDemandedBits, if the old node used any by Chris Lattner · 18 years ago
  76. 0a16a1f fix a pasto by Chris Lattner · 18 years ago
  77. faf05bb Don't populate TryAgainList when coalescing only physical registers with virtual registers. by Evan Cheng · 18 years ago
  78. 3fefc18 Increment use count of new virtuals created during PHI elimination. by Evan Cheng · 18 years ago
  79. 8c7d2d5 Fix a bug in my previous patch, grabbing the shift amount width from the by Chris Lattner · 18 years ago
  80. 895c4ab Fold (x << c1)>> c2 into a single shift if the bits shifted out aren't used. by Chris Lattner · 18 years ago
  81. 20b0abc Copy coalescing change to prevent a physical register from being pin to a by Evan Cheng · 18 years ago
  82. e52eef8 Add a register allocation preference field; add a method to compute size of a live interval. by Evan Cheng · 18 years ago
  83. 38b7ca6 Keep track of number of uses within the function per virtual register. by Evan Cheng · 18 years ago
  84. 95a5e05 SIGN_EXTEND_INREG does not demand its top bits. Give SimplifyDemandedBits by Chris Lattner · 18 years ago
  85. 9a9203b Fix problems in the PartSet lowering having to do with incorrect bit width. by Reid Spencer · 18 years ago
  86. bed2946 Removed tabs everywhere except autogenerated & external files. Add make by Anton Korobeynikov · 18 years ago
  87. 1c35968 disable switch lowering using shift/and. It still breaks ppc bootstrap for by Chris Lattner · 18 years ago
  88. e01017b Fix PR1325: Case range optimization was performed in the case it by Anton Korobeynikov · 18 years ago
  89. 3ff9817 disable shift/and lowering to work around PR1325 for now. by Chris Lattner · 18 years ago
  90. 8085bcf Fix PR1323 : we haven't updated phi nodes in good manner :) by Anton Korobeynikov · 18 years ago
  91. df41353 Make sure intrinsics that are lowered to functions make the function weak by Reid Spencer · 18 years ago
  92. eeedcb6 Fix bugs in generated code for part_select and part_set so that llc doesn't by Reid Spencer · 18 years ago
  93. 3795809 Fix a bug in PartSet. The replacement value needs to be zext or trunc to by Reid Spencer · 18 years ago
  94. 3a508c9 the result of an inline asm copy can be an arbitrary VT that the register by Chris Lattner · 18 years ago
  95. 4829b1c fold noop vbitconvert instructions by Chris Lattner · 18 years ago
  96. c294177 Fix weirdness handling single element vectors. by Chris Lattner · 18 years ago
  97. f75b874 For PR1284: Implement the "part_set" intrinsic. by Reid Spencer · 18 years ago
  98. c24bbad fix an infinite loop compiling ldecod, notice by JeffC. by Chris Lattner · 18 years ago
  99. 1eba01e Fix this harder. by Chris Lattner · 18 years ago
  100. c56a81d don't create shifts by zero, fix some problems with my previous patch by Chris Lattner · 18 years ago