- c594208 Give ARMISD::EH_SJLJ_LONGJMP and EH_SJLJ_SETJMP names. by Evan Cheng · 16 years ago
- 8932116 X86 palignr intrinsics immediate field is in bits. ISel must transform it into bytes. by Evan Cheng · 16 years ago
- 0eeb913 Previously, all operands to Constant were themselves constant. by Chris Lattner · 16 years ago
- 3938242 Use fconsts and fconstd to materialize small fp constants. by Evan Cheng · 16 years ago
- a1eaa3c Add a second ValueType argument to isFPImmLegal. by Evan Cheng · 16 years ago
- aa12322 Update SystemZ to use PSW following the way x86 uses EFLAGS. Besides by Dan Gohman · 16 years ago
- 04ea6e5 Add an indirect branch pattern for ARM. Testcase will be coming soon. by Bob Wilson · 16 years ago
- ab21db7 rename indbr -> indirectbr to appease the residents of #llvm. by Chris Lattner · 16 years ago
- cd4f04d Record CodeGen optimization level in the BranchFolding pass so that we can by Bob Wilson · 16 years ago
- c872e9c Add new note. by Bill Wendling · 16 years ago
- a6a99b4 Enable virtual register based frame index scavenging by default for ARM & T2. by Jim Grosbach · 16 years ago
- 5a56927 Move and clarify note. by Bill Wendling · 16 years ago
- 3dab277 Infrastructure for dynamic stack realignment on ARM. For now, this is off by by Jim Grosbach · 16 years ago
- de02073 Note corrected. by Bill Wendling · 16 years ago
- d8499c9 Modify note. by Bill Wendling · 16 years ago
- 1ff2c48 Add a note. by Bill Wendling · 16 years ago
- 627b470 cppbackend support for indbr by Chris Lattner · 16 years ago
- f0dca28 CBE support for indbr. by Chris Lattner · 16 years ago
- 90d7dcf Similar to r85280, do not clear the "S" bit for RSBri and RSBrs. by Johnny Chen · 16 years ago
- eadeffb Set condition code bits of BL and BLr9 to 0b1110 (ALways) to distinguish between by Johnny Chen · 16 years ago
- eb2f969 Do away with addLegalFPImmediate. Add a target hook isFPImmLegal which returns true if the fp immediate can be natively codegened by target. by Evan Cheng · 16 years ago
- f3b0d1a Do not clear the "S" bit for RSCri and RSCrs. They inherit from the "sI" by Bob Wilson · 16 years ago
- 76b39e8 Explicitly specify 0b00, i.e, zero rotation, as the rotate filed (Inst{11-10}) by Johnny Chen · 16 years ago
- e70b897 Remove unnecessary gotos to fall-thru successors. by Sanjiv Gupta · 16 years ago
- 6a3b5ee Test commit. Added '.' to the comment line. by Johnny Chen · 16 years ago
- 1995051 apparently the X86 JIT isn't fully contextized, it is still using getGlobalContext() :( by Chris Lattner · 16 years ago
- f876112 Correctly align double arguments in the stack. by Rafael Espindola · 16 years ago
- dd22a45 Now VFP instructions. by Evan Cheng · 16 years ago
- 699beba Change Thumb1 and Thumb2 instructions to separate opcode from operands with a tab instead of a space. by Evan Cheng · 16 years ago
- 162e309 Change ARM asm strings to separate opcode from operands with a tab instead of a space. by Evan Cheng · 16 years ago
- 046e78c Remove FreeInst. by Victor Hernandez · 16 years ago
- dda9583 Try to get ahead of Johnny Chen and pro-actively add some more ARM encoding by Bob Wilson · 16 years ago
- d9ecd31 Fix ARM encoding typo: Opcod3 is not passed to ASuI parent class. by Bob Wilson · 16 years ago
- 7e053bb Add more ARM instruction encodings for 's' bit set and "rs" register encoding by Bob Wilson · 16 years ago
- 7c44bea Update CMake files. by Ted Kremenek · 16 years ago
- 8b5af25 Revert r85134, it breaks mingw build by Anton Korobeynikov · 16 years ago
- be9e763 Make PIC16 overlay a loadable pass. by Sanjiv Gupta · 16 years ago
- 2e7be61 Break anti-dependence breaking out into its own class. by David Goodwin · 16 years ago
- 8b67f77 Move DataTypes.h to include/llvm/System, update all users. This breaks the last by Chandler Carruth · 16 years ago
- dd56942 of -> or by Jim Grosbach · 16 years ago
- f639e9f 80-column cleanup by Jim Grosbach · 16 years ago
- e1ef91d Reapply 85006 with a minor fix. by Sanjiv Gupta · 16 years ago
- 4f54c12 Add ARM getMatchingSuperRegClass to handle S / D / Q cross regclass coalescing. by Evan Cheng · 16 years ago
- ed3ad21 Don't forget subreg indices when folding load / store. by Evan Cheng · 16 years ago
- f5a86f4 Remove includes of Support/Compiler.h that are no longer needed after the by Nick Lewycky · 16 years ago
- 6726b6d Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces. by Nick Lewycky · 16 years ago
- a1e1446 this is done. by Chris Lattner · 16 years ago
- 4a134af Remove ICmpInst::isSignedPredicate which was a reimplementation by Nick Lewycky · 16 years ago
- ecb28f2 Revert back 85006 for now as it breaks PIC16 tests. by Sanjiv Gupta · 16 years ago
- 209e6c6 Adding support for placing global objects in shared data memory. by Sanjiv Gupta · 16 years ago
- 5a850be 80 col violation. by Evan Cheng · 16 years ago
- 2f1abe2 Restrict Thumb1 register allocation to low registers, even for instructions that by Jim Grosbach · 16 years ago
- 7388037 FIXME no longer applies. R12 and R3 are available for allocation by Jim Grosbach · 16 years ago
- 9ff9b34 some stuff is done, we still have constantexpr simplification to do. by Chris Lattner · 16 years ago
- c869d06 X86 needs critical path anti-dependency breaking. by Evan Cheng · 16 years ago
- 4c3715c Allow the target to select the level of anti-dependence breaking that should be performed by the post-RA scheduler. The default is none. by David Goodwin · 16 years ago
- bac6ed4 Revert 84843. Evan, this was breaking some of the if-conversion tests. by Bob Wilson · 16 years ago
- 1395d1d Shift art to the right to keep GCC from complaining about multi-line comments. by Benjamin Kramer · 16 years ago
- 87689d3 Move if-conversion before post-regalloc scheduling so the predicated instruction get scheduled properly. by Evan Cheng · 16 years ago
- faf93aa Load / store multiple was missing opportunites when the load / store bundles are at the end of the bb. Test case is already in, the bug is exposed by subsequent commit. by Evan Cheng · 16 years ago
- 62d1723 Trim more includes. by Evan Cheng · 16 years ago
- 268c793 Trim include. by Evan Cheng · 16 years ago
- c5e5498 fix warning. by Chris Lattner · 16 years ago
- 8000c6c Don't generate sbfx / ubfx with negative lsb field. Patch by David Conrad. by Evan Cheng · 16 years ago
- f32df4c Use special DAG-to-DAG preprocessing to allow mem-mem instructions to be selected. by Anton Korobeynikov · 16 years ago
- 41fff8c Missing piece of the ARM frame index post-scavenging conditionalization by Jim Grosbach · 16 years ago
- 1d6827b Conditionalize ARM/T2 frame index post-scavenging while working out fixes by Jim Grosbach · 16 years ago
- 20d1081 Most of the NEON shuffle instructions do not support 64-bit element types. by Bob Wilson · 16 years ago
- a55d33d Revert r84764, it breaks mingw build by Anton Korobeynikov · 16 years ago
- 65b7f3a Improve handling of immediates by splitting 32-bit immediates into two 16-bit by Jim Grosbach · 16 years ago
- a91f4c5 Add DAG printing for RMW stuff debugging by Anton Korobeynikov · 16 years ago
- 83fceb9 RMW preprocessing stuff was incorrect. Grab the stuff from x86 backend and disable some tests until it will be clever enough to handle them. by Anton Korobeynikov · 16 years ago
- 90593d2 Implement branch folding by Anton Korobeynikov · 16 years ago
- 3926fb6 Cosmetic changes, no functionality changes by Anton Korobeynikov · 16 years ago
- b27b51a Fix NEON VST2LN instruction encoding. Patch by Johnny Chen. by Bob Wilson · 16 years ago
- 407d574 Revert 84732. It was the wrong fix. by Bob Wilson · 16 years ago
- 36a9c8f Build shared lib instead of an archive. by Sanjiv Gupta · 16 years ago
- 4e4bba5 Add a pass to overlay pic16 data sections for function frame and automatic by Sanjiv Gupta · 16 years ago
- 2095659 Match more patterns to movt. by Evan Cheng · 16 years ago
- 1ce75ef tidy by Chris Lattner · 16 years ago
- b3c8359 Fix some more NEON instruction encoding problems. by Bob Wilson · 16 years ago
- 507df40 Leave some NEON instruction encoding bits unspecified instead of setting by Bob Wilson · 16 years ago
- 7d26443 IPSCCP is missing stuff. by Chris Lattner · 16 years ago
- 12ddf13 Add note by Anton Korobeynikov · 16 years ago
- 514200d Be crazy and assert in case of unsupported modifier passed. by Anton Korobeynikov · 16 years ago
- 0a2e206 Handle external symbols by Anton Korobeynikov · 16 years ago
- 8ecaf23 Distinguish between pcrel imm operands and 'normal' ones. Fix fixes gross weirdness of asmprinting. by Anton Korobeynikov · 16 years ago
- dc2165e Add basic block operands & jump kinds by Anton Korobeynikov · 16 years ago
- 3d6e560 Ignore all implicit reg operands by Anton Korobeynikov · 16 years ago
- efa236f Add a workaround for different memops prefixes by Anton Korobeynikov · 16 years ago
- 9b0b852 Checkpoint MCInst printer. We (almostly) able to print global / JT / constpool entries by Anton Korobeynikov · 16 years ago
- b5a9216 Add simple operand printing stuff by Anton Korobeynikov · 16 years ago
- 13853e2 Add experimental MSP430 MCInstLowering stuff by Anton Korobeynikov · 16 years ago
- 1074aae Wire up MSP430 printMCInst() method by Anton Korobeynikov · 16 years ago
- 680dec7 Add MSP430 InstPrinter stub by Anton Korobeynikov · 16 years ago
- 51f3f9a Use proper target data by Anton Korobeynikov · 16 years ago
- a7cc652 Fix -Asserts warning. by Daniel Dunbar · 16 years ago
- 3229b0b Disable by default while debugging by Jim Grosbach · 16 years ago
- 18ed9c9 add cmd line opt to disable frame index reuse for ARM and T2. debug aid. by Jim Grosbach · 16 years ago
- bab42bd Following r84485, add Defs = [EFLAGS] to the 32-bit lock instructions too. by Dan Gohman · 16 years ago