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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / c654d1b8c195a13413537a668f669fd9b0c7f226 / lib
  1. c654d1b cache result of operator* by Gabor Greif · 15 years ago
  2. d7cc521 cache result of operator* by Gabor Greif · 15 years ago
  3. 1f2c0c9 cache result of operator* by Gabor Greif · 15 years ago
  4. 7656018 cache result of operator* by Gabor Greif · 15 years ago
  5. 7556cf5 cache result of operator* by Gabor Greif · 15 years ago
  6. 5896935 cache result of operator* by Gabor Greif · 15 years ago
  7. fc36c0f cache result of operator* by Gabor Greif · 15 years ago
  8. 1d3ae02 cache result of operator* (found by inspection) by Gabor Greif · 15 years ago
  9. 0814985 cache result of operator* by Gabor Greif · 15 years ago
  10. a29742d cache result of operator* by Gabor Greif · 15 years ago
  11. 5891ac8 cache result of operator* by Gabor Greif · 15 years ago
  12. 5417a03 cache result of operator* by Gabor Greif · 15 years ago
  13. 9672414 cache operator*'s result (in multiple functions) by Gabor Greif · 15 years ago
  14. 517e124 do not repeatedly dereference use_iterator by Gabor Greif · 15 years ago
  15. b654435 do not repeatedly dereference use_iterator by Gabor Greif · 15 years ago
  16. 8154f96 Avoid creating %physreg:subidx operands in SimpleRegisterCoalescing::RemoveCopyByCommutingDef. by Jakob Stoklund Olesen · 15 years ago
  17. 846a318 Deal with a few remaining spots that assume physical registers have live intervals. by Jakob Stoklund Olesen · 15 years ago
  18. be95c15 Merge VEX enums with other x86 enum forms. Also fix all checks of which VEX by Bruno Cardoso Lopes · 15 years ago
  19. 665eb12 Fix broken isCopy handling in TrimLiveIntervalToLastUse. by Jakob Stoklund Olesen · 15 years ago
  20. 1769ccc Handle COPY in VirtRegRewriter. by Jakob Stoklund Olesen · 15 years ago
  21. 01dcb18 Fix the memoperand offsets in code generated for va_start. by Dan Gohman · 15 years ago
  22. c5f5626 have the mc lowering process handle a few tail call forms, lowering them to by Chris Lattner · 15 years ago
  23. a0148c3 Print "dregpair" NEON operands with a space between them, for readability and by Bob Wilson · 15 years ago
  24. bf87e24 Re-apply bottom-up fast-isel, with fixes. Be very careful to avoid emitting by Dan Gohman · 15 years ago
  25. 1cd0509 Factor out x86 segment override prefix encoding, and also use it for VEX by Bruno Cardoso Lopes · 15 years ago
  26. f1d93ca Reenable DAG combining for vector shuffles. It looks like it was temporarily by Bob Wilson · 15 years ago
  27. 757e8d6 reject pseudo instructions early in the encoder. by Chris Lattner · 15 years ago
  28. 96716c7b Remove trailing whitespaces from file by Bruno Cardoso Lopes · 15 years ago
  29. 599b531 Change LEA to have 5 operands for its memory operand, just by Chris Lattner · 15 years ago
  30. 99cfb69 Reverting r107918 and r107919. Radar 8063111. by Stuart Hastings · 15 years ago
  31. 21e9445 Revert "Fix broken isCopy handling in TrimLiveIntervalToLastUse" by Jakob Stoklund Olesen · 15 years ago
  32. ac0ed5d add some long-overdue enums to refer to the parts of the 5-operand by Chris Lattner · 15 years ago
  33. 0afbf23 Relax assertion. In optimized code, it is possible that first instruction is coming from a inlined function. by Devang Patel · 15 years ago
  34. c930cbc Extension of r107506. Make sure that we don't mark a function as having a call by Bill Wendling · 15 years ago
  35. 7cc4f9c Fix broken isCopy handling in TrimLiveIntervalToLastUse by Jakob Stoklund Olesen · 15 years ago
  36. 61c8ecc Remember the VR64 register class by Jakob Stoklund Olesen · 15 years ago
  37. c0e2639 Fix decl/def debug info for template functions. Radar 8063111. by Stuart Hastings · 15 years ago
  38. 834df19 Rework segment prefix emission code to handle segments by Chris Lattner · 15 years ago
  39. 751e112 introduce a new X86II::getMemoryOperandNo method, which by Chris Lattner · 15 years ago
  40. d258c49 Switch SPU calling convention (function arguments) by Kalle Raiskila · 15 years ago
  41. 1b02acb Revert some unneeded parts of the change in r107886 for the by Kevin Enderby · 15 years ago
  42. 5d115a0 Check for FiniteOnlyFPMath as well. by Evan Cheng · 15 years ago
  43. ca76f6f Reuse DIEInteger for 1. This is frequently used while emitting an attribute using dwarf::DW_FORM_flag form. by Devang Patel · 15 years ago
  44. 7db1e7a Teach the x86 floating point stackifier to handle COPY instructions. by Jakob Stoklund Olesen · 15 years ago
  45. 320bdcb Implement X86InstrInfo::copyPhysReg by Jakob Stoklund Olesen · 15 years ago
  46. 1425c6a The NEONPreAllocPass should never have to assign fixed registers anymore. by Bob Wilson · 15 years ago
  47. 8190173 For big-endian systems, VLD2/VST2 with 32-bit vector elements will swap the by Bob Wilson · 15 years ago
  48. f59cac5 Added the darwin .weak_def_can_be_hidden directive. by Kevin Enderby · 15 years ago
  49. 8af4c54 Clean up a comment. by Bob Wilson · 15 years ago
  50. ed903d7 Clean up scavengeRegister() a bit to prefer available regs, which allows by Jim Grosbach · 15 years ago
  51. 0bc25f4 Convert EXTRACT_SUBREG to COPY when emitting machine instrs. by Jakob Stoklund Olesen · 15 years ago
  52. 5c00e07 Remove references to INSERT_SUBREG after de-SSA. by Jakob Stoklund Olesen · 15 years ago
  53. cde5110 Merge the duplicated iabs optimization in DAGCombiner and let it detected a few more idioms. by Benjamin Kramer · 15 years ago
  54. 1db071f Teach instcombine to transform by Benjamin Kramer · 15 years ago
  55. fb31ccb A slight reworking of the custom patterns for x86-64 tpoff codegen and by Eric Christopher · 15 years ago
  56. 4ff7ab6 r107852 is only safe with -enable-unsafe-fp-math to account for +0.0 == -0.0. by Evan Cheng · 15 years ago
  57. 3651d92 Add TargetInstrInfo::copyPhysReg hook and use it from LowerSubregs. by Jakob Stoklund Olesen · 15 years ago
  58. 515fe3a Optimize some vfp comparisons to integer ones. This patch implements the simplest case when the following conditions are met: by Evan Cheng · 15 years ago
  59. 7835f1f Changes to ARM tail calls, mostly cosmetic. by Dale Johannesen · 15 years ago
  60. f595141 Revert 107840 107839 107813 107804 107800 107797 107791. by Dan Gohman · 15 years ago
  61. d9642fa When processing frame index virtual registers, consider all available registers by Jim Grosbach · 15 years ago
  62. 0238f8c Fix the second half of PR7437: scalarrepl wasn't preserving by Chris Lattner · 15 years ago
  63. 49dcb0f Don't forward-declare registers for static allocas, which we'll by Dan Gohman · 15 years ago
  64. 61b7cea Fix -fast-isel-abort to check the right instruction. by Dan Gohman · 15 years ago
  65. 8fff126 use PrintEscapedString to handle attribute section with escapes in it, by Chris Lattner · 15 years ago
  66. 5febd07 fix copies to/from GR8_ABCD_H even more by Jakob Stoklund Olesen · 15 years ago
  67. 03e2d44 grammar by Jim Grosbach · 15 years ago
  68. c7937ae Handle cases where the post-RA scheduler may move instructions between the by Jim Grosbach · 15 years ago
  69. da3051a finish up support for callw: PR7195 by Chris Lattner · 15 years ago
  70. 9fc0522 Implement the major chunk of PR7195: support for 'callw' by Chris Lattner · 15 years ago
  71. cc69e13 Add more assembly opcodes for SSE compare instructions by Bruno Cardoso Lopes · 15 years ago
  72. 8aa6147 One MDNode may be used to create regular DIE as well as abstract DIE. by Devang Patel · 15 years ago
  73. bcc8017 Move getExtLoad() and (some) getLoad() DebugLoc argument after EVT argument for consistency sake. by Evan Cheng · 15 years ago
  74. 03753fc Print undefined/unknown debug value as "undef". by Devang Patel · 15 years ago
  75. 5c48043 Not all custom inserters create new basic blocks. If the inserter by Dan Gohman · 15 years ago
  76. 26b8ef5 grammar and trailing whitespace by Jim Grosbach · 15 years ago
  77. 869aa46 Rename couple of maps. by Devang Patel · 15 years ago
  78. f2e4afd Allow copies between GR8_ABCD_L and GR8_ABCD_H. by Jakob Stoklund Olesen · 15 years ago
  79. 6140962 80 cols. by Devang Patel · 15 years ago
  80. 4df83ed Implement bottom-up fast-isel. This has the advantage of not requiring by Dan Gohman · 15 years ago
  81. f423a69 Add X86FastISel support for return statements. This entails refactoring by Dan Gohman · 15 years ago
  82. ced9ec9 Add AVX AES instructions by Bruno Cardoso Lopes · 15 years ago
  83. 5fc3da0 Update the insert position after scheduling, which may change the by Dan Gohman · 15 years ago
  84. cc87bfb Update comment. by Devang Patel · 15 years ago
  85. 643fffe Fix debugging strings. by Dan Gohman · 15 years ago
  86. eabaed2 Give FunctionLoweringInfo an MBB member, avoiding the need to pass it by Dan Gohman · 15 years ago
  87. a4160c3 Simplify FastISel's constructor by giving it a FunctionLoweringInfo by Dan Gohman · 15 years ago
  88. 4c3fd9f Move FunctionLoweringInfo.h out into include/llvm/CodeGen. This will by Dan Gohman · 15 years ago
  89. c940365 Split the SDValue out of OutputArg so that SelectionDAG-independent by Dan Gohman · 15 years ago
  90. 29269d0 add some triple for minix, patch by Kees van Reeuwijk from PR7582 by Chris Lattner · 15 years ago
  91. 2f2b0ab Move CallingConvLower.cpp out of the SelectionDAG directory. by Dan Gohman · 15 years ago
  92. fcb4ccd Fix more places assuming subregisters have live intervals by Jakob Stoklund Olesen · 15 years ago
  93. d463a74 Add a getFirstNonPHI utility function. by Dan Gohman · 15 years ago
  94. b8c86a0 Minore code simplification. by Dan Gohman · 15 years ago
  95. 9e86f43 Remove interprocedural-basic-aa and associated code. The AliasAnalysis by Dan Gohman · 15 years ago
  96. 274fefd conditionalize by CallInst::ArgOffset by Gabor Greif · 15 years ago
  97. 8246adc Rename "Release" builds as "Release+Asserts"; rename "Release-Asserts" by Duncan Sands · 15 years ago
  98. 4f6bdf9 Add AVX SSE4.2 instructions by Bruno Cardoso Lopes · 15 years ago
  99. 332fce4 Use only one multiclass to pinsrq instructions by Bruno Cardoso Lopes · 15 years ago
  100. 5e9fa98 Now that almost all SSE4.1 AVX instructions are added, move code around to more appropriate sections. No functionality changes by Bruno Cardoso Lopes · 15 years ago