- c6fbe56 Revert r137134. It breaks some code as Eli pointed out. by Bill Wendling · 13 years ago
- a0f596c Print out the variable declaration only if it is a declaration. Otherwise, a by Bill Wendling · 13 years ago
- 4a74b3b Inflate register classes after coalescing. by Jakob Stoklund Olesen · 13 years ago
- e2406df Reapply a more appropriate solution than in r137114. AVX supports by Bruno Cardoso Lopes · 13 years ago
- a511b8e Revert r137114 by Bruno Cardoso Lopes · 13 years ago
- 4bdd4ed PTX: Add initial support for device function calls by Justin Holewinski · 13 years ago
- e321d7f Handle sitofp between v4f64 <- v4i32. Fix PR10559 by Bruno Cardoso Lopes · 13 years ago
- 2f613c5 Add support for avx vector fextend by Bruno Cardoso Lopes · 13 years ago
- b33ea56 Rename and tidy up tests by Bruno Cardoso Lopes · 13 years ago
- e5118ab Add two patterns to match special vmovss and vmovsd cases. Also fix by Bruno Cardoso Lopes · 13 years ago
- 0f0e0a0 Make LowerVSETCC aware of AVX types and add patterns to match them. by Bruno Cardoso Lopes · 13 years ago
- 8db7353 Tidy up these testcases to look more like real code does. by Dan Gohman · 13 years ago
- 3148a65 ARM parsing and encoding for LDRBT instruction. by Jim Grosbach · 13 years ago
- bc6fc20 ARM parsing and encoding for LDRB instruction. by Jim Grosbach · 13 years ago
- 8668a5b Add FIXME. by Jim Grosbach · 13 years ago
- 328a9d4 Add support for several vector shifts operations while in AVX mode. Fix PR10581 by Bruno Cardoso Lopes · 13 years ago
- 2cb1dfa Fix up the patterns for SXTB, SXTH, UXTB, and UXTH so that they are correctly active without HasT2ExtractPack. PR10611. by Eli Friedman · 13 years ago
- 66b0f51 Don't clobber pending ST regs when FP regs are killed. by Jakob Stoklund Olesen · 13 years ago
- 06988bc Made SCEV's UDiv expressions more canonical. When dividing a by Andrew Trick · 13 years ago
- 0d6fac3 ARM load instruction shifted register index operands. by Jim Grosbach · 13 years ago
- f4fa3d6 ARM indexed load assembly parsing and encoding. by Jim Grosbach · 13 years ago
- 6fc1c08 Add ARM LDR parsing tests. by Jim Grosbach · 13 years ago
- 1f35b17 We need to map DebugLoc. It leads to Fuction * (through subprogram entry node) which should be appropriately mapped. by Devang Patel · 13 years ago
- 211da8f Linke NamedMDNodes after linking global values as comment suggests. by Devang Patel · 13 years ago
- 5c4e52e Fix the bitwidth of the remaining fields. by Rafael Espindola · 13 years ago
- 251a2bb print st_shndx with the correct number of bits. by Rafael Espindola · 13 years ago
- 67ac0c0 print st_other with the correct number of bits. by Rafael Espindola · 13 years ago
- 71a8f5c print st_type with the correct number of bits. by Rafael Espindola · 13 years ago
- d7c2783 Print st_bind with the correct number of bits. by Rafael Espindola · 13 years ago
- a83f8ef Print r_sym with the correct number of bits. by Rafael Espindola · 13 years ago
- f81f675 Print r_type with the correct number of bits. by Rafael Espindola · 13 years ago
- 65ad8dc Another counter goes decimal. by Rafael Espindola · 13 years ago
- f7179de Change anther counter to decimal. by Rafael Espindola · 13 years ago
- 014180d Don't print a counter in hex. by Rafael Espindola · 13 years ago
- d7c9b63 Print all the bits in the addend. by Rafael Espindola · 13 years ago
- e651983 Fix http://llvm.org/bugs/show_bug.cgi?id=10568 by Jason W Kim · 13 years ago
- 456a925 Only access both operands of an INSERT_SUBVECTOR if it is an INSERT_SUBVECTOR. by Bill Wendling · 13 years ago
- 7ce0579 ARM refactoring assembly parsing of memory address operands. by Jim Grosbach · 13 years ago
- 9dbd0a8 Remove underscore that's breaking linux buildbots. by Benjamin Kramer · 13 years ago
- 990f78d Use MachineBranchProbabilityInfo in If-Conversion instead of its own heuristics. by Jakub Staszak · 13 years ago
- 2626dba Remove the LowerSetJmp pass. It wasn't used effectively by any of the targets. by Bill Wendling · 13 years ago
- 1009c32 SCEV: Use AssertingVH to catch dangling BasicBlock* when passes forget by Andrew Trick · 13 years ago
- 56e3232 Handle IMPLICIT_DEF instructions in X86FloatingPoint. by Jakob Stoklund Olesen · 13 years ago
- fb5179a fix PR10286, a problem with the .ll printer handling block addresses that are out-of-scope. by Chris Lattner · 13 years ago
- 027cbf9 Use byte offset, instead of element number, to access merged global. by Devang Patel · 13 years ago
- d5061a9 Fix logical error when detecting lifetime intrinsics. by Nick Lewycky · 13 years ago
- d8030c7 Teach InstCombine that lifetime intrincs aren't a real user on the result of a by Nick Lewycky · 13 years ago
- 3e69c13 Lifetime intrinsics on undef are dead. by Nick Lewycky · 13 years ago
- 49cb9b8 Assume .cfi_startproc is the first thing in a function. If the function is by Rafael Espindola · 13 years ago
- ac5f13f Make this kind of lowering to be supported by 256-bit instructions: by Bruno Cardoso Lopes · 13 years ago
- 7a3824b Remove empty test. by Benjamin Kramer · 13 years ago
- 9b7fdc7 Revert r136503 and r136480 in an effort to fix non-determinism in the llvm-gcc buildbots on i386. Devang is looking into the root cause. by Owen Anderson · 13 years ago
- 55244ce Add v4f64 -> v2f32 fp_round support. Also add a testcase to exercise by Bruno Cardoso Lopes · 13 years ago
- 531f19f Since vectors with all ones can't be created with a 256-bit instruction, by Bruno Cardoso Lopes · 13 years ago
- 965b891 Fix crash with varargs function with no named parameters. by Richard Osborne · 13 years ago
- 592ad6a Add a small gep optimization I noticed was missing while reading some IL. by Rafael Espindola · 13 years ago
- e2721f7 Remove InvalidateStructLayoutInfo from the ocaml bindings. by Benjamin Kramer · 13 years ago
- 10c6d12 Revert r136253, r136263, r136269, r136313, r136325, r136326, r136329, r136338, by Bill Wendling · 13 years ago
- 4af0f5f Revert "Don't check liveness of unallocatable registers." by Jakob Stoklund Olesen · 13 years ago
- eeb57c7 Don't check liveness of unallocatable registers. by Jakob Stoklund Olesen · 13 years ago
- ef7f1e7 Add support for the 'Q' constraint. by Eric Christopher · 13 years ago
- e1cf590 ARM SRS instruction parsing, diassembly and encoding support. by Jim Grosbach · 13 years ago
- 1619560 Clean up debug info after reassociation. by Devang Patel · 13 years ago
- 2c6363a ARM assembly parsing and encoding for RFE instruction. by Jim Grosbach · 13 years ago
- 71d3d67 ARM update tests for CPS instruction. by Jim Grosbach · 13 years ago
- 6126005 Fix two tests that I crashed in the previous commits. The mask elts by Bruno Cardoso Lopes · 13 years ago
- dd63530 Match VPERMIL masks more strictly and update the target specific mask by Bruno Cardoso Lopes · 13 years ago
- e89c7d4 Add v8i32 and v4i64 vpermil patterns by Bruno Cardoso Lopes · 13 years ago
- fe42808 Transfer implicit operands in NEONMoveFixPass. by Jakob Stoklund Olesen · 13 years ago
- e69438f Add -verify-arm-pseudo-expand. by Jakob Stoklund Olesen · 13 years ago
- ef71597 Make sure to correctly clear the exact/nuw/nsw flags off of shifts when they are combined together. <rdar://problem/9859829> by Eli Friedman · 13 years ago
- c5b3c58 CBZ/CBNZ are Thumb2 only. No need for ARM mode tests for them. by Jim Grosbach · 13 years ago
- cf121c3 ARM assembly parsing and encoding for BLX (immediate). by Jim Grosbach · 13 years ago
- f6c6900 Handle REG_SEQUENCE with implicitly defined operands. by Jakob Stoklund Olesen · 13 years ago
- 43afb6f Remove obsolete FIXME reference in comment. by Jim Grosbach · 13 years ago
- 293a2ee ARM assembly parsing and encoding for BFC and BFI. by Jim Grosbach · 13 years ago
- 70a0915 ARM parsing and encoding for ADR. by Jim Grosbach · 13 years ago
- 19b9d69 Update ARM tests for parsing and encoding of WFE, WFI and YIELD. by Jim Grosbach · 13 years ago
- 5a079eb Due to changes coming from the new LLVM type system, you now get by Duncan Sands · 13 years ago
- 93fa476 Add patterns to generate copies for extract_subvector instead of by Bruno Cardoso Lopes · 13 years ago
- a23236c Add a few patterns to match allzeros without having to use the fp unit. by Bruno Cardoso Lopes · 13 years ago
- 2e64ae4 Add SINT_TO_FP and FP_TO_SINT support for v8i32 types. Also move by Bruno Cardoso Lopes · 13 years ago
- 8050a61 ARM parsing and encoding tests. by Jim Grosbach · 13 years ago
- 5de728c Emit an error is asm parser parsed X86_64 only registers, e.g. %rax, %sil. by Evan Cheng · 13 years ago
- ed39846 ARM assembly parsing and encoding for USUB16 and USUB8. by Jim Grosbach · 13 years ago
- 953e2e8 ARM assembly parsing and encoding for USAX. by Jim Grosbach · 13 years ago
- c37d4bb Fix llvm-mc handing of x86 instructions that take 8-bit unsigned immediates. by Kevin Enderby · 13 years ago
- fc2eb31 Clean up tabs. by Jim Grosbach · 13 years ago
- addec77 ARM assembly parsing and encoding support for USAT and USAT16. by Jim Grosbach · 13 years ago
- 5f33d13 ARM assembly parsing and encoding tests for USAD8 and USADA8. by Jim Grosbach · 13 years ago
- 144da2c ARM assembly parsing and encoding tests for UQSUB16 and UQSUB8. by Jim Grosbach · 13 years ago
- 4143839 Fix comment copy/paste-o. by Jim Grosbach · 13 years ago
- 29e85bc ARM assembly parsing and encoding tests for UQASX and UQSAX. by Jim Grosbach · 13 years ago
- 24a541b ARM assembly parsing and encoding tests for UQADD16 and UQADD8. by Jim Grosbach · 13 years ago
- 49f2ced ARM assembly parsing and encoding for UMULL. by Jim Grosbach · 13 years ago
- 71725a0 ARM assembly parsing and encoding for UMLAL. by Jim Grosbach · 13 years ago
- 2adba41 ARM assembly parsing and encoding tests for UMAAL. by Jim Grosbach · 13 years ago
- f36b0a2 ARM assembly parsing and encoding tests for UHSUB16 and UHSUB8. by Jim Grosbach · 13 years ago
- 66c8982 ARM assembly parsing and encoding tests for UHADD16, UHADD8 and UHASX. by Jim Grosbach · 13 years ago
- fb8989e ARM parsing and encoding of SBFX and UBFX. by Jim Grosbach · 13 years ago