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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / c92a0e90b73a502d218249b29ff496256e87a596 / lib / Target / Mips
  1. c92a0e9 simplified small section logic by Bruno Cardoso Lopes · 17 years ago
  2. feb95cc Added small section asm emition logic for mips. Fixed small bug. by Bruno Cardoso Lopes · 17 years ago
  3. 91fd532 Added initial support for small sections on Mips. by Bruno Cardoso Lopes · 17 years ago
  4. 055a76b Use chars, where possible by Anton Korobeynikov · 17 years ago
  5. ae408e6 Switch MIPS to new ELFTargetAsmInfo. Add few FIXMEs. by Anton Korobeynikov · 17 years ago
  6. e8be6c6 Add a new function, ReplaceAllUsesOfValuesWith, which handles bulk by Dan Gohman · 17 years ago
  7. b27cb55 Fixed call stack alignment. Improved AsmPrinter alignment issues. by Bruno Cardoso Lopes · 17 years ago
  8. 43d526d Added Subtarget support into RegisterInfo by Bruno Cardoso Lopes · 17 years ago
  9. 06b8c19 Silence warning by initializing variable. by Bill Wendling · 17 years ago
  10. 7728f7e Fixed features usage. by Bruno Cardoso Lopes · 17 years ago
  11. 7b76da1 Fixe typos and 80 column size problems by Bruno Cardoso Lopes · 17 years ago
  12. 97c2537 MipsTargetLowering cleanup by Bruno Cardoso Lopes · 17 years ago
  13. 1512642 Pacify gcc-4.3. by Duncan Sands · 17 years ago
  14. 8e5f2c6 Pool-allocation for MachineInstrs, MachineBasicBlocks, and by Dan Gohman · 17 years ago
  15. 85e9212 fixed 32-bit fp_to_sint pattern by Bruno Cardoso Lopes · 17 years ago
  16. 1002c02 Add explicit keywords. by Dan Gohman · 17 years ago
  17. 225ca9c Several changes to Mips backend, experimental fp support being the most by Bruno Cardoso Lopes · 17 years ago
  18. 9f1c831 - Remove calls to copyKillDeadInfo which is an N^2 function. Instead, propagate kill / dead markers as new instructions are constructed in foldMemoryOperand, convertToThressAddress, etc. by Evan Cheng · 17 years ago
  19. 4406604 Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating by Dan Gohman · 17 years ago
  20. 7f46020 Rename ISD::LOCATION to ISD::DBG_STOPPOINT to better reflect its by Dan Gohman · 17 years ago
  21. db8d56b Split scheduling from instruction selection. by Evan Cheng · 17 years ago
  22. f951620 Revert the SelectionDAG optimization that makes by Duncan Sands · 17 years ago
  23. 082e7c1 Unneeded include's. by Evan Cheng · 17 years ago
  24. e90ea5e Added FP instruction formats. by Bruno Cardoso Lopes · 17 years ago
  25. dfac7cb Added support for FP Registers by Bruno Cardoso Lopes · 17 years ago
  26. 83ec4b6 Wrap MVT::ValueType in a struct to get type safety by Duncan Sands · 17 years ago
  27. 0af5e09 Added custom isel for MUL, SDIVREM, UDIVREM, SMUL_LOHI and UMUL_LOHI nodes by Bruno Cardoso Lopes · 17 years ago
  28. 07cec75 Added custom SELECT_CC lowering by Bruno Cardoso Lopes · 17 years ago
  29. d2947ee Some Mips minor fixes Added support for mips little endian arch => mipsel by Bruno Cardoso Lopes · 17 years ago
  30. bdbb750 Fixed flag issue that was generating infinite loop while in list scheduling. by Bruno Cardoso Lopes · 17 years ago
  31. aafce77 Add CommonLinkage; currently tentative definitions by Dale Johannesen · 17 years ago
  32. c9f5f3f Change target-specific classes to use more precise static types. by Dan Gohman · 17 years ago
  33. 844731a Clean up the use of static and anonymous namespaces. This turned up by Dan Gohman · 17 years ago
  34. 707e018 Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not Legal by Dan Gohman · 17 years ago
  35. ca1267c Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo. by Evan Cheng · 17 years ago
  36. d27c991 Fix "Control reaches the end of non-void function" warnings, by Chris Lattner · 17 years ago
  37. 950a4c4 Add explicit keywords. by Dan Gohman · 17 years ago
  38. e0b1215 minor cleanups by Chris Lattner · 17 years ago
  39. da47e6e Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF. by Evan Cheng · 17 years ago
  40. bfae831 Use PassManagerBase instead of FunctionPassManager for functions by Dan Gohman · 17 years ago
  41. d2cde68 Default ISD::PREFETCH to expand. by Evan Cheng · 17 years ago
  42. 5b8f82e Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC's by Scott Michel · 17 years ago
  43. 27b7db5 Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} and prefetchnta instructions. by Evan Cheng · 17 years ago
  44. fb8075d Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries. by Evan Cheng · 17 years ago
  45. 6ef781f Final de-tabification. by Bill Wendling · 17 years ago
  46. 74ab84c Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool by Bill Wendling · 17 years ago
  47. d497d9f I cannot find a libgcc function for this builtin. Therefor expanding it to a noop (which is how it use to be treated). If someone who knows the x86 backend better than me could tell me how to get a lock prefix on an instruction, that would be nice to complete x86 support. by Andrew Lenharth · 17 years ago
  48. 6f0d024 Rename MRegisterInfo to TargetRegisterInfo. by Dan Gohman · 18 years ago
  49. 5fd79d0 It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned. by Evan Cheng · 18 years ago
  50. 4e3f5a4 Dwarf requires variable entries to be in the source order. Right now, since we are recording variable information at isel time this means parameters would appear in the reverse order. The short term fix is to issue recordVariable() at asm printing time instead. by Evan Cheng · 18 years ago
  51. 4eecdeb Get rid of the annoying blank lines before labels. by Evan Cheng · 18 years ago
  52. a844bde SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc. by Evan Cheng · 18 years ago
  53. 18bef16 Trivial patch to fix two warnings, please pull into llvm 2.2 by Chris Lattner · 18 years ago
  54. ddf8956 This commit changes: by Chris Lattner · 18 years ago
  55. 749c6f6 rename TargetInstrDescriptor -> TargetInstrDesc. by Chris Lattner · 18 years ago
  56. 349c495 Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptor by Chris Lattner · 18 years ago
  57. 6924430 Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects by Chris Lattner · 18 years ago
  58. 43dbe05 Move even more functionality from MRegisterInfo into TargetInstrInfo. by Owen Anderson · 18 years ago
  59. 834f1ce rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate. by Chris Lattner · 18 years ago
  60. c8478d8 Change the 'isStore' inferrer to look for 'SDNPMayStore' by Chris Lattner · 18 years ago
  61. f6372aa Move some more instruction creation methods from RegisterInfo into InstrInfo. by Owen Anderson · 18 years ago
  62. 6410552 Fix a problem where lib/Target/TargetInstrInfo.h would include and use by Chris Lattner · 18 years ago
  63. d10fd97 Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the by Owen Anderson · 18 years ago
  64. 84bc542 Rename SSARegMap -> MachineRegisterInfo in keeping with the idea by Chris Lattner · 18 years ago
  65. 8aa797a Add new shorter predicates for testing machine operands for various types: by Chris Lattner · 18 years ago
  66. 9a1ceae Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm by Chris Lattner · 18 years ago
  67. 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 18 years ago
  68. fc643c5 remove attribution from lib Makefiles. by Chris Lattner · 18 years ago
  69. 81361d6 Setting GlobalDirective in TargetAsmInfo by default rather than by Gordon Henriksen · 18 years ago
  70. 6e141fd Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled. by Evan Cheng · 18 years ago
  71. d64b5c8 Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether by Evan Cheng · 18 years ago
  72. aee4af6 Remove redundant foldMemoryOperand variants and other code clean up. by Evan Cheng · 18 years ago
  73. e62f97c Allow some reloads to be folded in multi-use cases. Specifically testl r, r -> cmpl [mem], 0. by Evan Cheng · 18 years ago
  74. b97aec6 Add parameter to getDwarfRegNum to permit targets by Dale Johannesen · 18 years ago
  75. c69107c Unifacalize the CALLSEQ{START,END} stuff. by Bill Wendling · 18 years ago
  76. 0f8d9c0 Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack by Bill Wendling · 18 years ago
  77. 753a987 Added JumpTable support by Bruno Cardoso Lopes · 18 years ago
  78. f191c80 Use TableGen to emit information for dwarf register numbers. by Anton Korobeynikov · 18 years ago
  79. 000604a Better processor definition by Bruno Cardoso Lopes · 18 years ago
  80. c7db561 Added support for PIC code with "explicit relocations" *only*. by Bruno Cardoso Lopes · 18 years ago
  81. ca0ed74 Eliminate the remaining uses of getTypeSize. This by Duncan Sands · 18 years ago
  82. 3c999a2 clo/clz aren't supported on mips I. Keep them around for when we'll by Eric Christopher · 18 years ago
  83. f0a0cdd - Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but only returns the opcode of the instruction post unfolding. by Evan Cheng · 18 years ago
  84. 58184e6 Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface. by Evan Cheng · 18 years ago
  85. 347d39f Revert 42908 for now. by Evan Cheng · 18 years ago
  86. 8ddde0a Change the names used for internal labels to use the current by Dan Gohman · 18 years ago
  87. 8262df3 Position Independent Code (PIC) support [3] by Bruno Cardoso Lopes · 18 years ago
  88. 0a60400 Position Independent Code (PIC) support [2] by Bruno Cardoso Lopes · 18 years ago
  89. e78080c Position Independent Code (PIC) support [1] by Bruno Cardoso Lopes · 18 years ago
  90. 66f0f64 - Added a few target hooks to generate load / store instructions from / to any by Evan Cheng · 18 years ago
  91. 9efce63 Allow copyRegToReg to emit cross register classes copies. by Evan Cheng · 18 years ago
  92. 677ccc6 More explicit keywords. by Dan Gohman · 18 years ago
  93. b42abeb Added "LoadEffective" pattern to handle stack locations. Fixed some comments by Bruno Cardoso Lopes · 18 years ago
  94. 071a279 Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead. by Evan Cheng · 18 years ago
  95. f7331b3 Fold the adjust_trampoline intrinsic into by Duncan Sands · 18 years ago
  96. 718cb66 Add lengthof and endof templates that hide a lot of sizeof computations. by Owen Anderson · 18 years ago
  97. 35b35c5 Add a variant of foldMemoryOperand to fold any load / store, not just load / store from / to stack slots. by Evan Cheng · 18 years ago
  98. 51195af Added method to get Mips register numbers by Bruno Cardoso Lopes · 18 years ago
  99. a2b1bb5 Changed stack allocation On LowerFORMAL_ARGUMENTS. by Bruno Cardoso Lopes · 18 years ago
  100. dc0c04c Mask directive completed with CalleeSave info by Bruno Cardoso Lopes · 18 years ago