1. ca19a3f don't print GlobalAddressSDNode's with an offset of zero as "foo0". by Chris Lattner · 17 years ago
  2. e306b3d add a note by Chris Lattner · 17 years ago
  3. f95f945 Implement review feedback from Devang: make use by Duncan Sands · 17 years ago
  4. 34d8f75 Teach coalescer about earlyclobber bits. Check bits for preferred register. by Dale Johannesen · 17 years ago
  5. 5e8d9de Fix PR2808. When regalloc runs out of register, it spill a physical register around the live interval being allocated. Do not continue to try to spill another register, just grab the physical register and move on. by Evan Cheng · 17 years ago
  6. 91a23c8 No need to print function stubs for Mac OS X 10.5 and up. Linker will handle it. by Evan Cheng · 17 years ago
  7. 0333920 80 column violation. by Evan Cheng · 17 years ago
  8. 7e8ef60 Fix a FastISel GlobalVariable CSE bug. by Dan Gohman · 17 years ago
  9. fee2d69 Continue after removing the current MI. by Evan Cheng · 17 years ago
  10. 2ff7fd1 Refactor X86SelectConstAddr, folding it into X86SelectAddress. This by Dan Gohman · 17 years ago
  11. d6bd733 Make earlyclobber stuff work when virtual regs by Dale Johannesen · 17 years ago
  12. 20580a1 Re-materalized definition instructions may be dead. Whack them. by Evan Cheng · 17 years ago
  13. 6f42665 backing out my last commit, it was not intended to go on the trunk by Gabor Greif · 17 years ago
  14. 6c2c95d first shot at removing Use::Val untested, Use::swap() is definitely not done yet by Gabor Greif · 17 years ago
  15. acdb2ee Remove the MarkModRef pass (use AddReadAttrs instead). by Duncan Sands · 17 years ago
  16. 9f07a29 Add a new pass AddReadAttrs which works out which functions by Duncan Sands · 17 years ago
  17. fa48f94 Remove AsmThatEarlyClobber etc. from LiveIntervalAnalysis by Dale Johannesen · 17 years ago
  18. 4fe0fe8 splitLoop does not handle split condition EQ. Fixes PR 2805 by Devang Patel · 17 years ago
  19. 3589308 Address-mode folding for X86FastISel. It's pretty basic, but it by Dan Gohman · 17 years ago
  20. 670ed09 Decrementing the iterator here could be wrong if the worklist is empty after the "erase". by Bill Wendling · 17 years ago
  21. 3d0a9a3 Try to place hoisted instructions befoe icmp instruction. by Devang Patel · 17 years ago
  22. 841ee1a Somehow RegAllocLinearScan is keeping two pointers to MachineRegisterInfo. by Evan Cheng · 17 years ago
  23. 1fbc3cd Simplify this code. The FastISel class has its own TD member. by Dan Gohman · 17 years ago
  24. e251b15 Don't consider instructions with implicit physical register by Dan Gohman · 17 years ago
  25. ee2e403 Add a new "fast" scheduler. This is currently basically just a by Dan Gohman · 17 years ago
  26. bc4707a Preliminary support for systems which require changing JIT memory regions privilege from read / write to read / executable. by Evan Cheng · 17 years ago
  27. 057d0c3 Duh. Default to ARMCC::AL (always). by Evan Cheng · 17 years ago
  28. 6d63a72 Clean up. by Evan Cheng · 17 years ago
  29. 3f7eb8e Cosmetic. by Evan Cheng · 17 years ago
  30. b5b6ec6 FastISel: For calls, prefer using the callee's address as a constant by Dan Gohman · 17 years ago
  31. 91aac10 Add a bit to mark operands of asm's that conflict by Dale Johannesen · 17 years ago
  32. 870e4be Unallocatable registers do not have live intervals. by Evan Cheng · 17 years ago
  33. 48fbc2d Do not hoist instruction above branch condition. The instruction may use branch condition. by Devang Patel · 17 years ago
  34. 0062295 Do not ignore iv uses outside the loop. by Devang Patel · 17 years ago
  35. 5993258 Don't worry about clobbering physical register defs that aren't used. by Dan Gohman · 17 years ago
  36. 7fd7ca4 Fix addrmode1 instruction encodings; fix bx_ret encoding. by Evan Cheng · 17 years ago
  37. 29c57c3 Specify instruction encoding using range list to avoid endianess issues. by Evan Cheng · 17 years ago
  38. 682d5a8 Simplify and generalize X86DAGToDAGISel::CanBeFoldedBy, and draw by Dan Gohman · 17 years ago
  39. d3ead43 Add a new MachineInstr-level DCE pass. It is very simple, and is intended to by Dan Gohman · 17 years ago
  40. 7795932 Add trampoline support to PPC. GCC simply calls the "__trampoline_setup" by Bill Wendling · 17 years ago
  41. 1cd3327 When converting a CopyFromReg to a copy instruction, use the register class of its uses to determine the right destination register class of the copy. This is important for targets where a physical register may belong to multiple register classes. by Evan Cheng · 17 years ago
  42. 50284d8 Change SelectionDAG::getConstantPool to always set the alignment of the by Dan Gohman · 17 years ago
  43. 056292f Reverting r56249. On further investigation, this functionality isn't needed. by Bill Wendling · 17 years ago
  44. aed48bf Include the alignment value when displaying ConstantPoolSDNodes. by Dan Gohman · 17 years ago
  45. 9468a9b - Change "ExternalSymbolSDNode" to "SymbolSDNode". by Bill Wendling · 17 years ago
  46. 05ae983 Fix these comments to reflect current reality. Surprisingly, by Dan Gohman · 17 years ago
  47. 70ff4cf Finally re-apply r46959. This is made feasible by the combination by Dan Gohman · 17 years ago
  48. 81b28ce Improve instcombine's handling of integer min and max in two ways: by Dan Gohman · 17 years ago
  49. 19a341a AllocateRWXMemory -> AllocateRWX. by Evan Cheng · 17 years ago
  50. 1937e2f Don't take the time to CheckDAGForTailCallsAndFixThem when tail calls by Dan Gohman · 17 years ago
  51. fb2bbbe Re-enables the new vector select in the bitcode reader, by modifying the by Dan Gohman · 17 years ago
  52. fd6edef Teach ScalarEvolution to consider loop preheaders in the search for by Dan Gohman · 17 years ago
  53. 99500ae Live intervals for live-in registers should begin at the beginning of a basic block, not at the first by Owen Anderson · 17 years ago
  54. ad7321f Teach LSR to optimize away SMAX operations for tripcounts in common by Dan Gohman · 17 years ago
  55. b3d7299 Fixed Bug 2751 http://llvm.org/bugs/show_bug.cgi?id=2751 by Bruno Cardoso Lopes · 17 years ago
  56. 5eb0cec Re-enable SelectionDAG CSE for calls. It matters in the case of by Dan Gohman · 17 years ago
  57. 25f34a3 Correctly update kill infos after extending a live range and merge 2 val#'s; fix 56165 - do not mark val# copy field if the copy does not define the val#. by Evan Cheng · 17 years ago
  58. 8dae138 Fix WriteAsOperand to not emit a leading space character. Adjust by Dan Gohman · 17 years ago
  59. e009180 adjust last patch per review feedback by Dale Johannesen · 17 years ago
  60. 014278e Remove isImm(), isReg(), and friends, in favor of by Dan Gohman · 17 years ago
  61. b8ca4ff Fix PR2792: treat volatile loads as writing memory somewhere. by Duncan Sands · 17 years ago
  62. 2aa0e64 Fix random abort. by Evan Cheng · 17 years ago
  63. 095cc29 Define CallSDNode, an SDNode subclass for use with ISD::CALL. by Dan Gohman · 17 years ago
  64. e7de7e3 Typo. by Evan Cheng · 17 years ago
  65. be3034c Rely on instruction format to determine so_reg operand for now. by Evan Cheng · 17 years ago
  66. 05fc966 Revert 56176. All those instruction formats are still needed. by Evan Cheng · 17 years ago
  67. 55375a4 Accidentially flipped the condition. by Evan Cheng · 17 years ago
  68. 42d5ee06 Add debug dumps. by Evan Cheng · 17 years ago
  69. a964b7d Eliminate unnecessary instruction formats. by Evan Cheng · 17 years ago
  70. 49a9f29 Addrmode 1 S bit can be dynamically set. Look for CPSR def. by Evan Cheng · 17 years ago
  71. 5f1db7b Rewrite address mode 1 code emission routines. by Evan Cheng · 17 years ago
  72. ee9e1b0 On some targets, non-move instructions can become move instructions because of coalescing. e.g. by Evan Cheng · 17 years ago
  73. 4fbd796 Change ConstantSDNode and ConstantFPSDNode to use ConstantInt* and by Dan Gohman · 17 years ago
  74. 913d3df Pass "earlyclobber" bit through to machine by Dale Johannesen · 17 years ago
  75. f5aeb1a Rename ConstantSDNode::getValue to getZExtValue, for consistency by Dan Gohman · 17 years ago
  76. 2bb4a4d Rather than marking all internal globals "Ref" by Duncan Sands · 17 years ago
  77. e2f2083 The sequence for ppcf128 compares was not IEEE safe in the presence of NaNs. by Dale Johannesen · 17 years ago
  78. 4f833d4 On 64-bit targets, change 32-bit getelementptr indices to be 64-bit by Dan Gohman · 17 years ago
  79. 3139ff8 Fix a vectorshuffle instcombine bug introduced by r55995. by Dan Gohman · 17 years ago
  80. e5d20f9 udpate header comment: s/VP/VFP/ by Jim Grosbach · 17 years ago
  81. 1fdc40f When tailcallopt is enabled all fastcc calls must have an aligned argument stack size. Add a test case. by Arnold Schwaighofer · 17 years ago
  82. 8db8668 Fix PR2748. Avoid coalescing physical register with virtual register which would create illegal extract_subreg. e.g. by Evan Cheng · 17 years ago
  83. ac34a00 Fix a bug in ANY_EXTEND handling that was breaking 403.gcc on X86-64 in fast isel. by Owen Anderson · 17 years ago
  84. af8bc26 Fix comment typo. by Duncan Sands · 17 years ago
  85. 892b840 Intrinsics don't touch internal global variables by Duncan Sands · 17 years ago
  86. bcb37fd Fix a copy+paste bug that Duncan spotted. For several by Dan Gohman · 17 years ago
  87. 4086906 Fix PR2783 - coalescer bug. Missing a TargetRegisterInfo::isVirtualRegister check. by Evan Cheng · 17 years ago
  88. 1abe60b Intrinsics don't read these kinds of global variables. by Duncan Sands · 17 years ago
  89. 3885578 Fix a 80 column violation. by Evan Cheng · 17 years ago
  90. d18a462 The version of AtomicSDNode::AtomicSDNode used (only) for by Dale Johannesen · 17 years ago
  91. b636913 If ISD::ANY_EXTEND fails, try ISD::ZERO_EXTEND and ISD::SIGN_EXTEND before giving up. This fixes 445.gobmk on by Owen Anderson · 17 years ago
  92. 209a409 Succumb utterly to compatibility and implement by Dale Johannesen · 17 years ago
  93. d9c553f Propagate subreg index when promoting a load to a copy. by Evan Cheng · 17 years ago
  94. 7f85fbd In my analysis for r56076 I missed the case where the original by Dan Gohman · 17 years ago
  95. 1df3fd6 Fix an icmp+sdiv optimization to check for and handle an overflow by Dan Gohman · 17 years ago
  96. 78efce6 X86FastISel support for double->float and float->double casts. by Dan Gohman · 17 years ago
  97. 74321ab FastISel support for i1 PHI nodes. by Dan Gohman · 17 years ago
  98. 8211648 FastISel support for i1 constants. by Dan Gohman · 17 years ago
  99. 369e987 Fix a bug in the coalescer where it didn't check if a live interval existed before trying to manipulate it. This by Owen Anderson · 17 years ago
  100. 0586d91 Add X86FastISel support for static allocas, and refences by Dan Gohman · 17 years ago