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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / ca63acdc5d8b1593e0c1caa56db49a6271618000
  1. ca63acd Switch to c-style comments in a C file. by David Blaikie · 12 years ago
  2. 447989c Miscellaneous accumulated cleanups. by Dan Gohman · 12 years ago
  3. 7787800 Fix the order of the operands in the llvm.fma intrinsic patterns for ARM, by Lang Hames · 12 years ago
  4. 5dde20b Add an early bailout to IsValueFullyAvailableInBlock from deeply nested blocks. by Mon P Wang · 12 years ago
  5. 03e091f Reapply r155682, making constant folding more consistent, with a fix to work by Dan Gohman · 12 years ago
  6. 04a09a4 Fix ARM assembly parsing for upper case condition codes on IT instructions. by Richard Barton · 12 years ago
  7. a4c4df4 Remove a docs reference to the CBackend. by Jim Grosbach · 12 years ago
  8. 71275b1 Missed some register numbers. by Benjamin Kramer · 12 years ago
  9. a356e94 Update edis test for r155704. by Benjamin Kramer · 12 years ago
  10. 17c836c X86: Don't emit conditional floating point moves on when targeting pre-pentiumpro architectures. by Benjamin Kramer · 12 years ago
  11. c84f975 Update config.sub in the sample project. by Evgeniy Stepanov · 12 years ago
  12. 3f11998 [asan] small optimization: do not emit "x+0" instructions by Kostya Serebryany · 12 years ago
  13. 4d2f077 Refactor IT handling not to store the bottom bit of the condition code in the mask operand in the MCInst. by Richard Barton · 12 years ago
  14. d213ee7 Revert r155682, "Use ConstantExpr::getExtractElement when constant-folding vectors" by NAKAMURA Takumi · 12 years ago
  15. e507922 [tsan] Atomic support for ThreadSanitizer, patch by Dmitry Vyukov by Kostya Serebryany · 12 years ago
  16. 76c5897 Add mcpu to tests to prevent them from using AVX instructions on Sandy Bridge after r155618. by Craig Topper · 12 years ago
  17. afb3b5e Implement a bastardized ABI. by Evan Cheng · 12 years ago
  18. 97a4543 - thumbv6 shouldn't imply +thumb2. Cortex-M0 doesn't suppport 32-bit Thumb2 by Evan Cheng · 12 years ago
  19. 97b44f9 Use ConstantExpr::getExtractElement when constant-folding vectors by Dan Gohman · 12 years ago
  20. f9f1c7a Break up getProfitableChainIncrement(). by Jakob Stoklund Olesen · 12 years ago
  21. 70a1860 Turn IVChain into a struct. by Jakob Stoklund Olesen · 12 years ago
  22. c1fc5e4 Add instcombine patterns for the following transformations: by Chad Rosier · 12 years ago
  23. 0d5c323 DumpSegment64Command() wasn't returning correct result. Caught by static analyzer. rdar://11329354 by Evan Cheng · 12 years ago
  24. aec9240 Fix the SD scheduler to avoid gluing the same node twice. by Andrew Trick · 12 years ago
  25. 06e950e Defensively guard against calling malloc() with a size of zero. by Ted Kremenek · 12 years ago
  26. 9da7892 ARM: Thumb ldr(literal) base address alignment is 32-bits. by Jim Grosbach · 12 years ago
  27. dba86d8 Add note about returns_twice magic removal from LLVM itself. by Joerg Sonnenberger · 12 years ago
  28. c573b1f by Preston Gurd · 12 years ago
  29. 3c00db7 [CMake] Restructure how Clang, Polly and other external projects get included. by Michael J. Spencer · 12 years ago
  30. 60f3d92 [Support/YAML] Properly fix unitialized variable warning by inserting a by Michael J. Spencer · 12 years ago
  31. 5c77bc2 Fixed SmallMap test. The order of items is undefined in DenseMap. So being checking the increment for big mode, we can only check that all items are in map. by Stepan Dyatkovskiy · 12 years ago
  32. 37abe8d Use VLD1 in NEON extenting-load patterns instead of VLDR. by Tim Northover · 12 years ago
  33. e38993f Test commit. by Tim Northover · 12 years ago
  34. 1203f2f Enable detection of AVX and AVX2 support through CPUID. Add AVX/AVX2 to corei7-avx, core-avx-i, and core-avx2 cpu names. by Craig Topper · 12 years ago
  35. 464bda3 Teach the reassociate pass to fold chains of multiplies with repeated by Chandler Carruth · 12 years ago
  36. cac31de Specify cpu to unbreak tests. by Evan Cheng · 12 years ago
  37. e67a416 If triple is armv7 / thumbv7 and a CPU is specified, do not automatically assume by Evan Cheng · 12 years ago
  38. 4866363 Don't forget to reset 'first operand' flag when we're setting the MDNodeOperand value. by Bill Wendling · 12 years ago
  39. 6962106 Try to fix llvm-arm-linux builder with -mcpu. by Jakob Stoklund Olesen · 12 years ago
  40. 01c0dd1 Trivial change to make the test use -mcpu=generic so as to avoid by Preston Gurd · 12 years ago
  41. b856d55 Reapply the SmallMap patch with a fix. by Benjamin Kramer · 12 years ago
  42. 165324c Print IV chain numbers while collecting them. by Jakob Stoklund Olesen · 12 years ago
  43. a0b0219 Remove more dead code. by Jakob Stoklund Olesen · 12 years ago
  44. b56e411 Unify internal representation of ARM instructions with a register right-shifted by #32. These are stored as shifts by #0 in the MCInst and correctly marshalled when transforming from or to assembly representation. by Richard Barton · 12 years ago
  45. bdbf015 Revert "First implementation of:" by Eric Christopher · 12 years ago
  46. 76271a3 First implementation of: by Stepan Dyatkovskiy · 12 years ago
  47. 50e1d84 Simplify LiveIntervals::getApproximateInstructionCount(). by Jakob Stoklund Olesen · 12 years ago
  48. a62efd8 Remove a dead function. by Jakob Stoklund Olesen · 12 years ago
  49. 40a2b65 Remove the -disable-cross-class-join option. by Jakob Stoklund Olesen · 12 years ago
  50. a2404e3 Cross-class joining is winning. by Jakob Stoklund Olesen · 12 years ago
  51. 8030e1a Add ifdef around getSubtargetFeatureName in tablegen output file so that only targets that want the function get it. This prevents other targets from getting an unused function warning. by Craig Topper · 12 years ago
  52. c16f851 Use vector_shuffles instead of target specific unpack nodes for AVX ZERO_EXTEND/ANY_EXTEND combine. These will be converted to target specific nodes during lowering. This is more consistent with other code. by Craig Topper · 12 years ago
  53. fa1059f openbsd doesn't support soname, patch by Brad Smith! by Chris Lattner · 12 years ago
  54. 3ef91f5 Actually delete now-empty file. by Chandler Carruth · 12 years ago
  55. 87aac6a Reverting r155468. Chris and Chandler have convinced me that it's dangerous and by Lang Hames · 12 years ago
  56. 25052f4 Do not use $gp as a dedicated global register if the target ABI is not O32. by Akira Hatanaka · 12 years ago
  57. 23d59c2 typo in declaration from earlier today by Andrew Trick · 12 years ago
  58. 50ade65 Simplify the known retain count tracking; use a boolean state instead by Dan Gohman · 12 years ago
  59. eeeb775 Build custom predecessor and successor lists for each basic block. by Dan Gohman · 12 years ago
  60. 14ce6fa ARM: improved assembler diagnostics for missing CPU features. by Jim Grosbach · 12 years ago
  61. 86b7e2a Fix a naughty header include that breaks "installed" builds. by Andrew Trick · 12 years ago
  62. 80c1ea6 ConstantFoldSelectInstruction swapped the operands of the select. by Nadav Rotem · 12 years ago
  63. 2003e03 Fix the testcase. We do expect two vblendw on XMMs. by Nadav Rotem · 12 years ago
  64. 34a13bb Add a testcase for 155440 by Nadav Rotem · 12 years ago
  65. ddb1420 MachineBasicBlock::SplitCriticalEdge() should follow LLVM IR variant and refuse to break edge to EH landing pad. rdar://11300144 by Evan Cheng · 12 years ago
  66. 1d9e68d Add support for llvm.arm.neon.vmull* intrinsics to InstCombine. This fixes by Lang Hames · 12 years ago
  67. 7362ac7 Fix a crash on valid (if UB) bitcode that is produced for some global by Chandler Carruth · 12 years ago
  68. 95a7e80 ARM: Nuke remnant bogus code. by Jim Grosbach · 12 years ago
  69. 6ce1c88 Related to PR1255. Let's begin. I'll commit classes that corresponds to our latest PR1255 discussion posts in llvm-commits. by Stepan Dyatkovskiy · 12 years ago
  70. 7bc9698 AVX: Add additional vbroadcast replacement sequences for integers. by Nadav Rotem · 12 years ago
  71. 63bbe14 cmake: new file by Andrew Trick · 12 years ago
  72. c3ad885 misched: DAG builder must special case earlyclobber by Andrew Trick · 12 years ago
  73. 000b250 misched: try (not too hard) to place debug values where they belong by Andrew Trick · 12 years ago
  74. eb45ebb misched: ignore debug values during scheduling by Andrew Trick · 12 years ago
  75. 006e1ab misched: DAG builder support for tracking register pressure within the current scheduling region. by Andrew Trick · 12 years ago
  76. 4dfeef1 RegisterPressure: A utility for computing register pressure within a by Andrew Trick · 12 years ago
  77. 24e767d Add missing test cases for ARM VLD3 (single 3-element structure to all lanes) by Kevin Enderby · 12 years ago
  78. 2c66edf Add missing test cases for ARM VLD4 (single 4-element structure to all lanes) by Kevin Enderby · 12 years ago
  79. 87ffdbc AVX2: The BLENDPW instruction selects between vectors of v16i16 using an i8 by Nadav Rotem · 12 years ago
  80. f4478f9 Refactor Thumb ITState handling in ARM Disassembler to more efficiently use its vector by Richard Barton · 12 years ago
  81. d1a7913 AVX: We lower VECTOR_SHUFFLE and BUILD_VECTOR nodes into vbroadcast instructions by Nadav Rotem · 12 years ago
  82. adb082c Look for the 'Is Simulated' module flag. This indicates that the program is compiled to run on a simulator. by Bill Wendling · 12 years ago
  83. 75920ad FileCheck-ize tests. by Bill Wendling · 12 years ago
  84. c6490d1 FileCheck-ize these tests. by Bill Wendling · 12 years ago
  85. d5cc8b8 FileCheck-ize these tests. Harden some of them. by Bill Wendling · 12 years ago
  86. 3ef43cf Remove dangling spaces. Fix some other formatting. by Craig Topper · 12 years ago
  87. 7fd5e16 Simplify code a bit and make it compile better. Remove unused parameters. by Craig Topper · 12 years ago
  88. aff5968 Add a missing cpu subtype. by Evan Cheng · 12 years ago
  89. c92ba4e Tidy up. 80 columns, whitespace, et. al. by Jim Grosbach · 12 years ago
  90. a354077 Optimize the vector UINT_TO_FP, SINT_TO_FP and FP_TO_SINT operations where the integer type is i8 (commonly used in graphics). by Nadav Rotem · 12 years ago
  91. 6a8c7bf This patch fixes a problem which arose when using the Post-RA scheduler by Preston Gurd · 12 years ago
  92. 1d52184 ARM: VSLI two-operand assmebly aliases are tblgen'erated. by Jim Grosbach · 12 years ago
  93. e1d866e ARM: tblgen'erate VSRA/VRSRA/VSRI assembly two-operand aliases. by Jim Grosbach · 12 years ago
  94. c34954d ARM: Add testcases for two-operand variants of VSRA/VRSRA/VSRI. by Jim Grosbach · 12 years ago
  95. 10a3933 Add ARM mode tests for the NEON vector shift-accumulate tests. by Jim Grosbach · 12 years ago
  96. 2b85250 Tidy up. Reformat for ease of reading. by Jim Grosbach · 12 years ago
  97. 13b7352 ARM: vqdmulh two-operand aliases are tblgen'erated now. by Jim Grosbach · 12 years ago
  98. 8dab504 [Support/Unix] Unconditionally include time.h. by Michael J. Spencer · 12 years ago
  99. 216432d Allow forward declarations to take a context. This helps the debugger by Eric Christopher · 12 years ago
  100. e3fd2a3 Temporarily revert r155364 until the upstream review can complete, per by Chandler Carruth · 12 years ago