- cd462d0 [fast-isel] Add support for selecting insertvalue. rdar://10530851 by Chad Rosier · 13 years ago
- 3c68acd Handle reloc_signed_4byte in here. Not doing so was a regression from my by Rafael Espindola · 13 years ago
- 493ad6b User a helper overload for a common pattern. by Jakob Stoklund Olesen · 13 years ago
- 2af50d9 Tidy up. Better base class factoring. by Jim Grosbach · 13 years ago
- 1f94ec7 Tidy up. Better base class factoring. by Jim Grosbach · 13 years ago
- 3c4615e Tweak debugging output. by Jakob Stoklund Olesen · 13 years ago
- 94c2e85 The second part of support for generating dwarf for assembly source files. This by Kevin Enderby · 13 years ago
- bf67a99 This is now implemented. by Benjamin Kramer · 13 years ago
- b653397 X86: Add patterns for the various rounding ops for SSE4.1 and AVX. by Benjamin Kramer · 13 years ago
- a73fb9a X86: Split (v)rounds[sd] into a normal and an intrinsic version. by Benjamin Kramer · 13 years ago
- 32f9763 Move isUnpredicatedTerminator() default implementation to TargetInstrInfoImpl to break Target's dependency on CodeGen. by Evan Cheng · 13 years ago
- 85abb27 Remove hasSSE1orAVX(). It's the same as hasXMM(). by Evan Cheng · 13 years ago
- 5d73448 Add -unroll-runtime for unrolling loops with run-time trip counts. by Andrew Trick · 13 years ago
- 1d5969d Handle the case of the magical _GLOBAL_OFFSET_TABLE_ showing up in a by Rafael Espindola · 13 years ago
- 6df7e23 Rename WrapperPIC. It is now used for both pic and static. by Akira Hatanaka · 13 years ago
- 0dca945 jalr should use t9 ($25) for indirect calls regardless of the relocation model by Akira Hatanaka · 13 years ago
- f5b9a74 Fix comment. by Devang Patel · 13 years ago
- 2b1d773 Update stale comment. by Devang Patel · 13 years ago
- 2dd0353 Fix a couple of logic bugs in TargetLowering::SimplifyDemandedBits. PR11514. by Eli Friedman · 13 years ago
- 7f7f090 Revert r146184. I am seeing performance regression cause by this patch in one test case. by Devang Patel · 13 years ago
- 976c0da ARM convenience aliases for VSQRT. by Jim Grosbach · 13 years ago
- a81ac8f Support/FileSystem: Implement recursive_directory_iterator and make by Michael J. Spencer · 13 years ago
- c9b98ad Fix infinite loop in DSE when deleting a free in a reachable loop that's also by Nick Lewycky · 13 years ago
- e955726 Add 256-bit variant vmovss and vmovsd patterns. rdar://10538417 by Evan Cheng · 13 years ago
- 8759c3f ARM 64-bit VEXT assembly uses a .64 suffix, not .32, amazingly enough. by Jim Grosbach · 13 years ago
- 243eb9e Enhance both TargetLibraryInfo and SelectionDAGBuilder so that the latter can use the former to prevent the formation of libm SDNode's when -fno-builtin is passed. by Owen Anderson · 13 years ago
- 6b044c2 ARM VSHR implied destination operand form aliases. by Jim Grosbach · 13 years ago
- 13d2ba3 Add various missing AVX patterns which was causing crashes. Sadly, the generated by Evan Cheng · 13 years ago
- e265bcf Refactor. No intentional functionality change. by Devang Patel · 13 years ago
- 73e08d3 Add rather verbose stats for fast-isel failures. by Chad Rosier · 13 years ago
- a62d11e ARM asm parser, just issue a warning for a duplicate reg in a list. by Jim Grosbach · 13 years ago
- cf405ba Filter "sink to" candidate blocks sooner. This avoids unnecessary computation to determine whether the block dominates all uses or not. by Devang Patel · 13 years ago
- 7a7194b Pass a GlobalAddress instead of an ExternalSymbol to LowerCallTo in by Akira Hatanaka · 13 years ago
- 1203134 ARM VSUB implied destination operand form aliases. by Jim Grosbach · 13 years ago
- 587e340 Don't explicitly marked libm rounding ops as legal on SSE4.1/AVX. There don't seem to be patterns for these, so I don't know why they were marked legal in the first place. by Owen Anderson · 13 years ago
- 9e7b42a ARM VQADD implied destination operand form aliases. by Jim Grosbach · 13 years ago
- 1c2c8a9 ARM a few more VMUL implied destination operand form aliases. by Jim Grosbach · 13 years ago
- ca07479 Implement 64-bit support for thread local storage handling. by Akira Hatanaka · 13 years ago
- 4a4fdf3 Teach SelectionDAG to match more calls to libm functions onto existing SDNodes. Mark these nodes as illegal by default, unless the target declares otherwise. by Owen Anderson · 13 years ago
- 40e2855 ARM assembler support for register name aliases. by Jim Grosbach · 13 years ago
- 43d5d4c Make MachineInstr instruction property queries more flexible. This change all by Evan Cheng · 13 years ago
- 2f43551 Many of the SSE patterns should not be selected when AVX is available. This led to the following code in X86Subtarget.cpp by Evan Cheng · 13 years ago
- 3b0887e Revert r146143, "Fix bug 9905: Failure in code selection for llvm intrinsics by Daniel Dunbar · 13 years ago
- 703420f Src2 and src3 were accidentally swapped for the FMA4 rr patterns. Undo this and fix the encoding. by Jan Sjödin · 13 years ago
- 44bac7c Fix a bug in the integer-promotion of bitcast operations on vector types. by Nadav Rotem · 13 years ago
- 72590c9 Fix bug 9905: Failure in code selection for llvm intrinsics sqrt/exp (fix for FSQRT, FSIN, FCOS, FPOWI, FPOW, FLOG, FLOG2, FLOG10, FEXP, FEXP2). by Stepan Dyatkovskiy · 13 years ago
- 6772452 MTCTR needs to be glued to BCTR so that CTR is not marked dead in MTCTR (another find by -verify-machineinstrs) by Hal Finkel · 13 years ago
- 8f391d9 Reverting r145899 as it breaks clang self-hosting by Pete Cooper · 13 years ago
- 730fe6c ARM NEON two-operand aliases for VSHL(immediate). by Jim Grosbach · 13 years ago
- e6f9e9d Drop the HasInlineAsm flag. by Jakob Stoklund Olesen · 13 years ago
- ff4cbb4 ARM NEON two-operand aliases for VSHL(register). by Jim Grosbach · 13 years ago
- 99486be Simplify offset verification. by Jakob Stoklund Olesen · 13 years ago
- 517a013 Fix copy/past-o. by Jim Grosbach · 13 years ago
- 2b8810c ARM NEON two-operand aliases for VMUL. by Jim Grosbach · 13 years ago
- 540c6d9 Don't include alignment padding in BBInfo.Size. by Jakob Stoklund Olesen · 13 years ago
- 8254f02 ARM VFP support 'fmrs/fmsr' aliases for 'vldr' by Jim Grosbach · 13 years ago
- 67ca1ad ARM VFP support 'flds/fldd' aliases for 'vldr' by Jim Grosbach · 13 years ago
- a44f2c4 ARM optional destination operand variants for VEXT instructions. by Jim Grosbach · 13 years ago
- 667f826 Fix 80-column. Simplify code. by Chad Rosier · 13 years ago
- 3bc8a3d ARM assembler aliases for "add Rd, #-imm" to "sub Rd, #imm". by Jim Grosbach · 13 years ago
- 14d622d Fix comments. by Chad Rosier · 13 years ago
- d40e103 EngineBuilder: support for custom TargetOptions. Fixes the by Peter Collingbourne · 13 years ago
- 0c89f7f Fix comments. by Chad Rosier · 13 years ago
- af4edea ARM assembly, allow 'asl' as a synonym for 'lsl' in shifted-register operands. by Jim Grosbach · 13 years ago
- 08a7d92 Modify class ReadHardware and add definition of 64-bit version of instruction by Akira Hatanaka · 13 years ago
- f99c1e5 Add newline. by Akira Hatanaka · 13 years ago
- be7b673 Add 64-bit HWR29 register. by Akira Hatanaka · 13 years ago
- da86fa1 32 to 64-bit anyext pattern. by Akira Hatanaka · 13 years ago
- 0a18cdc 32 to 64-bit zext pattern. by Akira Hatanaka · 13 years ago
- 9fa0a74 ARM two-operand aliases for VAND/VEOR/VORR instructions. by Jim Grosbach · 13 years ago
- 30a264e ARM two-operand aliases for VADDW instructions. by Jim Grosbach · 13 years ago
- d900441 ARM two-operand aliases for VADD instructions. by Jim Grosbach · 13 years ago
- 32c5981 Flesh out a bit more of the bitcode use-list ordering preservation code. by Chad Rosier · 13 years ago
- d1bcf0d Variable cleanup. Based on past patch submittals variable names have by Bruno Cardoso Lopes · 13 years ago
- 0e6307f Make sure we correctly set LiveRegGens when a call is unscheduled. <rdar://problem/10460321>. No testcase because this is very sensitive to scheduling. by Eli Friedman · 13 years ago
- 2c78be0 64-bit WrapperPICPat patterns. by Akira Hatanaka · 13 years ago
- 30c44e1 Fix an assertion in the scheduler. PR11386. No testcase included because it's rather delicate. by Eli Friedman · 13 years ago
- 20aa12a Define base class for WrapperPICPat. by Akira Hatanaka · 13 years ago
- 7398bf0 Modify LowerFCOPYSIGN to handle Mips64. by Akira Hatanaka · 13 years ago
- cbbb096 Begin adding experimental support for preserving use-list ordering of bitcode by Chad Rosier · 13 years ago
- e77ae2d These global variables aren't thread-safe, STATISTIC is. Andy Trick tells me by Nick Lewycky · 13 years ago
- 4e6c03f ValueEnumerator - debug dump(). by Chad Rosier · 13 years ago
- bd15090 Fix comment. by Akira Hatanaka · 13 years ago
- 3bdc03a Fix comment. by Akira Hatanaka · 13 years ago
- 4d0eb63 Fix 64-bit immediate patterns. by Akira Hatanaka · 13 years ago
- 4f66a05 Nuke inadvertant debugging commit. by Jim Grosbach · 13 years ago
- 577b091 Darwin assembler improved relocs when w/o subsections_via_symbols. by Jim Grosbach · 13 years ago
- feb468a Remove unneeded semicolon. Skip two looking up at BlockChain. by Jakub Staszak · 13 years ago
- 8524bca Thumb2 alias for long-form pop and friends. rdar://10542474 by Jim Grosbach · 13 years ago
- 9a70df9 ARM support the .arm and .thumb directives for assembly mode switching. by Jim Grosbach · 13 years ago
- 470855b ARM NEON VCLT(register) is a pseudo aliasing VCGT(register). by Jim Grosbach · 13 years ago
- 0ea3a0c Remove unused include. by Duncan Sands · 13 years ago
- d802326 Fix a bunch of SSE/AVX patterns to use proper memop types. In particular, not using integer loads other than v2i64/v4i64 since the others are all promoted. by Craig Topper · 13 years ago
- b3ec329 Adjust the stack by one pointer size for all frameless stacks. by Bill Wendling · 13 years ago
- c617513 Fix off-by-one error when encoding the stack size for a frameless stack. by Bill Wendling · 13 years ago
- 5a96b3d Add bundle aware API for querying instruction properties and switch the code by Evan Cheng · 13 years ago
- 5729c58 Adding missing anchor to DATDeltaAlgorithm. by David Blaikie · 13 years ago
- 234bb38 make CR spill and restore 64-bit clean (no functional change), and fix some other problems found with -verify-machineinstrs by Hal Finkel · 13 years ago
- 6d0e014 make base register selection used in eliminateFrameIndex 64-bit clean by Hal Finkel · 13 years ago
- ae37cd0 set mayStore and mayLoad on CR pseudos by Hal Finkel · 13 years ago