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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / cd70496ad1e69656a0b3d2caada4ed1b2c543d7a / lib / Target / ARM / ARMTargetMachine.cpp
  1. f22eefba Tidy up. by Jim Grosbach · 14 years ago
  2. 6904f05 Triple::MinGW64 is deprecated and removed. We can use Triple::MinGW32 generally. by NAKAMURA Takumi · 14 years ago
  3. 96aa78c Add support for the --noexecstack option. by Rafael Espindola · 15 years ago
  4. 16c29b5 Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there. by Anton Korobeynikov · 15 years ago
  5. 48575f6 Making use of VFP / NEON floating point multiply-accumulate / subtraction is by Evan Cheng · 15 years ago
  6. b75c651 tidy up by Chris Lattner · 15 years ago
  7. 3346491 First step of huge frame-related refactoring: move emit{Prologue,Epilogue} out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place by Anton Korobeynikov · 15 years ago
  8. 79ab2fe Revert the accidental commit I made reverting the previous commit. by Eric Christopher · 15 years ago
  9. 6c50119 Revert this temporarily. by Eric Christopher · 15 years ago
  10. 0febc46 Jim Asked us to move DataLayout on ARM back to the most specialized classes. Do by Rafael Espindola · 15 years ago
  11. d4d4f4f by Jason W Kim · 15 years ago
  12. a6136b7 Resolve this GCC warning: by Nick Lewycky · 15 years ago
  13. fd9493d Odd additional stub framework for the ARM MC ELF emission. by Rafael Espindola · 15 years ago
  14. bd916c5 Convert some VTBL and VTBX instructions to use pseudo instructions prior to by Bob Wilson · 15 years ago
  15. 7b4d311 Report error if codegen tries to instantiate a ARM target when the cpu does support it. e.g. cortex-m* processors. by Evan Cheng · 15 years ago
  16. e44be63 Change -prefer-32bit-thumb to attribute -mattr=+32bit instead to disable more 32-bit to 16-bit optimizations. by Evan Cheng · 15 years ago
  17. e8846fe Add an option to disable 32 -> 16-bit Thumb2 size reduction pass for experimentation. by Evan Cheng · 15 years ago
  18. cec36f4 Hook in GlobalMerge pass by Anton Korobeynikov · 15 years ago
  19. dca6539 Remove early IT block formation. It's not used. by Evan Cheng · 15 years ago
  20. ade57fa Add missing ARM and Thumb data layout info for vector types. Radar 8128745. by Bob Wilson · 15 years ago
  21. 8acf676 Oops. IT block formation pass needs to be run at any optimization level. by Evan Cheng · 15 years ago
  22. 96c3da6 Move ARM if-conversion before post-ra scheduling. by Evan Cheng · 15 years ago
  23. 86050dc Allow ARM if-converter to be run after post allocation scheduling. by Evan Cheng · 15 years ago
  24. 46df4eb Make post-ra scheduling, anti-dep breaking, and register scavenger (conservatively) aware of predicated instructions. This enables ARM to move if-conversion before post-ra scheduler. by Evan Cheng · 15 years ago
  25. 34aa423 Typo. by Evan Cheng · 15 years ago
  26. d847124 Thumb2 IT blocks are fairly expensive. When there are multiple selects using by Evan Cheng · 15 years ago
  27. ff7a562 Implement a bunch more TargetSelectionDAGInfo infrastructure. by Dan Gohman · 15 years ago
  28. 4b38deb Remove late ARM codegen optimization pass committed by accident. by Anton Korobeynikov · 15 years ago
  29. ebd4cb4 Move NEON-VFP domain fixer upper, so post-RA scheduler would benefit from it. by Anton Korobeynikov · 15 years ago
  30. 1e7b324 Some initial version of global merger by Anton Korobeynikov · 15 years ago
  31. 5d067fe TargetRegistry: Fix create{AsmInfo,MCDisassembler} to return non-const objects. by Daniel Dunbar · 15 years ago
  32. e0faa54 remove dead code. by Chris Lattner · 16 years ago
  33. f1d6b10 eliminate all the dead addSimpleCodeEmitter implementations. by Chris Lattner · 16 years ago
  34. e45ab8a For aligned load/store instructions, it's only required to know whether a by Jim Grosbach · 16 years ago
  35. e27d205 Factor the stack alignment calculations out into a target independent pass. by Jim Grosbach · 16 years ago
  36. a443217 Detect need for autoalignment of the stack earlier to catch spills more by Jim Grosbach · 16 years ago
  37. 59a9178 indicate what the native integer types for the target are. Please verify. by Chris Lattner · 16 years ago
  38. b9803a8 - Add pseudo instructions tLDRpci_pic and t2LDRpci_pic which does a pc-relative by Evan Cheng · 16 years ago
  39. 2928c83 Pass StringRef by value. by Daniel Dunbar · 16 years ago
  40. 747409a Move subtarget check upper for NEON reg-reg fixup pass. by Anton Korobeynikov · 16 years ago
  41. 7aaf94b Turn neon reg-reg moves fixup code into separate pass. This should reduce the compile time. by Anton Korobeynikov · 16 years ago
  42. a597103 Revert r85346 change to control tail merging by CodeGenOpt::Level. by Bob Wilson · 16 years ago
  43. cd4f04d Record CodeGen optimization level in the BranchFolding pass so that we can by Bob Wilson · 16 years ago
  44. bac6ed4 Revert 84843. Evan, this was breaking some of the if-conversion tests. by Bob Wilson · 16 years ago
  45. 87689d3 Move if-conversion before post-regalloc scheduling so the predicated instruction get scheduled properly. by Evan Cheng · 16 years ago
  46. 268c793 Trim include. by Evan Cheng · 16 years ago
  47. 62a1b5d Move load / store multiple before post-alloc scheduling. by Evan Cheng · 16 years ago
  48. 792e1f6 Add a option which would move ld/st multiple pass before post-alloc scheduling. by Evan Cheng · 16 years ago
  49. 522ce97 Pass the optimization level when constructing the ARM instruction selector. by Bob Wilson · 16 years ago
  50. e298ab2 Enable pre-regalloc load / store multiple pass for Thumb2. by Evan Cheng · 16 years ago
  51. 72c158f Really remove this option. by Evan Cheng · 16 years ago
  52. 8981572 Remove a couple of unused command line options. by Evan Cheng · 16 years ago
  53. a672403 trivial whitespace cleanup by Jim Grosbach · 16 years ago
  54. 2807afa rename COFFMCAsmInfo -> MCAsmInfoCOFF, likewise for darwin. by Chris Lattner · 16 years ago
  55. af76e59 Rename TargetAsmInfo (and its subclasses) to MCAsmInfo. by Chris Lattner · 16 years ago
  56. bc9b754 Turn on if-conversion for thumb2. by Evan Cheng · 16 years ago
  57. b42dad4 Revert 78892 and 78895, these break generating working executables on by Daniel Dunbar · 16 years ago
  58. b2d3169 fix a minor fixme. When building with SL and later tools, the ".eh" symbols by Chris Lattner · 16 years ago
  59. a7ac47c Change TargetAsmInfo to be constructed via TargetRegistry from a Target+Triple by Chris Lattner · 16 years ago
  60. 0a31d2f pass the TargetTriple down from each target ctor to the by Chris Lattner · 16 years ago
  61. 764ab52 Whitespace cleanup. Remove trailing whitespace. by Jim Grosbach · 16 years ago
  62. 7fb8c3f Adding a blank line back. by Evan Cheng · 16 years ago
  63. 3a1f0f6 Enable Thumb2 instruction shrinking (32-bit to 16-bit) pass. Convert a bunch of thumb2 tests to FileCheck. by Evan Cheng · 16 years ago
  64. 3eff16e Add a skeleton Thumb2 instruction size reduction pass. by Evan Cheng · 16 years ago
  65. 70cd88f Add a new pre-allocation pass to assign adjacent registers for Neon instructions by Bob Wilson · 16 years ago
  66. aa289d5 Oops. I didn't mean to commit this piece yet. by Bob Wilson · 16 years ago
  67. 4a3d35a Change DAG nodes for Neon VLD2/3/4 operations to return multiple results. by Bob Wilson · 16 years ago
  68. 9e7a312 Enable load / store multiple pass for Thumb2. It's not using ldrd / strd yet. by Evan Cheng · 16 years ago
  69. e28039c Move most targets TargetMachine constructor to only taking a target triple. by Daniel Dunbar · 16 years ago
  70. 3be0340 Normalize Subtarget constructors to take a target triple string instead of by Daniel Dunbar · 16 years ago
  71. 24def37 ARM TAI no longer needs a TM, but createTargetAsmInfo() still does. by Chris Lattner · 16 years ago
  72. fa199f3 remove dead code. by Chris Lattner · 16 years ago
  73. 0c795d6 Add new helpers for registering targets. - Less boilerplate == good. by Daniel Dunbar · 16 years ago
  74. 4cb1e13 Put Target definitions inside Target specific header, and llvm namespace. by Daniel Dunbar · 16 years ago
  75. 64cc972 Kill off <TARGET>MachineModule variables, and <TARGETASMPRINTER>ForceLink by Daniel Dunbar · 16 years ago
  76. 5d77cad Lift addAssemblyEmitter into LLVMTargetMachine. - No functionality change. by Daniel Dunbar · 16 years ago
  77. cfe9a60 Lift DumpAsm / -print-emitted-asm functionality into LLVMTargetMachine. by Daniel Dunbar · 16 years ago
  78. f055229 Remove old style hacks to register AsmPrinter into TargetMachine. by Daniel Dunbar · 16 years ago
  79. 51b198a Reapply TargetRegistry refactoring commits. by Daniel Dunbar · 16 years ago
  80. 2286f8d Revert 75762, 75763, 75766..75769, 75772..75775, 75778, 75780, 75782 to repair broken LLVM-GCC build. by Stuart Hastings · 16 years ago
  81. f3f4715 Replace large swaths of copy-n-paste code with obvious helper function... by Daniel Dunbar · 16 years ago
  82. 6c05796 Kill off old (TargetMachine level, not Target level) match quality functions. by Daniel Dunbar · 16 years ago
  83. 03f4bc5 Provide TargetMachine implementations with reference to Target they were created by Daniel Dunbar · 16 years ago
  84. 4246790 Register Target's TargetMachine and AsmPrinter in the new registry. by Daniel Dunbar · 16 years ago
  85. 7184781 by David Greene · 16 years ago
  86. 06e1658 Add a thumb2 pass to insert IT blocks. by Evan Cheng · 16 years ago
  87. ac57e6e Add the Object Code Emitter class. Original patch by Aaron Gray, I did some by Bruno Cardoso Lopes · 16 years ago
  88. b50ea5c Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1InstrInfo, Thumb2InstrInfo, Thumb1RegisterInfo and Thumb2RegisterInfo. Move methods from ARMInstrInfo to ARMBaseInstrInfo to prepare for sharing with Thumb2. by David Goodwin · 16 years ago
  89. 5bcc8bd Remove unused AsmPrinter OptLevel argument, and propogate. by Daniel Dunbar · 16 years ago
  90. d49ea77 Split thumb-related stuff into separate classes. by Anton Korobeynikov · 16 years ago
  91. a96751f Provide InitializeAllTargets and InitializeNativeTarget functions in the by Bob Wilson · 16 years ago
  92. ae69a2a Enable arm pre-allocation load / store multiple optimization pass. by Evan Cheng · 16 years ago
  93. 8557c2b Latency information for ARM v6. It's rough and not yet hooked up. Right now we are only using branch latency to determine if-conversion limits. by Evan Cheng · 16 years ago
  94. 1555a23 Introduce new headers whose inclusion forces linking and by Douglas Gregor · 16 years ago
  95. e7d6df7 Add a ARM specific pre-allocation pass that re-schedule loads / stores from by Evan Cheng · 16 years ago
  96. a3f99f9 First patch in the direction of splitting MachineCodeEmitter in two subclasses: by Bruno Cardoso Lopes · 16 years ago
  97. 98a366d Instead of passing in an unsigned value for the optimization level, use an enum, by Bill Wendling · 16 years ago
  98. be8cc2a Second attempt: by Bill Wendling · 16 years ago
  99. c69d56f r70270 isn't ready yet. Back this out. Sorry for the noise. by Bill Wendling · 16 years ago
  100. 2e9d5f9 Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to by Bill Wendling · 16 years ago