1. cdfad36 Simplify uses of MVT and EVT. An MVT can be compared directly by Duncan Sands · 15 years ago
  2. 1440e8b Inside the calling convention logic LocVT is always a simple by Duncan Sands · 15 years ago
  3. dfed19f Fix preload instruction isel. Only v7 supports pli, and only v7 with mp extension supports pldw. Add subtarget attribute to denote mp extension support and legalize illegal ones to nothing. by Evan Cheng · 15 years ago
  4. bc7deb0 Add support to match @llvm.prefetch to pld / pldw / pli. rdar://8601536. by Evan Cheng · 15 years ago
  5. cdbbec4 Put the PC encoding in the correct bit position. by Bill Wendling · 15 years ago
  6. 000cf70 Invert these branches by default, it makes assembly comparisons a little by Eric Christopher · 15 years ago
  7. 92b5a2e The MC code couldn't handle ARM LDR instructions with negative offsets: by Bill Wendling · 15 years ago
  8. 2915eb4 Remove unused function. by Jim Grosbach · 15 years ago
  9. 0a2287b Remove the no longer used 'Modifier' optional operand to the ARM by Jim Grosbach · 15 years ago
  10. 496e2b2 Remove unused function. by Jim Grosbach · 15 years ago
  11. e691360 Break ARM addrmode4 (load/store multiple base address) into its constituent by Jim Grosbach · 15 years ago
  12. 8239daf Two sets of changes. Sorry they are intermingled. by Evan Cheng · 15 years ago
  13. 41957f6 Modify scheduling itineraries to correct instruction latencies (not operand by Evan Cheng · 15 years ago
  14. 4c91412 Make sure we're only storing a single bit here. by Eric Christopher · 15 years ago
  15. 491561d per a suggestion by Frits van Bommel, mark all MBlaze Pseudo by Chris Lattner · 15 years ago
  16. f431eda Revert r118097 to fix buildbots. by Owen Anderson · 15 years ago
  17. a1ca91a Completely reject instructions that have an operand in their by Chris Lattner · 15 years ago
  18. 0800ce7 Obsessive formatting changes. No functionality impact. by Bill Wendling · 15 years ago
  19. d3a124d Omit unused parameter name. by Bill Wendling · 15 years ago
  20. 7292e0a Simplify the EncodeInstruction method now that a lot of the special case stuff by Bill Wendling · 15 years ago
  21. 1ba6064 Since these fields are not exactly equivalent to the encoded field, rename them to something with semantic meaning. by Owen Anderson · 15 years ago
  22. 5df0e0a Rename getAddrModeImm12OpValue to getAddrModeImmOpValue and expand it to work by Bill Wendling · 15 years ago
  23. a2b50b3 Rename encoder methods to match naming convention. by Owen Anderson · 15 years ago
  24. d6e623a mark a few codegenonly instructions. by Chris Lattner · 15 years ago
  25. b20594f Provide correct encodings for the remaining vst variants that we currently generate. by Owen Anderson · 15 years ago
  26. e95c946 Tentative encodings for the "single element from one lane" variant of vst1. by Owen Anderson · 15 years ago
  27. a1a45fd Add correct encodings for basic variants for vst3 and vst4. by Owen Anderson · 15 years ago
  28. d0c6bc2 Add NEON VST1-lane instructions. Partial fix for Radar 8599955. by Bob Wilson · 15 years ago
  29. d2f3794 Add correct encodings for the basic variants for vst2. by Owen Anderson · 15 years ago
  30. cfebe3a Add correct encodings for the basic form of vst1. by Owen Anderson · 15 years ago
  31. d138d70 Factor out a common encoding class for loads and stores with a lane parameter. by Owen Anderson · 15 years ago
  32. f0ea0f2 Add correct encodings for the rest of the vld instructions that we generate. by Owen Anderson · 15 years ago
  33. 28b1082 Sort bit assignments. Cosmetic change only. by Jim Grosbach · 15 years ago
  34. ab3d00e Revert r114340 (improvements in Darwin function prologue/epilogue), as it broke by Jim Grosbach · 15 years ago
  35. cf667be Add correct NEON encodings for vld2, vld3, and vld4 basic variants. by Owen Anderson · 15 years ago
  36. 4053e63 Remove an assert - it's possible to be hit, and we just want to avoid by Eric Christopher · 15 years ago
  37. 61d69da Whitespeace by Eric Christopher · 15 years ago
  38. aaa8df4 No really, no thumb1 for arm fast isel. Also add an informative comment as by Eric Christopher · 15 years ago
  39. e85bd77 Attempt to provide correct encodings for a number of other vld1 variants, which we can't test by Owen Anderson · 15 years ago
  40. b552174 Add aesthetic break. by Owen Anderson · 15 years ago
  41. d9aa7d3 Add correct NEON encodings for the "multiple single elements" form of vld. by Owen Anderson · 15 years ago
  42. 9af3d1c Explicitly check for non-consant reference in an LDRi12 instruction. Add FIXME by Jim Grosbach · 15 years ago
  43. a502423 Remove unused function. by Jim Grosbach · 15 years ago
  44. 665814b Add support for alignment operands on VLD1-lane instructions. by Bob Wilson · 15 years ago
  45. cd944a4 Missed reverting this bit. by Bill Wendling · 15 years ago
  46. 160acca Minor cleanup. by Bill Wendling · 15 years ago
  47. efd8dad rearrange a bit. by Chris Lattner · 15 years ago
  48. b796bbb Add NEON VLD1-lane instructions. Partial fix for Radar 8599955. by Bob Wilson · 15 years ago
  49. c2bf502 Move the machine operand MC encoding patterns to the parent classes. by Bill Wendling · 15 years ago
  50. 99f5352 use our fancy new MnemonicAlias mechanism to remove a bunch of hacks by Chris Lattner · 15 years ago
  51. 40a5eb1 When we look at instructions to convert to setting the 's' flag, we need to look by Bill Wendling · 15 years ago
  52. 24645a1 NEON does not support truncating vector stores. Radar 8598391. by Bob Wilson · 15 years ago
  53. 469ebbe Add FIXME. by Jim Grosbach · 15 years ago
  54. 6797f89 Add 'IsThumb' predicate to patterns marked as 'IsThumb1Only'. The latter gates by Jim Grosbach · 15 years ago
  55. 833c93c Mark ARM subtarget features that are available for the assembler. by Jim Grosbach · 15 years ago
  56. d4462a5 trailing whitespace by Jim Grosbach · 15 years ago
  57. 9729d2e The T2 extract/pack instructions are only valid in Thumb2 mode. Mark the by Jim Grosbach · 15 years ago
  58. 6966119 Move instruction encoding bits into the parent class and remove the temporary by Bill Wendling · 15 years ago
  59. acc473f "mov[zs]x (mem), GR16" are not ambiguous: the mem by Chris Lattner · 15 years ago
  60. b501d4f Implement enough of the missing instalias support to get by Chris Lattner · 15 years ago
  61. 4164f6b make the asm matcher emitter reject instructions that have comments by Chris Lattner · 15 years ago
  62. 4d1189f reject instructions that contain a \n in their asmstring. Mark by Chris Lattner · 15 years ago
  63. 150d20e fix the !eq operator in tblgen to return a bit instead of an int. by Chris Lattner · 15 years ago
  64. a4a3a5e two changes: make the asmmatcher generator ignore ARM pseudos properly, by Chris Lattner · 15 years ago
  65. 39ee036 reapply r117858 with apparent editor malfunction fixed (somehow I by Chris Lattner · 15 years ago
  66. 8b2f082 revert r117858 while I check out a failure I missed. by Chris Lattner · 15 years ago
  67. efa5376 the asm matcher can't handle operands with modifiers (like ${foo:bar}). by Chris Lattner · 15 years ago
  68. a33b93f sketch out the planned instruction alias mechanism, add some comments about by Chris Lattner · 15 years ago
  69. 4590766 Factorize the duplicated logic for choosing the right argument by Duncan Sands · 15 years ago
  70. e26032d Remove CCAssignFnForRet from X86 FastISel in favour of RetCC_X86, by Duncan Sands · 15 years ago
  71. 76d6147 Make sure we have a legal type (and simple) before continuing. by Eric Christopher · 15 years ago
  72. 0f899c7 Resolve a terrible hack in tblgen: instead of hardcoding by Chris Lattner · 15 years ago
  73. 693173f Implement (and document!) support for MnemonicAlias's to have Requires by Chris Lattner · 15 years ago
  74. a47b265 really zap alias. by Chris Lattner · 15 years ago
  75. b3c4178 move fcompi alias to .td file and zap some useless code. by Chris Lattner · 15 years ago
  76. 6f96b08 move rep aliases to td file by Chris Lattner · 15 years ago
  77. a17a9a0 move sal aliases to .td file. by Chris Lattner · 15 years ago
  78. 1a1ecc9 fix an encoding mismatch where "sal %eax, 1" was not using the short encoding by Chris Lattner · 15 years ago
  79. 8b260a7 move a bunch more aliases from .cpp -> .td file. by Chris Lattner · 15 years ago
  80. 8cb441c move cmov aliases to .td file. by Chris Lattner · 15 years ago
  81. b69fc28 move setcc and jcc aliases from .cpp to .td by Chris Lattner · 15 years ago
  82. 537ca84 move some code. by Chris Lattner · 15 years ago
  83. 674c1dc implement (and document!) the first kind of MC assembler alias, which by Chris Lattner · 15 years ago
  84. 7644971 Add FIXME. by Jim Grosbach · 15 years ago
  85. 604cdf6 Clean up comments. by Jim Grosbach · 15 years ago
  86. 4aaf59d Tidy up. by Jim Grosbach · 15 years ago
  87. 9a82e70 stay out of the reserved namespace by Chris Lattner · 15 years ago
  88. dba34d8 simplify this code. by Chris Lattner · 15 years ago
  89. e5658fa split MaybeParseRegister into its two logical uses, eliminating malloc+free traffic. by Chris Lattner · 15 years ago
  90. 4b5236c Avoid re-evaluating MI.getNumOperands() every iteration of the loop. by Jim Grosbach · 15 years ago
  91. f74a429 Overhaul memory barriers in the ARM backend. Radar 8601999. by Bob Wilson · 15 years ago
  92. 6b5252d Encode the register list operands for ARM mode LDM/STM instructions. by Jim Grosbach · 15 years ago
  93. 52925b6 Some instructions end with an "ls" prefix, but it doesn't indicate that they are by Bill Wendling · 15 years ago
  94. f38bfd1 Remove hard tab characters. by Jim Grosbach · 15 years ago
  95. c4bc211 80 column fix. by Jim Grosbach · 15 years ago
  96. d8a11c2 trailing whitespace by Jim Grosbach · 15 years ago
  97. 0d2d2e9 s/getNEONVcvtImm32/getNEONVcvtImm32OpValue/ to be consistent with other operand by Jim Grosbach · 15 years ago
  98. e09206d Fix fpscr <-> GPR latency info. by Evan Cheng · 15 years ago
  99. 3df518e add FIXME by Jim Grosbach · 15 years ago
  100. 8e0a3eb Convert ARM::MOVi2pieces to a true pseudo-instruction and expand it in by Jim Grosbach · 15 years ago