1. 533297b Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a by Dan Gohman · 15 years ago
  2. 799d697 Add instruction flags: hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq. When by Evan Cheng · 15 years ago
  3. 15511cf Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning. by Dan Gohman · 16 years ago
  4. 8370d38 Add a flag to indicate that an instruction is as cheap (or cheaper) than a move by Bill Wendling · 16 years ago
  5. 20ccded Remove isImplicitDef TargetInstrDesc flag. by Evan Cheng · 17 years ago
  6. ba7e756 Start inferring side effect information more aggressively, and fix many bugs in the by Chris Lattner · 17 years ago
  7. dcc8b4f add a mayLoad property for machine instructions, a correlary to mayStore. by Chris Lattner · 17 years ago
  8. 8f707e1 rename hasVariableOperands() -> isVariadic(). Add some comments. by Chris Lattner · 17 years ago
  9. af3eb7c the name field of instructions is never set to a non-empty string, by Chris Lattner · 17 years ago
  10. 834f1ce rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate. by Chris Lattner · 17 years ago
  11. 2e48a70 rename isStore -> mayStore to more accurately reflect what it captures. by Chris Lattner · 17 years ago
  12. 6cc654b Split the impl of CodeGenInstruction out to its own .cpp file, add a getName() accessor. by Chris Lattner · 17 years ago
  13. 3060910 remove attributions from utils. by Chris Lattner · 17 years ago
  14. 6b1da9c Add flags to indicate that there are "never" side effects or that there "may be" by Bill Wendling · 17 years ago
  15. 3dd298f Oops. Forgot these. by Evan Cheng · 17 years ago
  16. 20ab290 Add a flag for indirect branch instructions. by Owen Anderson · 17 years ago
  17. 102dc19 No need for noResults anymore. by Evan Cheng · 17 years ago
  18. 64d80e3 Change instruction description to split OperandList into OutOperandList and by Evan Cheng · 17 years ago
  19. 88cc092 Try committing again. Add OptionalDefOperand. Remove clobbersPred. by Evan Cheng · 17 years ago
  20. d45eddd Revert the earlier change that removed the M_REMATERIALIZABLE machine by Dan Gohman · 17 years ago
  21. 82a87a0 Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad by Dan Gohman · 17 years ago
  22. eaa91b0 Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit. by Evan Cheng · 17 years ago
  23. b5c1c9c Add clobbersPred - instruction that clobbers condition code / register which are used to predicate instructions. by Evan Cheng · 17 years ago
  24. 5127ce0 Rename M_PREDICATED to M_PREDICABLE; opcode can be specified isPredicable without having a PredicateOperand. by Evan Cheng · 17 years ago
  25. 04677a3 Recognize target instruction flag 'isReMaterializable'. by Evan Cheng · 18 years ago
  26. f64f9a4 Remove the isTwoAddress property from the CodeGenInstruction class. It should by Chris Lattner · 18 years ago
  27. 0bb7500 ADd support for adding constraints to suboperands by Chris Lattner · 18 years ago
  28. a0cca4a simplify the way operand flags and constraints are handled, making it easier by Chris Lattner · 18 years ago
  29. a818e92 recognize ppc's blr instruction as predicated by Chris Lattner · 18 years ago
  30. d41b30d Unbreak VC++ build. by Jeff Cohen · 18 years ago
  31. e2ba897 Add operand constraints to TargetInstrInfo. by Evan Cheng · 18 years ago
  32. 51fecc8 * Remove instruction fields hasInFlag / hasOutFlag and added SNDPInFlag and by Evan Cheng · 19 years ago
  33. 2b4ea79 Added field noResults to Instruction. by Evan Cheng · 19 years ago
  34. 7b05bd5 * Support for hasInFlag and hasOutFlag (on instructions). Remove nameless FLAG by Evan Cheng · 19 years ago
  35. 1c3d19e * Commit the fix (by Chris) for a tblgen type inferencing bug. by Evan Cheng · 19 years ago
  36. 86193d1 Nuke CodeGenInstruction's ValueType member, it is no longer used. by Nate Begeman · 19 years ago
  37. 8ef9d16 fit into 80 columns by Nate Begeman · 19 years ago
  38. 65303d6 Teach tblgen about instruction operands that have multiple MachineInstr by Chris Lattner · 19 years ago
  39. 5f89bf0 spell this variable right by Chris Lattner · 19 years ago
  40. 8b50f9b Expose a new flag to TargetInstrInfo by Chris Lattner · 19 years ago
  41. 0e384b6 For now, just emit empty operand info structures. by Chris Lattner · 19 years ago
  42. cfbf96a Figure out how many operands each instruction has, keep track of whether by Chris Lattner · 19 years ago
  43. 3da94ae Remove trailing whitespace by Misha Brukman · 20 years ago
  44. aad75aa Expose isConvertibleToThreeAddress and isCommutable bits to the code generator. by Chris Lattner · 20 years ago
  45. cdd66b5 Add support for the isLoad and isStore flags, needed by the instruction scheduler by Nate Begeman · 20 years ago
  46. 5b71d3a Turn the hasDelaySlot flag into the M_DELAY_SLOT_FLAG by Chris Lattner · 20 years ago
  47. 175580c Make the AsmWriter a first-class tblgen object. Allow targets to specify by Chris Lattner · 20 years ago
  48. cf03da0 Start parsing more information from the Operand information by Chris Lattner · 20 years ago
  49. 87c5905 Parse the operand list of the instruction. We currently support register and immediate operands. by Chris Lattner · 20 years ago
  50. ec35240 Add, and start using, the CodeGenInstruction class. This class represents by Chris Lattner · 20 years ago