- ce63ffb More migration to raw_ostream, the water has dried up around the iostream hole. by Daniel Dunbar · 16 years ago
- 90daf4d ARM code emitter can't handle Thumb2 instructions yet. So don't even try. by Evan Cheng · 16 years ago
- 8295d99 Get rid one of the getRegisterNumbering. Also add D16 - D31. by Evan Cheng · 16 years ago
- 7540282 r76102 added the MachineCodeEmitter::processDebugLoc call and called it from by Jeffrey Yasskin · 16 years ago
- c23197a llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable. by Torok Edwin · 16 years ago
- 29fd056 Remove extra \n from LLVM_UNREACHABLE calls. by Torok Edwin · 16 years ago
- e7cbe41 Change how so_imm and t2_so_imm are handled. At instruction selection time, the immediates are no longer encoded in the imm8 + rot format, that are left as it is. The encoding is now done in ams printing and code emission time instead. by Evan Cheng · 16 years ago
- dac237e Implement changes from Chris's feedback. Finish converting lib/Target. by Torok Edwin · 16 years ago
- ab7c09b Start converting to new error handling API. by Torok Edwin · 16 years ago
- c9a4153 Add a todo. by Evan Cheng · 16 years ago
- bc8a945 Statically encode bit 25 to indicate immediate form of data processing instructions. Patch by Sean Callanan. by Evan Cheng · 16 years ago
- 36a0aeb Add bfc to armv6t2. by Evan Cheng · 16 years ago
- ac57e6e Add the Object Code Emitter class. Original patch by Aaron Gray, I did some by Bruno Cardoso Lopes · 16 years ago
- c9a59b5 Improve Thumb-2 jump table support. by David Goodwin · 16 years ago
- d49ea77 Split thumb-related stuff into separate classes. by Anton Korobeynikov · 16 years ago
- 358dec5 Part 1. by Evan Cheng · 16 years ago
- 434dd4f Fix new CodeEmitter stuff to follow LLVM codying style. Patch by Aaron Gray by Bruno Cardoso Lopes · 16 years ago
- a3f99f9 First patch in the direction of splitting MachineCodeEmitter in two subclasses: by Bruno Cardoso Lopes · 16 years ago
- 5788d1a Fix MachineCodeEmitter to use uintptr_t instead of intptr_t. This avoids some overflow issues. Patch by Thomas Jablin. by Evan Cheng · 17 years ago
- 97c573d Fix a thinko. MO is getOperand(i-1) so we don't have to adjust e. by Evan Cheng · 17 years ago
- e3066ab Eliminate a compile time warning. by Evan Cheng · 17 years ago
- a956255 Fix MOVrx, MOVsrl_flag, and MOVsra_flag encodings. by Evan Cheng · 17 years ago
- ffa6d96 Handle the rest of pseudo instructions. by Evan Cheng · 17 years ago
- 35b0bfd Don't forget to emit stubs for function GV's emitted in CONSTPOOL_ENTRY's. by Evan Cheng · 17 years ago
- 67fd91f Missed a break statement. by Evan Cheng · 17 years ago
- 148cad8 Fix pre- and post-indexed load / store encoding bugs. by Evan Cheng · 17 years ago
- 607f1b4 Address mode immediate offset has already been divided by 4. by Evan Cheng · 17 years ago
- 3f4924e Fix a VFP binary arithmetic instruction encoding bug. by Evan Cheng · 17 years ago
- 7063291 Fix address mode 3 immediate offset mode encoding. by Evan Cheng · 17 years ago
- 3c4a4ff Consolidate formats; fix FCMPED etc. encodings. by Evan Cheng · 17 years ago
- 80a1198 Fix VFP conversion instruction encodings. by Evan Cheng · 17 years ago
- d06d48d Fix encoding of single-precision VFP registers. by Evan Cheng · 17 years ago
- 580c0df VFP fld / fst immediate field is multiplied by 4. by Evan Cheng · 17 years ago
- 0a0ab13 Fix FMDRR encoding. by Evan Cheng · 17 years ago
- cb5201f Handle floating point constpool_entry's. by Evan Cheng · 17 years ago
- cd8e66a Encode VFP load / store instructions. by Evan Cheng · 17 years ago
- 78be83d Encode VFP conversion instructions. by Evan Cheng · 17 years ago
- 96581d3 Encode VFP arithmetic instructions. by Evan Cheng · 17 years ago
- 9ed2f80 Rename isGVNonLazyPtr to isIndirectSym to reflect how it will be used. by Evan Cheng · 17 years ago
- 3cc8223 Tell ARMJITInfo if codegen relocation is PIC. It changes how function stubs are generated. by Evan Cheng · 17 years ago
- 1033251 Fix relocation for calls to external symbols. by Evan Cheng · 17 years ago
- 05c356e Skip over two-address use operands. by Evan Cheng · 17 years ago
- e96a490 Handle ARM machine constantpool entry with non-lazy ptr. by Evan Cheng · 17 years ago
- 413a89f More code clean up. by Evan Cheng · 17 years ago
- 437c173 Get PIC jump table working. by Evan Cheng · 17 years ago
- 4df60f5 Jump table JIT support. Work in progress. by Evan Cheng · 17 years ago
- 8b59db3 Encode misc arithmetic instructions. by Evan Cheng · 17 years ago
- 97f48c3 Encode extend instructions; more clean up. by Evan Cheng · 17 years ago
- 12c3a53 - Improve naming consistency: Branch -> BrFrm, BranchMisc -> BrMiscFrm. by Evan Cheng · 17 years ago
- d87293c Remove opcode from instruction TS flags; add MOVCC support; fix addrmode3 encoding bug. by Evan Cheng · 17 years ago
- 9092213 Fix so_imm encoding bug; add support for MOVi2pieces. by Evan Cheng · 17 years ago
- fbc9d41 Fix encoding of multiple instructions with 3 src operands; also handle smmul, smmla, and smmls. by Evan Cheng · 17 years ago
- 83b5cf0 Encode pic load / store instructions; fix some encoding bugs. by Evan Cheng · 17 years ago
- edda31c Restructure ARM code emitter to use instruction formats instead of addressing modes to determine how to encode instructions. by Evan Cheng · 17 years ago
- 142c15e Debug output tweak. by Evan Cheng · 17 years ago
- 25e0478 Handle ARM machine constantpool entries. by Evan Cheng · 17 years ago
- 0a4b9dc Add binary encoding support for multiply instructions. Some blanks left to fill in, but the basics are there. by Jim Grosbach · 17 years ago
- 938b9d8 Use better data structure for ConstPoolId2AddrMap. by Evan Cheng · 17 years ago
- ba44df6 Actually make debug output understandable. by Evan Cheng · 17 years ago
- eb4ed4b Encode PICADD; some code clean up. by Evan Cheng · 17 years ago
- e53a5af I think we got non-machine specific constpool entries covered. by Evan Cheng · 17 years ago
- 0f28243 Correct way to handle CONSTPOOL_ENTRY instructions. by Evan Cheng · 17 years ago
- bc6d876 Support for constant islands in the ARM JIT. by Jim Grosbach · 17 years ago
- 3341262 Encode the conditional execution predicate when JITing. by Jim Grosbach · 17 years ago
- 9e729a2 Clarify naming and correct conditional so that CMP and CMN instructions get the Rn operand encoded properly by Jim Grosbach · 17 years ago
- 48b828f Indexing off by one resulted in errant encoding of source register for by Jim Grosbach · 17 years ago
- 016d34c by Jim Grosbach · 17 years ago
- d735b80 Switch the MachineOperand accessors back to the short names like by Dan Gohman · 17 years ago
- efd30ba Fix typo s/ther/there/ by Jim Grosbach · 17 years ago
- 057d0c3 Duh. Default to ARMCC::AL (always). by Evan Cheng · 17 years ago
- 7fd7ca4 Fix addrmode1 instruction encodings; fix bx_ret encoding. by Evan Cheng · 17 years ago
- 2aa0e64 Fix random abort. by Evan Cheng · 17 years ago
- e7de7e3 Typo. by Evan Cheng · 17 years ago
- be3034c Rely on instruction format to determine so_reg operand for now. by Evan Cheng · 17 years ago
- 05fc966 Revert 56176. All those instruction formats are still needed. by Evan Cheng · 17 years ago
- 55375a4 Accidentially flipped the condition. by Evan Cheng · 17 years ago
- 42d5ee06 Add debug dumps. by Evan Cheng · 17 years ago
- a964b7d Eliminate unnecessary instruction formats. by Evan Cheng · 17 years ago
- 49a9f29 Addrmode 1 S bit can be dynamically set. Look for CPSR def. by Evan Cheng · 17 years ago
- 5f1db7b Rewrite address mode 1 code emission routines. by Evan Cheng · 17 years ago
- ae73dc1 Tidy up several unbeseeming casts from pointer to intptr_t. by Dan Gohman · 17 years ago
- 7602e11 Revamp ARM JIT. by Evan Cheng · 17 years ago
- 7c1c261 Remove bunch of gcc 4.3-related warnings from Target by Anton Korobeynikov · 17 years ago
- 6f0d024 Rename MRegisterInfo to TargetRegisterInfo. by Dan Gohman · 17 years ago
- 749c6f6 rename TargetInstrDescriptor -> TargetInstrDesc. by Chris Lattner · 18 years ago
- 6924430 Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects by Chris Lattner · 18 years ago
- 8aa797a Add new shorter predicates for testing machine operands for various types: by Chris Lattner · 18 years ago
- 9a1ceae Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm by Chris Lattner · 18 years ago
- 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 18 years ago
- 9c1a382 Comments added. It now generates V5TE multiply instructions. However, it is still necessary to model PUWLSH bits more clearly. by Raul Herbster · 18 years ago
- 0ff94f7 Initial JIT support for ARM by Raul Fernandes Herbster. by Evan Cheng · 18 years ago
- c3dbe70 no email addrs in file headers by Chris Lattner · 18 years ago
- 148b6a4 Initial ARM JIT support by Raul Fernandes Herbster. by Evan Cheng · 18 years ago