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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / ce750f03322fe29ced3aca0718424fe173f22298 / lib / CodeGen / SelectionDAG
  1. ce750f0 Implement the "if (X == 6 || X == 4)" -> "if ((X|2) == 6)" optimization. by Benjamin Kramer · 15 years ago
  2. 3ca1363 Silence Release build warnings about unused functions. by Benjamin Kramer · 15 years ago
  3. 59d2dad On X86, MEMBARRIER, MFENCE, SFENCE, LFENCE are not target memory intrinsics, by Duncan Sands · 15 years ago
  4. b9e6fe1 Removing the useless test that I added recently. It was meant as an example, but not complicated enough to merit another test. by Andrew Trick · 15 years ago
  5. 04d14ff Check for _setjmp too, because it's also used. by Bill Wendling · 15 years ago
  6. cab98e3 Make isScalarToVector to return false if the node is a scalar. This will prevent by Mon P Wang · 15 years ago
  7. b9064bb Fix thinko: we must turn select(anyext, sext) into sext(select) by Duncan Sands · 15 years ago
  8. dcfd3a7 The DAGCombiner was threading select over pairs of extending loads even by Duncan Sands · 15 years ago
  9. b4ac285 Do not throw away alignment when generating the DAG for by Dale Johannesen · 15 years ago
  10. 7730318 Bug 8621 fix - pointer cast stripped from inline asm constraint argument. by John Thompson · 15 years ago
  11. 668ac2f Split pseudo-instruction expansion into a separate pass, to make it by Dan Gohman · 15 years ago
  12. f06202f typo (4th checkin for one fix) by Andrew Trick · 15 years ago
  13. de91f3c Fixes PR8287: SD scheduling time. The fix is a failsafe that prevents by Andrew Trick · 15 years ago
  14. a29aae7 tidy up. by Chris Lattner · 15 years ago
  15. efb8a9d Remove the memmove->memcpy optimization from CodeGen. MemCpyOpt does this. by Dan Gohman · 15 years ago
  16. 6a559cd Fix DAGCombiner to avoid folding a sext-in-reg or similar through a shl by Dan Gohman · 15 years ago
  17. 71365d3 Fix an inline asm pasto from 117667; was preventing by Dale Johannesen · 15 years ago
  18. 69300a2 When passing a parameter using the 'byval' mechanism, inline code needs to be used by Duncan Sands · 15 years ago
  19. d81f17a Just return undef for invalid masks or elts, and since we're doing that, by Eric Christopher · 15 years ago
  20. cdfad36 Simplify uses of MVT and EVT. An MVT can be compared directly by Duncan Sands · 15 years ago
  21. 1440e8b Inside the calling convention logic LocVT is always a simple by Duncan Sands · 15 years ago
  22. caebdd4 If we have an undef mask our Elt will be -1 for our access, handle by Eric Christopher · 15 years ago
  23. 394d629 Fix DAGCombiner to avoid going into an infinite loop when it by Dan Gohman · 15 years ago
  24. 8239daf Two sets of changes. Sorry they are intermingled. by Evan Cheng · 15 years ago
  25. 8bc9ef7 If value map does not have register for an argument then try to find frame index before giving up. by Devang Patel · 15 years ago
  26. a90b305 Use frameindex, if available, as a last resort to emit debug info for a parameter. by Devang Patel · 15 years ago
  27. 4645509 Remove DAG combiner patch to fold vector splats. Instcombiner does it now. by Bob Wilson · 15 years ago
  28. 0897515 Avoiding overly aggressive latency scheduling. If the two nodes share an by Evan Cheng · 15 years ago
  29. 44ab89e Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support. by John Thompson · 15 years ago
  30. 0f1db1a Teach the DAG combiner to fold a splat of a splat. Radar 8597790. by Bob Wilson · 15 years ago
  31. 7e2fe91 Re-commit 117518 and 117519 now that ARM MC test failures are out of the way. by Evan Cheng · 15 years ago
  32. 9e08ee5 Revert 117518 and 117519 for now. They changed scheduling and cause MC tests to fail. Ugh. by Evan Cheng · 15 years ago
  33. 7c88cdc Fix a major bug in operand latency computation. The use index must be adjusted by Evan Cheng · 15 years ago
  34. 1de4aa9 Use a MemIntrinsicSDNode for ISD::PREFETCH, which touches by Dale Johannesen · 15 years ago
  35. 7e13efa Assign source ordering to nodes created for StoreInst. by Devang Patel · 15 years ago
  36. a568d66 For statistics that are only used in functions declared in !NDEBUG, wrap the by Nick Lewycky · 15 years ago
  37. df8370b Simplify. Do not count use of sdisel for single call instruction. by Devang Patel · 15 years ago
  38. 948f7d0 Add counters to count basic blocks and machine basic blocks with out of order line number info. by Devang Patel · 15 years ago
  39. 19e5702 Move the remaining attribute macros to systematic names based on the attribute by Chandler Carruth · 15 years ago
  40. 391b43b X86: Base _fltused on the FunctionType of the called value instead of the potentially null "CalledFunction". Thanks Duncan! by Michael J. Spencer · 15 years ago
  41. dd0a00a CodeGen-Windows: Only emit _fltused if a VarArg function is called with floating point args. by Michael J. Spencer · 15 years ago
  42. e93d99c Remove Synthesizable from the Type system; as MMX vector by Dale Johannesen · 15 years ago
  43. f96e4bd Make CodeGen TBAA-aware. by Dan Gohman · 15 years ago
  44. e4ad387 Add a pre-dispatch SjLj EH hook on the unwind edge for targets to do any by Jim Grosbach · 15 years ago
  45. 081c34b Get rid of static constructors for pass registration. Instead, every pass exposes an initializeMyPassFunction(), which by Owen Anderson · 15 years ago
  46. 84ac4d5 X86-Windows: Emit an undefined global __fltused symbol when targeting Windows by Michael J. Spencer · 15 years ago
  47. e70c526 Whitespace! by Michael J. Spencer · 15 years ago
  48. 07e3a38 fix the default va_arg expansion (in the realignment case) to not implicitly by Chris Lattner · 15 years ago
  49. 0dadb15 ComputeLinearIndex doesn't need its TLI argument. by Dan Gohman · 15 years ago
  50. a0792de - Add TargetInstrInfo::getOperandLatency() to compute operand latencies. This by Evan Cheng · 15 years ago
  51. 3a9e769 Use a more efficient lowering of uint64_t --> float that can take advantage of hardware signed integer conversion without by Owen Anderson · 15 years ago
  52. 2a135ae This DAG combine BRCOND transformation can look pass truncate of the operand: by Evan Cheng · 15 years ago
  53. 27f46cd Fix code gen crash reported in PR 8235. We still lose debug info for the unused argument here. This is a known limitation recorded debuginfo-tests/trunk/dbg-declare2.ll function 'f6' test case. by Devang Patel · 15 years ago
  54. fb4032f typo by Gabor Greif · 15 years ago
  55. 6bf263b fix typo by Chris Lattner · 15 years ago
  56. 2831a19 fix rdar://8494845 + PR8244 - a miscompile exposed by my patch in r101350 by Chris Lattner · 15 years ago
  57. 0488fb6 Massive rewrite of MMX: by Dale Johannesen · 15 years ago
  58. 2622f46 When isel is emitting instructions for an x86 target without CMOV, the CFG is by Jakob Stoklund Olesen · 15 years ago
  59. 3881cb7 Model Cortex-a9 load to SUB, RSB, ADD, ADC, SBC, RSC, CMN, MVN, or CMP by Evan Cheng · 15 years ago
  60. 3609eb0 Removed a bunch of unnecessary target_link_libraries. by Oscar Fuentes · 15 years ago
  61. 61b20ef Don't try to make a vector of x86mmx; this won't work, and asserts. by Dale Johannesen · 15 years ago
  62. 5458474 Fix for test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll crash. by John Thompson · 15 years ago
  63. 1f40960 Get rid of pop_macro warnings on MSVC. by Michael J. Spencer · 15 years ago
  64. 8c1f432 Revert 114634 for now since buildbot claim it broke Clang self-hosting. I doubt it but it's possible it's exposing another bug somewhere. by Evan Cheng · 15 years ago
  65. df30bdb Fix VS 2010 build. by Oscar Fuentes · 15 years ago
  66. b8db198 Follow up to r114630. Do not optimize away unconditional branch following a conditional one. by Evan Cheng · 15 years ago
  67. 266a99d SDISel should not optimize a unconditional branch following a conditional branch by Evan Cheng · 15 years ago
  68. ed1088a A select between a constant and zero, when fed by a bit test, can be efficiently by Owen Anderson · 15 years ago
  69. 67aff16 Fixed pr20314-2.c failure, added E, F, p constraint letters. by John Thompson · 15 years ago
  70. d847bc2 Rework passing parent pointers into complexpatterns, I forgot by Chris Lattner · 15 years ago
  71. 44cfe14 If only user of a vreg is an copy instruction to export copy of vreg out of current basic block then insert DBG_VALUE so that debug value of the variable is also transfered to new vreg. by Devang Patel · 15 years ago
  72. 77bd88c correct this logic. by Chris Lattner · 15 years ago
  73. bc146b0 Reimplement r114460 in target-independent DAGCombine rather than target-dependent, by using by Owen Anderson · 15 years ago
  74. 78d3af4 just like they can opt into getting the root of the pattern being by Chris Lattner · 15 years ago
  75. 84bd98a finish pushing MachinePointerInfo through selectiondags. At this point, by Chris Lattner · 15 years ago
  76. 6229d0a update a bunch of code to use the MachinePointerInfo version of getStore. by Chris Lattner · 15 years ago
  77. 65ffec4 Define the TargetLowering::getTgtMemIntrinsic hook for ARM so that NEON load by Bob Wilson · 15 years ago
  78. da2d8e1 eliminate an old SelectionDAG::getTruncStore method, propagating by Chris Lattner · 15 years ago
  79. 5cd9391 eliminate last SelectionDAG::getLoad old entrypoint, on to stores. by Chris Lattner · 15 years ago
  80. d0e139f fix the code that infers SV info to be correct when dealing by Chris Lattner · 15 years ago
  81. 3d6ccfb propagate MachinePointerInfo through various uses of the old by Chris Lattner · 15 years ago
  82. ecf42c4 continue MachinePointerInfo'izing, eliminating use of one of the old by Chris Lattner · 15 years ago
  83. fa45901 convert dagcombine off the old form of getLoad. This fixes several bugs by Chris Lattner · 15 years ago
  84. f165806 simplify DAGCombiner::SimplifySelectOps step #2/2. by Chris Lattner · 15 years ago
  85. 1806161 substantially reduce indentation and simplify DAGCombiner::SimplifySelectOps. by Chris Lattner · 15 years ago
  86. 85ca106 a few more trivial updates. This fixes PerformInsertVectorEltInMemory to not by Chris Lattner · 15 years ago
  87. e72f202 reimplement memcpy/memmove/memset lowering to use MachinePointerInfo by Chris Lattner · 15 years ago
  88. 5c5cb2a add overloads for SelectionDAG::getLoad, getStore, getTruncStore that take a by Chris Lattner · 15 years ago
  89. e9ba5dd simplify interface to SelectionDAG::getMemIntrinsicNode, making it take a MachinePointerInfo by Chris Lattner · 15 years ago
  90. 60bddc8 chagne interface to SelectionDAG::getAtomic to take a MachinePointerInfo, by Chris Lattner · 15 years ago
  91. 0531356 don't implicitly drop the offset of a machinememoperand when legalizing atomics. by Chris Lattner · 15 years ago
  92. 93a95ae force clients of MachineFunction::getMachineMemOperand to provide a by Chris Lattner · 15 years ago
  93. 4a9f150 When TCO is turned on, it is possible to end up with aliasing FrameIndex's. Therefore, by Owen Anderson · 15 years ago
  94. 0dcc814 Revert r114312 while I sort out some issues. by Owen Anderson · 15 years ago
  95. d910fb2 Tentatively enabled DAGCombiner Alias Analysis by default. As far as I know, by Owen Anderson · 15 years ago
  96. 14ac1dd Invert the logic of reachesChainWithoutSideEffects(). What we want to check is that there is by Owen Anderson · 15 years ago
  97. 27ede1b Check bb to ensure that alloca is in separate basic block. by Devang Patel · 15 years ago
  98. 1397fdc If dbg.declare from non-entry block is using alloca from entry block then use offset available in StaticAllocaMap to emit DBG_VALUE. Right now, this has no material impact because varible info also collected using offset table maintained in machine module info. by Devang Patel · 15 years ago
  99. 6fe75aa Use frame index, if available for byval argument while lowering dbg_declare. Otherwise let getRegForValue() find register for this argument. by Devang Patel · 15 years ago
  100. 3a210e2 Revert "CMake: Get rid of LLVMLibDeps.cmake and export the libraries normally." by Michael J. Spencer · 15 years ago