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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / cfe33c46aa50f04adb0431243e7d25f79b719ac6 / lib / CodeGen / SelectionDAG
  1. cfe33c4 by David Greene · 15 years ago
  2. d2c9793 While legalizing SDValues do not drop SDDbgValues, trasfer them to new legal nodes. by Devang Patel · 15 years ago
  3. 6f121fd Process valid SDDbgValues even if the node does not have any order assigned. by Devang Patel · 15 years ago
  4. 55d20e8 Refactor. by Devang Patel · 15 years ago
  5. 9158509 by David Greene · 15 years ago
  6. a2e868d Provide an interface to transfer SDDbgValue from one SDNode to another. by Devang Patel · 15 years ago
  7. 8f31428 by Devang Patel · 15 years ago
  8. 3a00ffa This assertion is too restrictive, it does not apply for dangling dbg value nodes (nodes where dbg.value intrinsic preceds use of the value). by Devang Patel · 15 years ago
  9. a3ee3ef Speculatively revert r124138. by Devang Patel · 15 years ago
  10. 224a180 Resolve DanglingDbgValue of PHI nodes where the use follows dbg.value intrinisic. by Devang Patel · 15 years ago
  11. c48d50f Temporarily workaround JM/lencod miscompile (SIGSEGV). rdar://problem/8893967 by Andrew Trick · 15 years ago
  12. 584520e Null initialize a few variables flagged by by Ted Kremenek · 15 years ago
  13. d1dace8 Enable support for precise scheduling of the instruction selection by Andrew Trick · 15 years ago
  14. c8bfd1d Convert -enable-sched-cycles and -enable-sched-hazard to -disable by Andrew Trick · 15 years ago
  15. 6214373 My editor's indent went crazy. Fix. by Eric Christopher · 15 years ago
  16. 0205098 Expand invalid return values for umulo and smulo. Handle these similarly by Eric Christopher · 15 years ago
  17. 0bc3086 Selection DAG scheduler register pressure heuristic fixes. by Andrew Trick · 15 years ago
  18. e338581 Use only one API at a time. by Eric Christopher · 15 years ago
  19. 38a1826 If we can, lower the multiply part of a umulo/smulo call to a libcall by Eric Christopher · 15 years ago
  20. 955ed73 Remove unused variables found by gcc-4.6's -Wunused-but-set-variable. by Jeffrey Yasskin · 15 years ago
  21. f224322 Remove checking that prevented overlapping CALLSEQ_START/CALLSEQ_END by Stuart Hastings · 15 years ago
  22. c9b6a3e Fix an off-by-one error in ctpop combining. by Benjamin Kramer · 15 years ago
  23. d822892 Add a DAGCombine to turn (ctpop x) u< 2 into (x & x-1) == 0. by Benjamin Kramer · 15 years ago
  24. b99fdee reapply my fix for PR8961 with a tweak to properly handle by Chris Lattner · 15 years ago
  25. 5df5a22 Add an assert so we don't silently miscompile ctpop for bit widths > 128. by Benjamin Kramer · 15 years ago
  26. b6516ae Reimplement CTPOP legalization with the "best" algorithm from by Benjamin Kramer · 15 years ago
  27. ca5f616 Delete an assignment to ThisBB which isn't needed, and tidy up some comments. by Dan Gohman · 15 years ago
  28. f697c8a Support for precise scheduling of the instruction selection DAG, by Andrew Trick · 15 years ago
  29. 67d9891 Set the insertion point correctly for instructions generated by load folding: by Chris Lattner · 15 years ago
  30. dd11ea4 Fix r123346 to handle scalar types too. by Dan Gohman · 15 years ago
  31. b866543 Apply the patch from PR8958, which allows llc to get slightly by Dan Gohman · 15 years ago
  32. 93c7042 Move ExpandAtomic into the integer expansion routines - it's only used there. by Eric Christopher · 15 years ago
  33. 97fd9a5 Fix PR 8916 (qv for analysis), at least the immediate problem. by Dale Johannesen · 15 years ago
  34. 16c29b5 Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there. by Anton Korobeynikov · 15 years ago
  35. c9df025 Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic. by Jakob Stoklund Olesen · 15 years ago
  36. 4314268 Replace TargetRegisterInfo::printReg with a PrintReg class that also works without a TRI instance. by Jakob Stoklund Olesen · 15 years ago
  37. 358de24 Use an IndexedMap for LiveOutRegInfo to hide its dependence on TargetRegisterInfo::FirstVirtualRegister. by Jakob Stoklund Olesen · 15 years ago
  38. c36b706 Do not model all INLINEASM instructions as having unmodelled side effects. by Evan Cheng · 15 years ago
  39. 5e8b833 Add ARM patterns to match EXTRACT_SUBVECTOR nodes. by Bob Wilson · 15 years ago
  40. 6736e19 Change EXTRACT_SUBVECTOR to require a constant index. by Bob Wilson · 15 years ago
  41. d9aa800 Fix the other problem reported in PR8582. Testcase and patch by Nadav Rotem. by Duncan Sands · 15 years ago
  42. 8d93d19 Add some fairly duplicated code to let type legalization split illegal by Eric Christopher · 15 years ago
  43. 0521928 Re-implement r122936 with proper target hooks. Now getMaxStoresPerMemcpy by Evan Cheng · 15 years ago
  44. 255874f Revert r122936. I'll re-implement the change. by Evan Cheng · 15 years ago
  45. 9a9d847 r105228 reduced the memcpy / memset inline limit to 4 with -Os to avoid blowing by Evan Cheng · 15 years ago
  46. d08e5b4 Avoid zero extend bit test operands to pointer type if all the masks fit in by Evan Cheng · 15 years ago
  47. 0b71d39 Optimize: by Evan Cheng · 15 years ago
  48. 762a17a 80-cols. by Eric Christopher · 15 years ago
  49. 2d31d14 Remove TODO, these appear to be implemented. by Eric Christopher · 15 years ago
  50. 8022036 Try to reuse the value when lowering memset. by Benjamin Kramer · 15 years ago
  51. 8c06aa1 Lower the i8 extension in memset to a multiply instead of a potentially long series of shifts and ors. by Benjamin Kramer · 15 years ago
  52. a75ce9f Minor cleanup related to my latest scheduler changes. by Andrew Trick · 15 years ago
  53. 2431223 Fix a few cases where the scheduler is not checking for phys reg copies. The scheduling node may have a NULL DAG node, yuck. by Andrew Trick · 15 years ago
  54. 2da8bc8 Various bits of framework needed for precise machine-level selection by Andrew Trick · 15 years ago
  55. 6e8f4c4 whitespace by Andrew Trick · 15 years ago
  56. 29d8f0c flags -> glue for selectiondag by Chris Lattner · 15 years ago
  57. a4359be sdisel flag -> glue. by Chris Lattner · 15 years ago
  58. 2902736 Reorganize ListScheduleBottomUp in preparation for modeling machine cycles and instruction issue. by Andrew Trick · 15 years ago
  59. 3d420cb Converted LiveRegCycles to LiveRegGens. It's easier to work with and allows multiple nodes per cycle. by Andrew Trick · 15 years ago
  60. cb7947b8 In CheckForLiveRegDef use TRI->getOverlaps. by Andrew Trick · 15 years ago
  61. 1b16587 Fixes PR8823: add-with-overflow-128.ll by Andrew Trick · 15 years ago
  62. 8e68c38 Change all self assignments X=X to (void)X, so that we can turn on a by Jeffrey Yasskin · 15 years ago
  63. f50125e DAGCombine add (sext i1), X into sub X, (zext i1) if sext from i1 is illegal. The latter usually compiles into smaller code. by Benjamin Kramer · 15 years ago
  64. cbf68df Fix a bug in ReduceLoadWidth that wasn't handling extending by Chris Lattner · 15 years ago
  65. 7a2a7fa more cleanups, move a check for "roundedness" earlier to reject by Chris Lattner · 15 years ago
  66. 4c32bc2 reduce indentation and improve comments, no functionality change. by Chris Lattner · 15 years ago
  67. feac098 In DelayForLiveRegsBottomUp, handle instructions that read and write by Andrew Trick · 15 years ago
  68. 38036d8 whitespace by Andrew Trick · 15 years ago
  69. c72b18c Reapply 122353-122355 with fixes. 122354 was wrong; by Dale Johannesen · 15 years ago
  70. d0cf258 Revert 122353-122355 for the moment, they broke stuff. by Dale Johannesen · 15 years ago
  71. a83bf35 Add a new transform to DAGCombiner. by Dale Johannesen · 15 years ago
  72. 5ecc340 Get the type of a shift from the shift, not from its shift by Dale Johannesen · 15 years ago
  73. efc96dd Shift by the word size is invalid IR; don't create it. by Dale Johannesen · 15 years ago
  74. 90b0364 fix some typos by Chris Lattner · 15 years ago
  75. 56500ed Fix indentation, add comment. by Stuart Hastings · 15 years ago
  76. 2965e69 Missing logic for nested CALLSEQ_START/END. by Stuart Hastings · 15 years ago
  77. f1b4eaf rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for by Chris Lattner · 15 years ago
  78. 5df1578 improve "cannot yet select" errors a trivial amount: now by Chris Lattner · 15 years ago
  79. 025cc6e Cosmetic changes. by Dale Johannesen · 15 years ago
  80. 5c3d4f0 implement type legalization promotion support for SMULO and UMULO, giving by Chris Lattner · 15 years ago
  81. 3794498 Fix a bug in the scheduler's handling of "unspillable" vregs. Imagine we see: by Chris Lattner · 15 years ago
  82. 142d21c the result of CheckForLiveRegDef is dead, remove it. by Chris Lattner · 15 years ago
  83. 5078293 reduce indentation, no functionality change. by Chris Lattner · 15 years ago
  84. 476b242 Add missing standard headers. Patch by Joerg Sonnenberger! by Nick Lewycky · 15 years ago
  85. da60588 teach MaskedValueIsZero how to analyze ADDE. This is by Chris Lattner · 15 years ago
  86. 96ba57f fix PR8642: if a critical edge has a PHI value that can trap, by Chris Lattner · 15 years ago
  87. d727343 Fix a DAGCombiner crash when folding binary vector operations with constant by Bob Wilson · 15 years ago
  88. f5daf8b Add a transform to DAG Combiner. This improves the by Dale Johannesen · 15 years ago
  89. 495de3b Fix crash compiling a QQQQ REG_SEQUENCE for a Neon vld3_lane operation. by Bob Wilson · 15 years ago
  90. 33e77d3 take care of some todos, transforming [us]mul_lohi into by Chris Lattner · 15 years ago
  91. 1a0fbe2 when transforming a MULHS into a wider MUL, there is no need to SRA the by Chris Lattner · 15 years ago
  92. de1c360 Add a couple dag combines to transform mulhi/mullo into a wider multiply by Chris Lattner · 15 years ago
  93. d5b4db9 reduce indentation by using continue, no functionality change. by Chris Lattner · 15 years ago
  94. a30b7d2 Catch attempts to remove a deleted node from the CSE maps. Better to by Duncan Sands · 15 years ago
  95. a304d02 Initial support for nested CALLSEQ_START/CALLSEQ_END constructs in LegalizeDAG. by Stuart Hastings · 15 years ago
  96. 503a64d 80-col fixups. by Eric Christopher · 15 years ago
  97. bece048 Reword comment slightly. by Eric Christopher · 15 years ago
  98. 40f8f62 PR5207: Change APInt methods trunc(), sext(), zext(), sextOrTrunc() and by Jay Foad · 15 years ago
  99. afeaae7 If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0. by Devang Patel · 15 years ago
  100. 3069cbf Remove unneeded zero arrays. by Benjamin Kramer · 15 years ago