- a422294 test/CodeGen/X86/vec_shuffle-39.ll: Add explicit -mtriple=x86_64-linux. Passing packed value is not compatible on Win32 x64. by NAKAMURA Takumi · 13 years ago
- 916d644 test/CodeGen/X86/vec_shuffle-38.ll: Relax expression for Win32 x64. by NAKAMURA Takumi · 13 years ago
- 5fb870d test/CodeGen/X86/vec_shuffle.ll: Add explicit -mtriple=i686-linux. We may see some suboptimal frame (%ebp) emission on certain hosts. Possible [PR11031] by NAKAMURA Takumi · 13 years ago
- 9f1f26a Make sure to mark vector extload's as expand on ARM. Fixes PR11319. by Eli Friedman · 13 years ago
- 2efa35f Add a bunch of calls to RemoveDeadNode in LegalizeDAG, so legalization doesn't get confused by CSE later on. Fixes PR11318. by Eli Friedman · 13 years ago
- 7bc389b Add x86 isel logic and patterns to match movlps from clang generated IR for _mm_loadl_pi(). rdar://10134392, rdar://10050222 by Evan Cheng · 13 years ago
- 0d69097 Convert to the new EH model. by Bill Wendling · 13 years ago
- 8b7d769 Convert to the new EH model. by Bill Wendling · 13 years ago
- 30ceba3 Convert tests to the new EH model. by Bill Wendling · 13 years ago
- 0eff39f Enable support for returning i1, i8, and i16. Nothing special todo as it's the by Chad Rosier · 13 years ago
- 02e5fb0 Added missing newline by Pete Cooper · 13 years ago
- 58dd0fe Revert r144034 while I try to track down a crash. by Eli Friedman · 13 years ago
- 61f46de Fix test for Windows as well. by Jakob Stoklund Olesen · 13 years ago
- b26c772 Kill and collapse outstanding DomainValues. by Jakob Stoklund Olesen · 13 years ago
- a29fc80 InstCombine now optimizes vector udiv by power of 2 to shifts by Pete Cooper · 13 years ago
- 1b4f6f2 Add a bunch of calls to RemoveDeadNode in LegalizeDAG, so legalization doesn't get confused by CSE later on. Fixes PR11318. by Eli Friedman · 13 years ago
- 70be28a Simplify some uses of utohexstr. by Benjamin Kramer · 13 years ago
- 32dd4eb Fix test for Linux. by Jakob Stoklund Olesen · 13 years ago
- 3e5d5c5 Expand V_SET0 to xorps by default. by Jakob Stoklund Olesen · 13 years ago
- 4c763ee Add AVX2 variable shift instructions and intrinsics. by Craig Topper · 13 years ago
- 2869204 Add AVX2 VPMOVMASK instructions and intrinsics. by Craig Topper · 13 years ago
- 69f5df7 Add AVX2 VEXTRACTI128 and VINSERTI128 instructions. Fix VPERM2I128 to be qualified with HasAVX2 instead of HasAVX. Mark VINSERTF128 and VEXTRACTF128 as never having side effects. by Craig Topper · 13 years ago
- c8eb880 More AVX2 instructions and their intrinsics. by Craig Topper · 13 years ago
- 27e5d0c Add more AVX2 instructions and intrinsics. by Craig Topper · 13 years ago
- 42536af Add support for passing i1, i8, and i16 call parameters. Also, be sure to by Chad Rosier · 13 years ago
- 7494a12 Update lit's list of tools. by Benjamin Kramer · 13 years ago
- c25c908 Add an option to pad an uleb128 to MCObjectWriter and remove the uleb128 encoding from the DWARF asm printer. by Benjamin Kramer · 13 years ago
- 336b88d Do simple cross-block DSE when we encounter a free statement. Fixes PR11240. by Nick Lewycky · 13 years ago
- bd00a93 Enhanced vzeroupper insertion pass that avoids inserting vzeroupper where it is unnecessary through local analysis. Patch from Bruno Cardoso Lopes, with some additional changes. by Eli Friedman · 13 years ago
- a54c8ea build/cmake: Change to require Python be available. by Daniel Dunbar · 13 years ago
- aa25727 Add triple to test. by Rafael Espindola · 13 years ago
- b052728 Emit declarations before definitions if they are available. This causes DW_AT_specification to by Rafael Espindola · 13 years ago
- abe776a Add tests for existing InstSimplify features. by Dan Gohman · 13 years ago
- 71d0503 Teach instsimplify to simplify calls to undef. by Dan Gohman · 13 years ago
- 517497c Add intrinsics for X86 vcvtps2ph and vcvtph2ps instructions by Craig Topper · 13 years ago
- f470cbb Add fast-isel support for returning i1, i8, and i16. by Chad Rosier · 13 years ago
- 28eb1c5 Speculatively revert "DeadStoreElimination can now trim the size of a store if by Daniel Dunbar · 13 years ago
- 65fd656 Reapply r143206, with fixes. Disallow physical register lifetimes by Dan Gohman · 13 years ago
- 71fccad Reverted r143600 - selector reference change by Pete Cooper · 13 years ago
- e1f38f2 fixed global array handling for ptx to use the correct bit widths by Dan Bailey · 13 years ago
- 2d32b86 DeadStoreElimination can now trim the size of a store if the end of it is dead. by Pete Cooper · 13 years ago
- 98e0b9c Add new X86 AVX2 VBROADCAST instructions. by Craig Topper · 13 years ago
- 463fe24 Add support for sign-extending non-legal types in SelectSIToFP(). by Chad Rosier · 13 years ago
- d1ffc73 Treat objc selector reference globals as invariant so that MachineLICM can hoist them out of loops. Fixes <rdar://problem/6027699> by Pete Cooper · 13 years ago
- 1a1d1fc Try to lower memset/memcpy/memmove to vector instructions on ARM where the alignment permits. by Lang Hames · 13 years ago
- 985cc35 I added the first test to run llvm-dwarfdump. by Nick Lewycky · 13 years ago
- 6c1a703 Don't emit a directory entry for the value in DW_AT_comp_dir, that is always by Nick Lewycky · 13 years ago
- e07cd5e Add support for comparing integer non-legal types. by Chad Rosier · 13 years ago
- 81550dc Fix the issue that r143552 was trying to address the _right_ way. One-register lists are legal on LDM/STM instructions, but we should not print the PUSH/POP aliases when they appear. This fixes round tripping on this instruction. by Owen Anderson · 13 years ago
- 0738e76 tests: Clean up tests/CMakeLists.txt to drop some variable configuration we no by Daniel Dunbar · 13 years ago
- d3714b6 Rewrite LinearFunctionTestReplace to handle pointer-type IVs. by Andrew Trick · 13 years ago
- 205e337 More AVX2 instructions and intrinsics. by Craig Topper · 13 years ago
- 3f2b2c2 Add a bunch more X86 AVX2 instructions and their corresponding intrinsics. by Craig Topper · 13 years ago
- 3129da8 Broaden an assert to handle enable-iv-rewrite=true following r143183. by Andrew Trick · 13 years ago
- 064e48a Fixed a bug in the code to create a dwarf file and directory table entires when by Kevin Enderby · 13 years ago
- 60cb643 Fix disassembly of some VST1 instructions. by Owen Anderson · 13 years ago
- f6aa6b1 Teach the x86 backend a couple tricks for dealing with v16i8 sra by a constant splat value. Fixes PR11289. by Eli Friedman · 13 years ago
- 0e6c1c5 Don't fold negative offsets into cp / dp accesses to avoid relocation errors. by Richard Osborne · 13 years ago
- 441ed4a Combine various XCore tests for floating point intrinsic support into a single test. by Richard Osborne · 13 years ago
- 70ad395 Move various XCore tests to FileCheck by Richard Osborne · 13 years ago
- ce7de9f Fix operand type for x86 pmadd_ub_sw intrinsic. by Craig Topper · 13 years ago
- 049260d Make sure we use the right insertion point when instcombine replaces a PHI with another instruction. (Specifically, don't insert an arbitrary instruction before a PHI.) Fixes PR11275. by Eli Friedman · 13 years ago
- dc9414d Move x86-specific tests into X86 folder. by Eli Friedman · 13 years ago
- 9c06bc7 Move another test requiring x86 into X86 directory. by Eli Friedman · 13 years ago
- f001fe7 Move test requiring x86 backend into X86 directory. by Eli Friedman · 13 years ago
- 11f9987 Change the actual tests to match the input directory rename (duh) by Matt Beaumont-Gay · 13 years ago
- be7a772 Rename "TestObjectFiles" to "Inputs" (like the pattern for Clang tests) by Matt Beaumont-Gay · 13 years ago
- 5e6d548 Move test to the X86 directory, note the PR number and only run MC once. by Rafael Espindola · 13 years ago
- fb6ab2b More not-crashing NEON disassembly updates for the vld refactoring. by Owen Anderson · 13 years ago
- 782c8fb Fix operand type for int_x86_ssse3_phadd_sw_128 intrinsic by Craig Topper · 13 years ago
- 593c1d9 Test case for X86 FS/GS Base intrinsics by Craig Topper · 13 years ago
- 6b1c5fc Begin adding AVX2 instructions. No selection support yet other than intrinsics. by Craig Topper · 13 years ago
- 4e478fe Switch new .file directive emission off by default, change llc's flag for it to by Nick Lewycky · 13 years ago
- 6dc9e2b Reapply commit 143214 with a fix: m_ICmp doesn't match conditions by Duncan Sands · 13 years ago
- dade3c1 X86: Emit logical shift by constant splat of <16 x i8> as a <8 x i16> shift and zero out the bits where zeros should've been shifted in. by Benjamin Kramer · 13 years ago
- 6762427 Fix return type for X86 mpsadbw instrinsic. The instruction takes in a vector of 8-bit integers, but produces a vector of 16-bit integers. by Craig Topper · 13 years ago
- fb0dfbb by Nadav Rotem · 13 years ago
- 5157588 Stabilize the test by specifying an exact cpu target by Nadav Rotem · 13 years ago
- b00418a Add a new DAGCombine optimization for BUILD_VECTOR. by Nadav Rotem · 13 years ago
- f86545e Force SSE for this test. by Benjamin Kramer · 13 years ago
- 59e43bd SimplifyLibCalls: Use IRBuilder.CreateGlobalString when creating a string for printf->puts, which correctly sets the unnamed_addr bit on the resulting GlobalVariable. by Benjamin Kramer · 13 years ago
- 09c3253 Revert r143214; it's breaking a bunch of stuff. by Eli Friedman · 13 years ago
- 6f3ddef Revert r143206, as there are still some failing tests. by Dan Gohman · 13 years ago
- 29ceb7c test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll: [PR11218] Mark "REQUIRES: asserts" for now. by NAKAMURA Takumi · 13 years ago
- 89a6337 Add Thumb2 alias for "mov Rd, #imm" to "mvn Rd, #~imm". by Jim Grosbach · 13 years ago
- 017f87c Fix illegal disassembly testcase. by Owen Anderson · 13 years ago
- 012f854 The expression icmp eq (select (icmp eq x, 0), 1, x), 0 folds to false. by Duncan Sands · 13 years ago
- 4604fc7 A shift of a power of two is a power of two or zero. by Duncan Sands · 13 years ago
- c65c747 Fold icmp ugt (udiv X, Y), X to false. Spotted by my super-optimizer by Duncan Sands · 13 years ago
- cb9fed6 Reapply r143202, with a manual decoding hook for SWP. This change inadvertantly exposed a decoding ambiguity between SWP and CPS that the auto-generated decoder can't handle. by Owen Anderson · 13 years ago
- bf923b8 Reapply r143177 and r143179 (reverting r143188), with scheduler by Dan Gohman · 13 years ago
- 5d0492c Thumb2 ADD/SUB instructions encoding selection outside IT block. by Jim Grosbach · 13 years ago
- 398daae test/MC/AsmParser/2011-09-06-NoNewline.s: Add explicit -mtriple=i386. It uses X86 instruction. by NAKAMURA Takumi · 13 years ago
- c3e48c3 Dwarf: [PR11022] Fix emitting DW_AT_const_value(>i64), to be host-endian-neutral. by NAKAMURA Takumi · 13 years ago
- 5c56f0b test/CodeGen/X86/2010-08-10-DbgConstant.ll: Add explicit -mtriple=i686-linux. It must be for elf! by NAKAMURA Takumi · 13 years ago
- 62c1d00 Speculatively disable Dan's commits 143177 and 143179 to see if by Duncan Sands · 13 years ago
- 6a7efcf Always use the string pool, even when it makes the .o larger. This may help by Nick Lewycky · 13 years ago
- 6f2dd7e LFTR should avoid a type mismatch with null pointer IVs. by Andrew Trick · 13 years ago
- 2ba60e5 Eliminate LegalizeOps' LegalizedNodes map and have it just call RAUW by Dan Gohman · 13 years ago
- c73d73e ARM Allow 'q' registers in VLD/VST vector lists. by Jim Grosbach · 13 years ago