- d9f3c48 The X86 target will soon have an implementation of createFastISel. by Dan Gohman · 17 years ago
- 140be2d Add support for 8 and 16 bit forms of __sync builtins on X86. by Dale Johannesen · 17 years ago
- 475871a Rename SDOperand to SDValue. by Dan Gohman · 17 years ago
- 30a0de9 SSE codegen for vsetcc nodes by Nate Begeman · 17 years ago
- 126d907 Rather than having a different custom legalization by Duncan Sands · 17 years ago
- 2887310 Added MemOperands to Atomic operations since Atomics touches memory. by Mon P Wang · 17 years ago
- 507a58a add missing atomic intrinsic from gcc by Andrew Lenharth · 17 years ago
- 83ec4b6 Wrap MVT::ValueType in a struct to get type safety by Duncan Sands · 17 years ago
- f26ffe9 Implement vector shift up / down and insert zero with ps{rl}lq / ps{rl}ldq. by Evan Cheng · 17 years ago
- 0ef8de3 Fix typos and comments. by Evan Cheng · 17 years ago
- f0df031 Make use of vector load and store operations to implement memcpy, memmove, and memset. Currently only X86 target is taking advantage of these. by Evan Cheng · 17 years ago
- c9f5f3f Change target-specific classes to use more precise static types. by Dan Gohman · 17 years ago
- c2616e4 Initial X86 codegen support for VSETCC. by Nate Begeman · 17 years ago
- ad4196b Refactor isConsecutiveLoad from X86 to TargetLowering so DAG combiner can make use of it. by Evan Cheng · 17 years ago
- 9018e83 For now, abort when an ISD::VAARG is encountered on x86-64, rather by Dan Gohman · 17 years ago
- d880b97 Handle a few more cases of folding load i64 into xmm and zero top bits. by Evan Cheng · 17 years ago
- 7e2ff77 Handle vector move / load which zero the destination register top bits (i.e. movd, movq, movss (addr), movsd (addr)) with X86 specific dag combine. by Evan Cheng · 17 years ago
- 63307c3 Added addition atomic instrinsics and, or, xor, min, and max. by Mon P Wang · 17 years ago
- 30e62c0 Tail call optimization improvements: by Arnold Schwaighofer · 17 years ago
- 1f13c68 Fix the SVOffset values for loads and stores produced by by Dan Gohman · 17 years ago
- 5e76423 A few inline asm cleanups: by Chris Lattner · 17 years ago
- 302cd54 Remove X86_64SRet; it isn't used anymore. by Dan Gohman · 17 years ago
- 29e4bdb Fix const-correctness issues with the SrcValue handling in the by Dan Gohman · 17 years ago
- 4b5324a This patch corrects the handling of byval arguments for tailcall by Arnold Schwaighofer · 17 years ago
- 707e018 Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not Legal by Dan Gohman · 17 years ago
- 7d8143f Make isVectorClearMaskLegal's operand list const. by Dan Gohman · 17 years ago
- 920c37a remove Evan's "ugly hack" that sorta attempted to get by Chris Lattner · 17 years ago
- 4fe3073 Don't loose incoming argument registers. Fix documentation style. by Arnold Schwaighofer · 17 years ago
- 8e6da15 Eliminate the FP_GET_ST0/FP_SET_ST0 target-specific dag nodes, just lower to by Chris Lattner · 17 years ago
- 5b8f82e Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC's by Scott Michel · 17 years ago
- afb23f4 rename FP_SETRESULT -> FP_SET_ST0 by Chris Lattner · 17 years ago
- 6fa2f9c rename FpGETRESULT32 -> FpGET_ST0_32 etc. Add support for by Chris Lattner · 17 years ago
- 6fd599f Add a target lowering hook to control whether it's worthwhile to compress fp constant. by Evan Cheng · 17 years ago
- d19189e 64bit CAS on 32bit x86. by Andrew Lenharth · 17 years ago
- 26ed869 all but CAS working on x86 by Andrew Lenharth · 17 years ago
- 258bb1b Refactor according to Evan's and Anton's suggestions. by Arnold Schwaighofer · 17 years ago
- 865c681 Change the lowering of arguments for tail call optimized by Arnold Schwaighofer · 17 years ago
- efec751 - When DAG combiner is folding a bit convert into a BUILD_VECTOR, it should check if it's essentially a SCALAR_TO_VECTOR. Avoid turning (v8i16) <10, u, u, u> to <10, 0, u, u, u, u, u, u>. Instead, simply convert it to a SCALAR_TO_VECTOR of the proper type. by Evan Cheng · 17 years ago
- 977a76f Simplify some logic in ComputeMaskedBits. And change ComputeMaskedBits by Dan Gohman · 18 years ago
- fd29e0e Convert SelectionDAG::ComputeMaskedBits to use APInt instead of uint64_t. by Dan Gohman · 18 years ago
- 14d12ca Enable SSE4 codegen and pattern matching. Add some notes to the README. by Nate Begeman · 18 years ago
- 6f0d024 Rename MRegisterInfo to TargetRegisterInfo. by Dan Gohman · 18 years ago
- 1a02486 Rename ISD::FLT_ROUNDS to ISD::FLT_ROUNDS_ to avoid conflicting by Dan Gohman · 18 years ago
- ff9b373 Even though InsertAtEndOfBasicBlock is an ugly hack it still deserves a proper name. Rename it to EmitInstrWithCustomInserter since it does not necessarily insert by Evan Cheng · 18 years ago
- 0d9e976 Work in progress. This patch *fixes* x86-64 calls which are modelled as StructRet but really should be return in registers, e.g. _Complex long double, some 128-bit aggregates. This is a short term solution that is necessary only because llvm, for now, cannot model i128 nor call's with multiple results. by Evan Cheng · 18 years ago
- ba2a0b9 Handle 'X' constraint in asm's better. by Dale Johannesen · 18 years ago
- 2928650 Let each target decide byval alignment. For X86, it's 4-byte unless the aggregare contains SSE vector(s). For x86-64, it's max of 8 or alignment of the type. by Evan Cheng · 18 years ago
- 3d66185 make a method public by Chris Lattner · 18 years ago
- 7863116 make it more clear that this predicate only applies to scalar FP types. by Chris Lattner · 18 years ago
- 1956d15 introduce a isTypeInSSEReg predicate, which allows us to simplify by Chris Lattner · 18 years ago
- da68d30 no need to expand ISD::TRAP to X86ISD::TRAP, just match ISD::TRAP. by Chris Lattner · 18 years ago
- 66fac79 For PR1839: add initial support for __builtin_trap. llvm-gcc part is missed by Anton Korobeynikov · 18 years ago
- 8673766 Refactoring the x86 and x86-64 calling convention implementations, by Gordon Henriksen · 18 years ago
- 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 18 years ago
- 18efe26 Implement ctlz and cttz with bsr and bsf. by Evan Cheng · 18 years ago
- 27a6c73 Several changes: by Chris Lattner · 18 years ago
- 45b22fa Implement codegen for flt_rounds on x86 by Anton Korobeynikov · 18 years ago
- cc41586 Much improved pic jumptable codegen: by Evan Cheng · 18 years ago
- f1ba1ca Move the LowerMEMCPY and LowerMEMCPYCall to a common place. by Rafael Espindola · 18 years ago
- 3c3ddb3 Enable more fold (sext (load x)) -> (sext (truncate (sextload x))) by Evan Cheng · 18 years ago
- 2bd122c Loosen up iv reuse to allow reuse of the same stride but a larger type when truncating from the larger type to smaller type is free. by Evan Cheng · 18 years ago
- c85e171 Added tail call optimization to the x86 back end. It can be by Arnold Schwaighofer · 18 years ago
- 6d60cac LowerIntegerDivOrRem no longer exists. by Dan Gohman · 18 years ago
- 525178c Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} to by Dan Gohman · 18 years ago
- e5f6204 Enabling new condition code modeling scheme. by Evan Cheng · 18 years ago
- 068317b Refactor the memcpy lowering for the x86 target. by Rafael Espindola · 18 years ago
- b94fc1b Fix a typo in a comment. by Dan Gohman · 18 years ago
- a37c9f7 When both x/y and x%y are needed (x and y both scalar integer), compute by Dan Gohman · 18 years ago
- 0488db9 Added support for new condition code modeling scheme (i.e. physical register dependency). These are a bunch of instructions that are duplicated so the x86 backend can support both the old and new schemes at the same time. They will be deleted after by Evan Cheng · 18 years ago
- f1fc3a8 Fix PR 1681. When X86 target uses +sse -sse2, by Dale Johannesen · 18 years ago
- 7d6ff3a X86ISD::TEST is dead. by Evan Cheng · 18 years ago
- 7effac5 Add support for functions with byval arguments on x86 by Rafael Espindola · 18 years ago
- 1b5dcc3 Initial support for calling functions with byval arguments on x86-64 by Rafael Espindola · 18 years ago
- 48884cd rename isOperandValidForConstraint to LowerAsmOperandForConstraint, by Chris Lattner · 18 years ago
- a2780e1 Move ReturnAddrIndex variable to X86MachineFunctionInfo structure. This fixed by Anton Korobeynikov · 18 years ago
- 61e729e More explicit keywords. by Dan Gohman · 18 years ago
- b116fac Trampoline codegen support for X86-32. by Duncan Sands · 18 years ago
- d300622 Re-apply 40504, but with a fix for the segfault it caused in oggenc: by Dan Gohman · 18 years ago
- 3e22947 Reverting 40504 for now. It's breaking oggenc. by Evan Cheng · 18 years ago
- d328383 Remove X86ISD::LOAD_PACK and X86ISD::LOAD_UA and associated code from the by Dan Gohman · 18 years ago
- 2365f51 Long live the exception handling! by Anton Korobeynikov · 18 years ago
- 2038252 Define non-intrinsic instructions for vector min, max, sqrt, rsqrt, and rcp, by Dan Gohman · 18 years ago
- ea859be Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from by Dan Gohman · 18 years ago
- 2f9bb1a Support for the special case of a vector with the canonical form: by Bill Wendling · 18 years ago
- b3a0417 Implement "general dynamic", "initial exec" and "local exec" TLS models for by Lauro Ramos Venancio · 18 years ago
- 57fc00d Implemented correct stack probing on mingw/cygwin for dynamic alloca's. by Anton Korobeynikov · 18 years ago
- eb8c74d remove some dead hooks by Chris Lattner · 18 years ago
- b445d0c remove some dead target hooks, subsumed by isLegalAddressingMode by Chris Lattner · 18 years ago
- c9addb7 implement the new addressing mode description hook. by Chris Lattner · 18 years ago
- 4234f57 switch TargetLowering::getConstraintType to take the entire constraint, by Chris Lattner · 18 years ago
- fa4bce2 repair x86 performance, dejagnu problems from previous change by Dale Johannesen · 18 years ago
- a8a155e More flexible TargetLowering LSR hooks for testing whether an immediate is by Evan Cheng · 18 years ago
- ae64219 X86-64 VACOPY needs custom expansion. va_list is a struct { i32, i32, i8*, i8* }. by Evan Cheng · 18 years ago
- 2db39b8 remove fastcc (not fastcall) support by Chris Lattner · 18 years ago
- 54e3efd add an accessor. by Chris Lattner · 18 years ago
- 09c75a4 pass the calling convention into Lower*CallTo, instead of using ad-hoc flags. by Chris Lattner · 18 years ago
- 3085e15 factor a bunch of code out of LowerCCCCallTo into a new LowerCallResult by Chris Lattner · 18 years ago
- cb18656 simplify result value lowering by splitting the selection of *where* to return by Chris Lattner · 18 years ago
- bcc5f36 Finish off bug 680, allowing targets to custom lower frame and return by Nate Begeman · 19 years ago
- b10308e Propagate changes from my local tree. This patch includes: by Anton Korobeynikov · 19 years ago