Gitiles
Code Review Sign In
gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / dab3d29605a5c83db41b28176273ef55961120c1
  1. dab3d29 Convert ConstantExpr::getGetElementPtr and by Jay Foad · 13 years ago
  2. 14732a1 Update llvm-gcc-4.2 and dragonegg after converting ConstantFolder APIs by Jay Foad · 13 years ago
  3. 12fc16f Convert ConstantFolder APIs to use ArrayRef. by Jay Foad · 13 years ago
  4. c30a38f move tier out of an anonymous namespace, it doesn't make sense by Chris Lattner · 13 years ago
  5. dbd4fe2 - Register v16i16 as valid VR256 register class by Bruno Cardoso Lopes · 13 years ago
  6. 65b74e1 Add support for 256-bit versions of VPERMIL instruction. This is a new by Bruno Cardoso Lopes · 13 years ago
  7. 9283b66 Improve splat promotion to handle AVX types: v32i8 and v16i16. Also by Bruno Cardoso Lopes · 13 years ago
  8. 0e87805 Add aditional patterns for vextractf128 instruction by Bruno Cardoso Lopes · 13 years ago
  9. df0e03c Add aditional patterns for vinsertf128 instruction by Bruno Cardoso Lopes · 13 years ago
  10. 11bbb20 Add v16i16 type to VR256 class by Bruno Cardoso Lopes · 13 years ago
  11. bca4781 Move code around. No functionality changes by Bruno Cardoso Lopes · 13 years ago
  12. 67727ca Tidy up code by Bruno Cardoso Lopes · 13 years ago
  13. c205a09 LSR, correct fix for rdar://9786536. Silly casting bug. by Andrew Trick · 13 years ago
  14. c2c988e LSR must sometimes sign-extend before generating double constants. by Andrew Trick · 13 years ago
  15. fb4eb16 Mark instructions which are part of the frame setup with the MachineInstr::FrameSetup flag. by Bill Wendling · 13 years ago
  16. 37eb38d LSR crashes on an empty IVUsers list. by Andrew Trick · 13 years ago
  17. 36c62d3 X86 is the only target that uses coff format. This should fixes test failures running on Windows, Cygwin, or MingW hosts. by Evan Cheng · 13 years ago
  18. e65b7ec docs/GettingStarted.html: Tweak style. by NAKAMURA Takumi · 13 years ago
  19. ee04a6d Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate ARM MC code from target. by Evan Cheng · 13 years ago
  20. 7bc3178 Remove unused function. by Bill Wendling · 13 years ago
  21. 16da736 Remove the now defunct getCompactUnwindEncoding method from the frame lowering code. by Bill Wendling · 13 years ago
  22. 3737b89 Refactor. by Devang Patel · 13 years ago
  23. 947431e docs/GettingStarted.html: Fix a typo and tweak a command line. by NAKAMURA Takumi · 13 years ago
  24. 40c7e41 There are two ways to map a variable to its lexical scope. Lexical scope information is embedded in MDNode describing the variable. It is also available as a part of DebugLoc attached with DBG_VALUE instruction. DebugLoc attached with an instruction is less reliable in optimized code so use information embedded in the MDNode. by Devang Patel · 13 years ago
  25. 7470325 Clean up includes of llvm/Analysis/ConstantFolding.h so it's included where it's used and not included where it isn't. by Eli Friedman · 13 years ago
  26. 4ec14b0 While emitting constant value, look through derived type and use underlying basic type to determine size and signness of the constant value. by Devang Patel · 13 years ago
  27. dde038a ARM PKH shift ammount operand printing tweaks. by Jim Grosbach · 13 years ago
  28. 73bfa4a Bring LICM into compliance with the new "Memory Model for Concurrent Operations" in LangRef. by Eli Friedman · 13 years ago
  29. 5b60e1b Commit LangRef changes for LLVM concurrency model. Start of supporting C++0x memory model and atomics. See thread on llvmdev titled "Reviving the new LLVM concurrency model". by Eli Friedman · 13 years ago
  30. c3d48ce Unbreak the MSVC build. Since the "next" function already exists in the MSVC headers, we need the explicit llvm:: qualifier to prevent a conflict. by Francois Pichet · 13 years ago
  31. 1769a3d Tidy up a bit. by Jim Grosbach · 13 years ago
  32. a0472dc ARM: Tidy up representation of PKH instruction. by Jim Grosbach · 13 years ago
  33. aeb7de7 Fix cmake again :) by Benjamin Kramer · 13 years ago
  34. 203576a Goodbye TargetAsmInfo. This eliminate last bit of CodeGen and Target in llvm-mc. by Evan Cheng · 13 years ago
  35. 8eda131 Fix cmake. by Benjamin Kramer · 13 years ago
  36. 685a250 Sketch out an CFG reconstruction mode for llvm-objdump. by Benjamin Kramer · 13 years ago
  37. a4d0bd8 Extend the hack for _GLOBAL_OFFSET_TABLE_ slightly; PR10389. by Eli Friedman · 13 years ago
  38. 88d1bc8 Add parsing/encoding tests for ARM ORR instruction. by Jim Grosbach · 13 years ago
  39. a678514 Consolidate ARM NOP encoding test. by Jim Grosbach · 13 years ago
  40. c3635c2 ARM parsing and encoding tests for MVN by Jim Grosbach · 13 years ago
  41. ab40f4b ARM assembly parsing of MUL instruction. by Jim Grosbach · 13 years ago
  42. 0381c21 PR10421: Fix a straightforward bug in the widening logic for CONCAT_VECTORS. by Eli Friedman · 13 years ago
  43. 9d999f5 Initialize the EHFrameSection pointer to zero. by Benjamin Kramer · 13 years ago
  44. 91e7ccd Regenerate configure and friends for Chad. by Eric Christopher · 13 years ago
  45. 626f52d Fix a GCC warning. by Jay Foad · 13 years ago
  46. 34ad6db - Move CodeModel from a TargetMachine global option to MCCodeGenInfo. by Evan Cheng · 13 years ago
  47. 4c81648 Include MCRegisterInfo to eliminate a compilation warning. by Evan Cheng · 13 years ago
  48. 5945848 Fix the CMake build. by Francois Pichet · 13 years ago
  49. e76a33b Add MCObjectFileInfo and sink the MCSections initialization code from by Evan Cheng · 13 years ago
  50. 86c9814 indvars: Added getInsertPointForUses to find a valid place to truncate the IV. by Andrew Trick · 13 years ago
  51. 13bcf2e indvars -disable-iv-rewrite: Add NarrowIVDefUse to cache def-use by Andrew Trick · 13 years ago
  52. e3345c4 X86Subtarget.h: Assume "x86_64-cygwin", though it has not been released yet, to appease test/CodeGen/X86 on cygwin. by NAKAMURA Takumi · 13 years ago
  53. 03c45f6 New pointer rotate test. by Eric Christopher · 13 years ago
  54. cf1e967 Extra semi-colon. by Eric Christopher · 13 years ago
  55. 9e92152 indvars test case for r135558. by Andrew Trick · 13 years ago
  56. f22d957 indvars -disable-iv-rewrite fix: derived GEP IVs by Andrew Trick · 13 years ago
  57. e236dc6 Don't leak CodeGenInfos. by Benjamin Kramer · 13 years ago
  58. de9416e Change name of class. by Akira Hatanaka · 13 years ago
  59. 32b7ebb Define classes for definitions of atomic instructions. by Akira Hatanaka · 13 years ago
  60. c8dad11 Build and install the archive when building the Apple way. by Bill Wendling · 13 years ago
  61. db54826 Lower memory barriers to sync instructions. by Akira Hatanaka · 13 years ago
  62. 70955c2 Fix an obvious typo that's preventing x86 (32-bit) from using .literal16. by Evan Cheng · 13 years ago
  63. 3610604 PR10386: Don't try to split an edge from an indirectbr. by Eli Friedman · 13 years ago
  64. 14c9246 Fix off-by-one. by Benjamin Kramer · 13 years ago
  65. b29b4dd Tweak ARM assembly parsing and printing of MSR instruction. by Jim Grosbach · 13 years ago
  66. c8fcfc9 Distinguish between two copies of one inlined variable. by Devang Patel · 13 years ago
  67. 80d01dd ARM assembly parsing of MRS instruction. by Jim Grosbach · 13 years ago
  68. f1a0090 Enhance the FixedLengthDecoder to be able to generate plausible-looking decoders for ARM. by Owen Anderson · 13 years ago
  69. bdd83fe Change variable name. by Akira Hatanaka · 13 years ago
  70. ccfd931 ARM assembly parsing for MRC/MRC2/MRRC/MRRC2. by Jim Grosbach · 13 years ago
  71. cc7ecc7 Use the correct opcodes: SLLV/SRLV or AND must be used instead of SLL/SRL or by Akira Hatanaka · 13 years ago
  72. 2317fe1 Move mr[r]c[2] ARM tests and tidy up a bit. by Jim Grosbach · 13 years ago
  73. 1a2be4d ARM testcases for MOVT. by Jim Grosbach · 13 years ago
  74. 4061da1 Use descriptive variable names. by Akira Hatanaka · 13 years ago
  75. 5f16057 ARM assembly parsing for MOV (register). by Jim Grosbach · 13 years ago
  76. 558b66d Tidy up. by Jim Grosbach · 13 years ago
  77. 731f209 Tighten conditional for 'mov' cc_out. by Jim Grosbach · 13 years ago
  78. 23336b4 Reapply r135457. This needs llvm-gcc change, that I forgot to check-in yesterday. by Devang Patel · 13 years ago
  79. ffa3225 ARM assembly parsing for MOV (immediate). by Jim Grosbach · 13 years ago
  80. 0ec2aa2 Whitespace. by Jim Grosbach · 13 years ago
  81. 5a18700 Remove unused code. by Jim Grosbach · 13 years ago
  82. 29af091 Fix comments. by Akira Hatanaka · 13 years ago
  83. 70564a9 Remove redundant instructions. by Akira Hatanaka · 13 years ago
  84. 81b4411 Separate code that modifies control flow from code that adds instruction to by Akira Hatanaka · 13 years ago
  85. 6bc1dbc ARM range checking for so_imm operands in assembly parsing. by Jim Grosbach · 13 years ago
  86. f51bb7c Revert "Make a provision to encode inline location in a variable. This will enable dwarf writer to easily distinguish between two instances of a inlined variable in one basic block." by Bob Wilson · 13 years ago
  87. 66fc541 Revert "Update docs to reflect r135457." by Bob Wilson · 13 years ago
  88. 7fc52e2 Convert ConstantFoldGetElementPtr to use ArrayRef. by Jay Foad · 13 years ago
  89. b9b54eb Convert SimplifyGEPInst to use ArrayRef. by Jay Foad · 13 years ago
  90. ca12a21 Convert gep_type_begin and gep_type_end to use ArrayRef. by Jay Foad · 13 years ago
  91. 8fbbb39 Convert TargetData::getIndexedOffset to use ArrayRef. by Jay Foad · 13 years ago
  92. 1d2f569 Use ArrayRef in ConstantFoldInstOperands and ConstantFoldCall. by Jay Foad · 13 years ago
  93. c8007ab Add intrinsics for the zext / sext instructions. by Richard Osborne · 13 years ago
  94. 829bef1 Add intrinsics for the testct, testwct instructions. by Richard Osborne · 13 years ago
  95. dee3dd9 Add intrinsics for the peek and endin instructions. by Richard Osborne · 13 years ago
  96. bb2518c Remove bogus test: for all possible inputs of %X, the 'sub nsw' is guaranteed by Nick Lewycky · 13 years ago
  97. 4396613 Introduce MCCodeGenInfo, which keeps information that can affect codegen by Evan Cheng · 13 years ago
  98. 939ece1 Make EmitAtomic functions return the correct MachineBasicBlocks so that by Akira Hatanaka · 13 years ago
  99. a308c67 Do not insert instructions in reverse order. by Akira Hatanaka · 13 years ago
  100. 9710f06 Make isLoadExtLegal and isTruncStoreLegal check what the name says. :) This might have some minor effect on CellSPU, but all other targets should be unaffected. Fixing per report from Damien Vincent on llvmdev. by Eli Friedman · 13 years ago