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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / dbf67fefeaccfeb53fb9d6098180ba1f29e682d5 / utils / TableGen
  1. dbf67fe Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers. by Evan Cheng · 15 years ago
  2. 93ca7b6 Update tablegen to generate shorts instead of chars for subgroup arrays. by Chandler Carruth · 15 years ago
  3. a6cb641 Add initial kill flag support to FastISel. by Dan Gohman · 15 years ago
  4. 7d9663c Fixes for Microsoft Visual Studio 2010, from Steven Watanabe! by Douglas Gregor · 15 years ago
  5. 1a8b789 Eliminated the classification of control registers into %ecr_ by Sean Callanan · 15 years ago
  6. 34dcc6f Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it by Dan Gohman · 15 years ago
  7. b63387a Re-apply 103156 and 103157. 103156 didn't break anything. 10315 exposed a coalescer bug that's fixed by 103170. by Evan Cheng · 15 years ago
  8. 44ed2c3 Fix some stylistic issues with my last commit. by Sean Hunt · 15 years ago
  9. d1dd5ed Add newline to end of file to avoid warning when building llvm with clang by Shantonu Sen · 15 years ago
  10. dc896a4 Include the right header for toupper by Sean Hunt · 15 years ago
  11. 84e2f95 Add an emitter to handle the list of clang statement nodes. by Sean Hunt · 15 years ago
  12. af1465b add the ability to associate 'category' names with clang diagnostics by Chris Lattner · 15 years ago
  13. 4f83e73 MC/Matcher: Add support for over-riding the default MatchInstruction function by Daniel Dunbar · 15 years ago
  14. b55c8be Add a pseudo instruction REG_SEQUENCE that takes a list of registers and by Evan Cheng · 15 years ago
  15. a0f914b Fixes to edis that mark x86 call targets as by Sean Callanan · 15 years ago
  16. 56a1afb When doing Thumb disassembly, there's no need to consider t2ADDrSPi12/t2SUBrSPi12, by Johnny Chen · 15 years ago
  17. acfb70f stop computing InstImpInputs, it is dead by Chris Lattner · 15 years ago
  18. 62bcec8 DAGInstruction::ImpOperands is dead after my recent tblgen work, zap it. by Chris Lattner · 15 years ago
  19. 928eb49 Make processor FUs unique for given itinerary. This extends the limit of 32 by Anton Korobeynikov · 15 years ago
  20. b357983 Fix a bunch of namespace polution. by Dan Gohman · 15 years ago
  21. be10811 EDis: Don't include inttypes.h. We support compilers which don't provide it. It was unused anyways. by Benjamin Kramer · 15 years ago
  22. 9899f70 Fixed a nasty layering violation in the edis source by Sean Callanan · 15 years ago
  23. 1808e4d If all the bit positions are not specified; do not decode the instructions. by Johnny Chen · 15 years ago
  24. ec80e26 Provide versions of the ARM eh_sjlj_setjmp instructions for non-VFP subtargets by Bob Wilson · 15 years ago
  25. e0c74fb ARM decoder emitter should print out useful information unconditionally when it by Johnny Chen · 15 years ago
  26. 2d16a67 Now that Evan Cheng has fixed the coalescer bug (r100804), the workaround code by Johnny Chen · 15 years ago
  27. 454c4ce Various MSVC warning fixes about truncated 64 bit shifts and const pointers passed to free. by Benjamin Kramer · 15 years ago
  28. 127dc5e Use errs instead of fprintf. by Benjamin Kramer · 15 years ago
  29. 8f993b8 Added support for ARM disassembly to edis. by Sean Callanan · 15 years ago
  30. 75361b6 rename llvm::llvm_report_error -> llvm::report_fatal_error by Chris Lattner · 15 years ago
  31. 5edca81 Fixed a bug where the disassembler would allow an immediate by Sean Callanan · 15 years ago
  32. 72666f2 Fix typo and correct comment somewhat. by Eric Christopher · 15 years ago
  33. 3c500e6 Re-enable ARM/Thumb disassembler and add a workaround for a memcpy() call in by Johnny Chen · 15 years ago
  34. 96085a3 Initial support for different kinds of FU reservation. by Anton Korobeynikov · 15 years ago
  35. fddb766 Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field. by Jakob Stoklund Olesen · 15 years ago
  36. 35c33bd change a ton of code to not implicitly use the "O" raw_ostream by Chris Lattner · 15 years ago
  37. 1e86e3f Fix a warning in GCC about a pointless typedef. by Chandler Carruth · 15 years ago
  38. b421640 Add the new ARMDecodeEmitter to CMake build. by Chandler Carruth · 15 years ago
  39. 55f7118 Move variable "Bits" declaration/definition into the DEBUG block where its usage by Johnny Chen · 15 years ago
  40. 493a441 Fixed build warning. by Johnny Chen · 15 years ago
  41. 9981814 Change from .../Support/DataTypes.h to .../System/DataTypes.h. by Johnny Chen · 15 years ago
  42. b68a3ee Second try of initial ARM/Thumb disassembler check-in. It consists of a tablgen by Johnny Chen · 15 years ago
  43. 283d1ce Switch pattern sorting predicate from stable sort -> sort, it by Chris Lattner · 15 years ago
  44. 4810736 revert 99795, as mentioned, it is disabled anyway. by Chris Lattner · 15 years ago
  45. a040124 Check in a (disabled) failed attempt to improve the ordering of by Chris Lattner · 15 years ago
  46. 48e86db print the complexity of the pattern being matched in the by Chris Lattner · 15 years ago
  47. 2a22cdc improve type checking of SDNode operand count. This rejects all cases by Chris Lattner · 15 years ago
  48. caa8870 finally remove the immAllOnesV_bc/immAllZerosV_bc patterns by Chris Lattner · 15 years ago
  49. 7a0eb91 teach tblgen to allow patterns like (add (i32 (bitconvert (i32 GPR))), 4), by Chris Lattner · 15 years ago
  50. b775b1e validate that input sdnodes don't exist in an output pattern. by Chris Lattner · 15 years ago
  51. c217305 eliminate a bunch of code duplication in ParseTreePattern by rotating it. by Chris Lattner · 15 years ago
  52. c812261 SDTCisVT<0, isVoid> is not valid, reject it. by Chris Lattner · 15 years ago
  53. aa4e339 add an optimized form of OPC_EmitMergeInputChains for the 1, 0 and by Chris Lattner · 15 years ago
  54. b4a52b0 fix a long standing fixme, which required fixing a bunch of other by Chris Lattner · 15 years ago
  55. 0d7952e fix CodeGenTarget::getRegisterVTs to not return the by Chris Lattner · 15 years ago
  56. 9414ae5 hoist some funky logic into CodeGenInstruction by Chris Lattner · 15 years ago
  57. 0be6fe7 continue pushing tblgen's support for nodes with multiple by Chris Lattner · 15 years ago
  58. 5d3569e fix a bug in my recent patch that increased opcode size to 2 bytes: by Chris Lattner · 15 years ago
  59. f65f294 Remove an unnecessary #include. by Dan Gohman · 15 years ago
  60. 310adf1 remove parallel support. by Chris Lattner · 15 years ago
  61. 70feca4 Teach TableGen to understand X.Y notation in the TSFlagsFields strings. by Jakob Stoklund Olesen · 15 years ago
  62. d5d5a3d Change tblgen to emit FOOISD opcode names as two by Chris Lattner · 15 years ago
  63. d1baa25 Fix evil TableGen bug in template parameters with defaults. by Jakob Stoklund Olesen · 15 years ago
  64. 084df62 add plumbing for handling multiple result nodes in some more places. by Chris Lattner · 15 years ago
  65. cc87830 implement SDTCisVTSmallerThanOp with EnforceSmallerThan by Chris Lattner · 15 years ago
  66. 66fb9d2 bring sanity to EnforceVectorEltType by Chris Lattner · 15 years ago
  67. 640a3f5 Cleanup getImplicitType by Chris Lattner · 15 years ago
  68. 9972aff reject void in intrinsic type lists. by Chris Lattner · 15 years ago
  69. 93dc92e Change intrinsic result type for void to store it as an empty list by Chris Lattner · 15 years ago
  70. 32f6a8b Fix suggested parentheses warning. by Daniel Dunbar · 15 years ago
  71. d7de540 Revert r99009 temporarily it seems to be breaking the bots. by Eric Christopher · 15 years ago
  72. 26e7637 Change intrinsic result type for void to store it as an empty list by Chris Lattner · 15 years ago
  73. 2e68a02 make getOperandNum a static function (since it's just used by by Chris Lattner · 15 years ago
  74. d734919 major surgery on tblgen: generalize TreePatternNode by Chris Lattner · 15 years ago
  75. 774ce29 make FillWithPossibleTypes take a predicate to filter types so that by Chris Lattner · 15 years ago
  76. 1e50631 resolve fixme: we now infer the instruction-level 'isvariadic' bit by Chris Lattner · 15 years ago
  77. e8cabf3 add a new SDNPVariadic SDNP node flag, and use it in by Chris Lattner · 15 years ago
  78. 5a9b8fb rewrite EnforceSmallerThan to be less bone headed. by Chris Lattner · 15 years ago
  79. 65f35d5 Fix -Asserts warning. by Daniel Dunbar · 15 years ago
  80. aac5b5b eliminate the last use of EEVT::isUnknown by Chris Lattner · 15 years ago
  81. e14d2e2 Finally change the instruction looking map to be a densemap from by Chris Lattner · 15 years ago
  82. 6a91b18 make inst_begin/inst_end iterate over InstructionsByEnumValue. by Chris Lattner · 15 years ago
  83. 01dcecc revert 98912 by Chris Lattner · 15 years ago
  84. a28bc68 make inst_begin/inst_end iterate over InstructionsByEnumValue. by Chris Lattner · 15 years ago
  85. f650278 change Target.getInstructionsByEnumValue to return a reference by Chris Lattner · 15 years ago
  86. e4e8bb1 factor copy and paste code. by Chris Lattner · 15 years ago
  87. b61e09d don't go through getInstructions(). by Chris Lattner · 15 years ago
  88. f30187a look up instructions by record, not by name. by Chris Lattner · 15 years ago
  89. 9287953 expand tblgen's support for instructions with implicit defs. by Chris Lattner · 15 years ago
  90. 6c6ba36 infer results of a pattern from implicit defs. This allows you to do something by Chris Lattner · 15 years ago
  91. f506b6b capture implicit uses and defs in CodeGenInstruction by Chris Lattner · 15 years ago
  92. ef98898 simplify this code, the # of sets in the pattern for an instruction by Chris Lattner · 15 years ago
  93. 0b6c926 disallow concatenation of two dags with different operators. by Chris Lattner · 15 years ago
  94. f55eed2 rewrite this to not artificially force concat the ins/outs list. by Chris Lattner · 15 years ago
  95. b0be4d2 eliminate support for "ops" in the input/output list of an by Chris Lattner · 15 years ago
  96. cedef1c remove some code that was working around old sparc v9 backend bugs. by Chris Lattner · 15 years ago
  97. 8cc9c0c MC/AsmMatcher: Add support for target specific "instruction cleanup" functions, by Daniel Dunbar · 15 years ago
  98. e7e891f Add an extra newline to separate PP directives from the contents by Kovarththanan Rajaratnam · 15 years ago
  99. 49d9dc4 --- Reverse-merging r98637 into '.': by Bob Wilson · 15 years ago
  100. d30a98e Initial ARM/Thumb disassembler check-in. It consists of a tablgen backend by Johnny Chen · 15 years ago