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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / e1686b08e4b9c570197633afc09f4fe32d664f0d
  1. e1686b0 Remove the build_unwind function from the OCaml bindings. by Peter Collingbourne · 13 years ago
  2. 59c1ba9 Preserve the name for this variant of IRBuilder::CreateCall by Peter Collingbourne · 13 years ago
  3. 306afdf Cleanup. Avoid relying on specialization of std::distance. by Andrew Trick · 13 years ago
  4. b1eede1 Fix the LoopUnroller to handle nontrivial loops and partial unrolling. by Andrew Trick · 13 years ago
  5. 33e5751 Push GPRnopc through a large number of instruction definitions to tighten operand decoding. by Owen Anderson · 13 years ago
  6. 8c09e2a Update comment. by Eric Christopher · 13 years ago
  7. 125feac clang is the new black. by Eric Christopher · 13 years ago
  8. c66d360 Trim an unneeded header. by Jakob Stoklund Olesen · 13 years ago
  9. c70c2ca Promote VMOVS to VMOVD when possible. by Jakob Stoklund Olesen · 13 years ago
  10. de317f4 Tighten operand checking of register-shifted-register operands. by Owen Anderson · 13 years ago
  11. d40aa24 Add 256-bit support for v8i32, v4i64 and v4f64 ISD::SELECT. Fix PR10556 by Bruno Cardoso Lopes · 13 years ago
  12. 8fa281a Fix minor typo. by Eli Friedman · 13 years ago
  13. c36481c Tighten operand checking on memory barrier instructions. by Owen Anderson · 13 years ago
  14. 77c7140 VMCore/BasicBlock.cpp: Don't assume BasicBlock::iterator might end with a non-PHInode Instruction in successors. by NAKAMURA Takumi · 13 years ago
  15. 8fc9b3d Fix whitespace. by NAKAMURA Takumi · 13 years ago
  16. 35008c2 Tighten operand checking on CPS instructions. by Owen Anderson · 13 years ago
  17. 438f68d Fix an oversight in the FixedLenDecoderEmitter where we weren't correctly checking the success result of custom decoder hooks on singleton decodings. by Owen Anderson · 13 years ago
  18. 21006d4 Representation of 'atomic load' and 'atomic store' in IR. by Eli Friedman · 13 years ago
  19. 51c9805 Create a new register class for the set of all GPRs except the PC. Use it to tighten our decoding of BFI. by Owen Anderson · 13 years ago
  20. 18deb04 Add v16i16 and v32i8 store patterns by Bruno Cardoso Lopes · 13 years ago
  21. 6ff9aa2 Fix 80-column violations. by Chad Rosier · 13 years ago
  22. dd3d68f Add missing file. by Rafael Espindola · 13 years ago
  23. cde4a1a Use fp unpack instructions to unpack int types. Until we have AVX2, this by Bruno Cardoso Lopes · 13 years ago
  24. fc430a6 Fix a couple ridiculous copy-paste errors. rdar://9914773 . by Eli Friedman · 13 years ago
  25. 69cb216 Add a C interface to PassManagerBuilder. It is missing the addExtension by Rafael Espindola · 13 years ago
  26. 739b557 Don't truncate MachO addresses. by Jim Grosbach · 13 years ago
  27. 793b811 ARM Disassembler: sign extend branch immediates. by Benjamin Kramer · 13 years ago
  28. 51157d2 Silence an false-positive warning. by Owen Anderson · 13 years ago
  29. 65e95d9 Don't generate the old-style disassembler in CMake builds either. by Owen Anderson · 13 years ago
  30. 9bd7c28 The new ARM disassembler disassembles "bx lr" as a special BX_ret instruction so target specific analysis isn't needed anymore. by Benjamin Kramer · 13 years ago
  31. ad0d36b Don't continue generating the old-style decoder file. by Owen Anderson · 13 years ago
  32. 6cd5716 ARM fix typo in pre-indexed store lowering. by Jim Grosbach · 13 years ago
  33. e6afbab Attempt to fix CMake build. by Owen Anderson · 13 years ago
  34. bd9091c Tighten Thumb1 branch predicate decoding. by Owen Anderson · 13 years ago
  35. 138515d First draft of the practical guide to atomics. by Eli Friedman · 13 years ago
  36. 8d7d2e1 Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter. by Owen Anderson · 13 years ago
  37. 0dc8b42 Put Darwin-specific code inside an __APPLE__ ifdef. by Bob Wilson · 13 years ago
  38. c6fbe56 Revert r137134. It breaks some code as Eli pointed out. by Bill Wendling · 13 years ago
  39. a0f596c Print out the variable declaration only if it is a declaration. Otherwise, a by Bill Wendling · 13 years ago
  40. 4a74b3b Inflate register classes after coalescing. by Jakob Stoklund Olesen · 13 years ago
  41. e2406df Reapply a more appropriate solution than in r137114. AVX supports by Bruno Cardoso Lopes · 13 years ago
  42. a511b8e Revert r137114 by Bruno Cardoso Lopes · 13 years ago
  43. 4bdd4ed PTX: Add initial support for device function calls by Justin Holewinski · 13 years ago
  44. 6d1fd0b Move CalculateRegClass to MRI::recomputeRegClass. by Jakob Stoklund Olesen · 13 years ago
  45. 719927a Emitting ARM build attributes and values as ULEB, rather than char. by Renato Golin · 13 years ago
  46. e321d7f Handle sitofp between v4f64 <- v4i32. Fix PR10559 by Bruno Cardoso Lopes · 13 years ago
  47. f5b7576 Recognize the UNAME_RELEASE environment variable to match Darwin's uname. by Bob Wilson · 13 years ago
  48. 70d0ca9 LoopUnroll looks like it has some stale code. Remove it to prove my sanity and avoid further confusion. by Andrew Trick · 13 years ago
  49. 2f613c5 Add support for avx vector fextend by Bruno Cardoso Lopes · 13 years ago
  50. a1dfb63 Add AVX versions of 128-bit sitofp and fptosi by Bruno Cardoso Lopes · 13 years ago
  51. b33ea56 Rename and tidy up tests by Bruno Cardoso Lopes · 13 years ago
  52. e5118ab Add two patterns to match special vmovss and vmovsd cases. Also fix by Bruno Cardoso Lopes · 13 years ago
  53. 8d676c2 There is only one instance of this placeholder being created. Just use that by Bill Wendling · 13 years ago
  54. 4fa93b7 Remove an instance where the 'unwind' instruction was created. by Bill Wendling · 13 years ago
  55. a2b552d Print variable's inline location in debug output. by Devang Patel · 13 years ago
  56. 48d726f Provide method to print variable's extended name which includes inline location. by Devang Patel · 13 years ago
  57. c19e6dd Rename member variables to follow coding standards. by Jakob Stoklund Olesen · 13 years ago
  58. 54f1536 Add missing attributes to the C++ backend's output. by Bill Wendling · 13 years ago
  59. 0f0e0a0 Make LowerVSETCC aware of AVX types and add patterns to match them. by Bruno Cardoso Lopes · 13 years ago
  60. 8e0cca6 Move the RegisterCoalescer private to its implementation file. by Jakob Stoklund Olesen · 13 years ago
  61. 8db7353 Tidy up these testcases to look more like real code does. by Dan Gohman · 13 years ago
  62. 2721567 Refer to the RegisterCoalescer pass by ID. by Jakob Stoklund Olesen · 13 years ago
  63. 3148a65 ARM parsing and encoding for LDRBT instruction. by Jim Grosbach · 13 years ago
  64. 648f9a7 Thumb1 BL instructions encoding 22 bits of displacement, not 21. by Owen Anderson · 13 years ago
  65. 7df4f96 Indicate that there are changes if runOfFunction returns saying that there are. by Bill Wendling · 13 years ago
  66. bc6fc20 ARM parsing and encoding for LDRB instruction. by Jim Grosbach · 13 years ago
  67. 8668a5b Add FIXME. by Jim Grosbach · 13 years ago
  68. 36ee0e6 Implement isLoadFromStackSlotPostFE and isStoreToStackSlotPostFE for ARM. by Jakob Stoklund Olesen · 13 years ago
  69. 328a9d4 Add support for several vector shifts operations while in AVX mode. Fix PR10581 by Bruno Cardoso Lopes · 13 years ago
  70. 09176e1 ARM load/store label parsing. by Jim Grosbach · 13 years ago
  71. 2df3f58 Hoist hasLoadFromStackSlot and hasStoreToStackSlot. by Jakob Stoklund Olesen · 13 years ago
  72. 6d74631 Fix encodings for Thumb ASR and LSR immediate operands. They encode the range 1-32, with 32 encoded as 0. by Owen Anderson · 13 years ago
  73. 2cb1dfa Fix up the patterns for SXTB, SXTH, UXTB, and UXTH so that they are correctly active without HasT2ExtractPack. PR10611. by Eli Friedman · 13 years ago
  74. 08de97a Pacify virtual dtor warnings and cmake buildbots. by Benjamin Kramer · 13 years ago
  75. 41ab14b Add MCInstrAnalysis class. This allows the targets to specify own versions of MCInstrDescs functions. by Benjamin Kramer · 13 years ago
  76. c13464f llvm-objdump: disassembly enhancements by Benjamin Kramer · 13 years ago
  77. a21d813 llvm-objdump: Use help of CFG to print assembly when --cfg is passed. by Benjamin Kramer · 13 years ago
  78. c040529 Simplify by creating parent first. by Devang Patel · 13 years ago
  79. 66b0f51 Don't clobber pending ST regs when FP regs are killed. by Jakob Stoklund Olesen · 13 years ago
  80. bf13ee1 Clean up the grammar for the landingpad instruction. by Bill Wendling · 13 years ago
  81. 6301220 Remove unnecessary space. by Bill Wendling · 13 years ago
  82. 2905c32 Fix typo found by John. by Bill Wendling · 13 years ago
  83. f4ef8db strengthen up an assertion: you can't create a constant struct by Chris Lattner · 13 years ago
  84. 69145ba Fix typo. Thanks, Andy! by Jakob Stoklund Olesen · 13 years ago
  85. 06988bc Made SCEV's UDiv expressions more canonical. When dividing a by Andrew Trick · 13 years ago
  86. ccfa446 Reject RS_Spill ranges from local splitting as well. by Jakob Stoklund Olesen · 13 years ago
  87. a9c41d3 Only mark remainder intervals as RS_Spill after per-block splitting. by Jakob Stoklund Olesen · 13 years ago
  88. 1f88042 Remember to update LiveDebugVariables after per-block splitting. by Jakob Stoklund Olesen · 13 years ago
  89. dab35d3 Extract per-block splitting into its own method. by Jakob Stoklund Olesen · 13 years ago
  90. 75e28f7 Delete getMultiUseBlocks and splitSingleBlocks. by Jakob Stoklund Olesen · 13 years ago
  91. b3ef7f6 Also use shouldSplitSingleBlock() in the fallback splitting mode. by Jakob Stoklund Olesen · 13 years ago
  92. 2d6d86b Split around single instructions to enable register class inflation. by Jakob Stoklund Olesen · 13 years ago
  93. 0d6fac3 ARM load instruction shifted register index operands. by Jim Grosbach · 13 years ago
  94. f4fa3d6 ARM indexed load assembly parsing and encoding. by Jim Grosbach · 13 years ago
  95. f39031b Detect proper register sub-classes. by Jakob Stoklund Olesen · 13 years ago
  96. 19dec20 ARM refactor indexed store instructions. by Jim Grosbach · 13 years ago
  97. 6fc1c08 Add ARM LDR parsing tests. by Jim Grosbach · 13 years ago
  98. 54cfeda Fix liveness computations in BranchFolding. by Jakob Stoklund Olesen · 13 years ago
  99. 16578b5 ARM simplify the postidx_reg operand encoding. by Jim Grosbach · 13 years ago
  100. ca8c70b ARM use a dedicated printer for postidx_reg operands. by Jim Grosbach · 13 years ago