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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / e507922779b0d0d9ed3c159306174b4e191d119a / test
  1. e507922 [tsan] Atomic support for ThreadSanitizer, patch by Dmitry Vyukov by Kostya Serebryany · 13 years ago
  2. 76c5897 Add mcpu to tests to prevent them from using AVX instructions on Sandy Bridge after r155618. by Craig Topper · 13 years ago
  3. afb3b5e Implement a bastardized ABI. by Evan Cheng · 13 years ago
  4. 97a4543 - thumbv6 shouldn't imply +thumb2. Cortex-M0 doesn't suppport 32-bit Thumb2 by Evan Cheng · 13 years ago
  5. 97b44f9 Use ConstantExpr::getExtractElement when constant-folding vectors by Dan Gohman · 13 years ago
  6. c1fc5e4 Add instcombine patterns for the following transformations: by Chad Rosier · 13 years ago
  7. aec9240 Fix the SD scheduler to avoid gluing the same node twice. by Andrew Trick · 13 years ago
  8. 37abe8d Use VLD1 in NEON extenting-load patterns instead of VLDR. by Tim Northover · 13 years ago
  9. 464bda3 Teach the reassociate pass to fold chains of multiplies with repeated by Chandler Carruth · 13 years ago
  10. cac31de Specify cpu to unbreak tests. by Evan Cheng · 13 years ago
  11. e67a416 If triple is armv7 / thumbv7 and a CPU is specified, do not automatically assume by Evan Cheng · 13 years ago
  12. 6962106 Try to fix llvm-arm-linux builder with -mcpu. by Jakob Stoklund Olesen · 13 years ago
  13. 01c0dd1 Trivial change to make the test use -mcpu=generic so as to avoid by Preston Gurd · 13 years ago
  14. 3ef91f5 Actually delete now-empty file. by Chandler Carruth · 13 years ago
  15. 87aac6a Reverting r155468. Chris and Chandler have convinced me that it's dangerous and by Lang Hames · 13 years ago
  16. 25052f4 Do not use $gp as a dedicated global register if the target ABI is not O32. by Akira Hatanaka · 13 years ago
  17. 14ce6fa ARM: improved assembler diagnostics for missing CPU features. by Jim Grosbach · 13 years ago
  18. 80c1ea6 ConstantFoldSelectInstruction swapped the operands of the select. by Nadav Rotem · 13 years ago
  19. 2003e03 Fix the testcase. We do expect two vblendw on XMMs. by Nadav Rotem · 13 years ago
  20. 34a13bb Add a testcase for 155440 by Nadav Rotem · 13 years ago
  21. ddb1420 MachineBasicBlock::SplitCriticalEdge() should follow LLVM IR variant and refuse to break edge to EH landing pad. rdar://11300144 by Evan Cheng · 13 years ago
  22. 1d9e68d Add support for llvm.arm.neon.vmull* intrinsics to InstCombine. This fixes by Lang Hames · 13 years ago
  23. 7362ac7 Fix a crash on valid (if UB) bitcode that is produced for some global by Chandler Carruth · 13 years ago
  24. 24e767d Add missing test cases for ARM VLD3 (single 3-element structure to all lanes) by Kevin Enderby · 13 years ago
  25. 2c66edf Add missing test cases for ARM VLD4 (single 4-element structure to all lanes) by Kevin Enderby · 13 years ago
  26. d1a7913 AVX: We lower VECTOR_SHUFFLE and BUILD_VECTOR nodes into vbroadcast instructions by Nadav Rotem · 13 years ago
  27. 75920ad FileCheck-ize tests. by Bill Wendling · 13 years ago
  28. c6490d1 FileCheck-ize these tests. by Bill Wendling · 13 years ago
  29. d5cc8b8 FileCheck-ize these tests. Harden some of them. by Bill Wendling · 13 years ago
  30. a354077 Optimize the vector UINT_TO_FP, SINT_TO_FP and FP_TO_SINT operations where the integer type is i8 (commonly used in graphics). by Nadav Rotem · 13 years ago
  31. 6a8c7bf This patch fixes a problem which arose when using the Post-RA scheduler by Preston Gurd · 13 years ago
  32. c34954d ARM: Add testcases for two-operand variants of VSRA/VRSRA/VSRI. by Jim Grosbach · 13 years ago
  33. 10a3933 Add ARM mode tests for the NEON vector shift-accumulate tests. by Jim Grosbach · 13 years ago
  34. 2b85250 Tidy up. Reformat for ease of reading. by Jim Grosbach · 13 years ago
  35. d410eab Revert r155365, r155366, and r155367. All three of these have regression by Chandler Carruth · 13 years ago
  36. 15e56ad Hexagon V5 (floating point) support. by Sirish Pande · 13 years ago
  37. 1bfd248 Support for Hexagon architectural feature, new value jump. by Sirish Pande · 13 years ago
  38. 0dac391 Support for Hexagon VLIW Packetizer. by Sirish Pande · 13 years ago
  39. 72847f3 Reapply r155136 after fixing PR12599. by Jakob Stoklund Olesen · 13 years ago
  40. dd90478 cleaned line endings in the newly added test file by Elena Demikhovsky · 13 years ago
  41. a3e3481 Tidy up this test more: by Chandler Carruth · 13 years ago
  42. 71f8bc3 FileCheck-ize a test, and tidy it up a touch. by Chandler Carruth · 13 years ago
  43. 1da5867 ZERO_EXTEND/SIGN_EXTEND/TRUNCATE optimization for AVX2 by Elena Demikhovsky · 13 years ago
  44. db34616 Teach getVectorTypeBreakdown about promotion of vectors in addition to widening of vectors. by Nadav Rotem · 13 years ago
  45. 0b35c35 Fix PR12599. by Jakob Stoklund Olesen · 13 years ago
  46. d8b3ed8 ARM: Update NEON assembly two-operand aliases. by Jim Grosbach · 13 years ago
  47. ee54010 Removes json-bench from the test dependencies. by Manuel Klimek · 13 years ago
  48. eece9dc Revert r155136 "Defer some shl transforms to DAGCombine." by Jakob Stoklund Olesen · 13 years ago
  49. 181b147 ARM some VFP tblgen'erated two-operand aliases. by Jim Grosbach · 13 years ago
  50. bfb3c5a Tidy up. Formatting. by Jim Grosbach · 13 years ago
  51. 8b74e5a Avoid a bug in the path count computation, preventing an infinite by Dan Gohman · 13 years ago
  52. c8969fd Test for the the problem with xors being changed into ands by Joel Jones · 13 years ago
  53. 7533809 Remove llvm-ld and llvm-stub (which is only used by llvm-ld). by Michael J. Spencer · 13 years ago
  54. 0d5fcae Defer some shl transforms to DAGCombine. by Jakob Stoklund Olesen · 13 years ago
  55. 0d77b9c Extract the broken part of XFAILed test into its own file. by Jakob Stoklund Olesen · 13 years ago
  56. f5782e2 FileCheckize by Jakob Stoklund Olesen · 13 years ago
  57. 377bf1a Nobody likes shifty instructions, but that was a bit strong. by Jakob Stoklund Olesen · 13 years ago
  58. 35ee7d2 Added support for disassembling unpredictable swp/swpb ARM instructions. by Silviu Baranga · 13 years ago
  59. 6b9f97d Fix the bahavior of the disassembler when decoding unpredictable mrs instructions on ARM. Now the diasassembler emmits warnings instead of errors. by Silviu Baranga · 13 years ago
  60. fa1ebc6 Added support for unpredictable mcrr/mcrr2/mrrc/mrrc2 ARM instruction in the disassembler. Since the upredicability conditions are complex, C++ code was added to handle them. by Silviu Baranga · 13 years ago
  61. e546c4c Fixed decoding for the ARM cdp2 instruction. The restriction on the coprocessor number was removed for this instruction. by Silviu Baranga · 13 years ago
  62. 9e71231 Add suport for unpredicatble cases of the cmp, tst, teq and cmnz ARM instructions in the disassembler. by Silviu Baranga · 13 years ago
  63. 41c3e9a FileCheckify, un-XFAIL SimplifyLibCalls/floor test Fixes build on MSVC by Joe Groff · 13 years ago
  64. d15c581 Move win32 SimplifyLibcall test under Transforms by Joe Groff · 13 years ago
  65. d5bda5e fix pr12559: mark unavailable win32 math libcalls by Joe Groff · 13 years ago
  66. ecdc9d5 Add disassembler to MIPS. by Akira Hatanaka · 13 years ago
  67. 93751c8 Force cmov on test so block placement doesn't shuffle the code around. by Benjamin Kramer · 13 years ago
  68. 72aadc0 Fix bad EXTRACT_SUBREG in instruction selection for extending-loads on NEON. by James Molloy · 13 years ago
  69. 86df062 Revert "SCEV: When expanding a GEP the final addition to the base pointer has NUW but not NSW." by Benjamin Kramer · 13 years ago
  70. 8ca441a Test cases that assume layout should use -disable-code-place. by Andrew Trick · 13 years ago
  71. c5a2a33 Fix ARM disassembly of VLD2 (single 2-element structure to all lanes) by Kevin Enderby · 13 years ago
  72. 8975f51 by Preston Gurd · 13 years ago
  73. fd2e4e6 Disable the atom scheduling test after r154874 broke it. by Chandler Carruth · 13 years ago
  74. bf42f24 ARM two-operand forms for vhadd and vhsub instructions. by Jim Grosbach · 13 years ago
  75. 177bea5 Relax this test a touch to cope with different assembly variants. by Chandler Carruth · 13 years ago
  76. f1a60c7 Fix updateTerminator to be resiliant to degenerate terminators where by Chandler Carruth · 13 years ago
  77. 68f89a6 MC assembly parser handling for trailing comma in macro instantiation. by Jim Grosbach · 13 years ago
  78. 39ac325 FileCheckize these tests. by Jakob Stoklund Olesen · 13 years ago
  79. fbefc91 Disable code placement for this test. by Jakob Stoklund Olesen · 13 years ago
  80. 2867c85 Remove support for the special 'fast' value for fpmath accuracy for the moment. by Duncan Sands · 13 years ago
  81. 2c651fe Fix incorrect atomics codegen introduced in r154705, and extend test to catch it. by Richard Smith · 13 years ago
  82. 1fbfea7 This patch fixes 3 problems: by Akira Hatanaka · 13 years ago
  83. 199366a ARM assembly two-operand forms for VRSHL. by Jim Grosbach · 13 years ago
  84. 695eca6 Tidy up. Test formatting. by Jim Grosbach · 13 years ago
  85. 3ef7edc Do not add offset in applyFixup. This has already been accounted for in Value. by Akira Hatanaka · 13 years ago
  86. 705e257 ARM two-operand aliases for VRHADD instructions. by Jim Grosbach · 13 years ago
  87. dbd6ba3 Tidy up. Testcase formatting. by Jim Grosbach · 13 years ago
  88. 57ca13e Move to X86 directory because this fails on non-X86 platforms. by Bill Wendling · 13 years ago
  89. 8883c43 Make it possible to indicate relaxed floating point requirements at the IR level by Duncan Sands · 13 years ago
  90. 9e67db4 Flip the new block-placement pass to be on by default. by Chandler Carruth · 13 years ago
  91. 0de089a Remove an overly brittle test. This test will no longer be interesting by Chandler Carruth · 13 years ago
  92. e773e8c Add a somewhat hacky heuristic to do something different from whole-loop by Chandler Carruth · 13 years ago
  93. d0c478d Add -disassemble support for -show-inst and -show-encode capability llvm-mc. Also refactor so all MC paraphernalia are created once for all uses as much as possible. by Richard Barton · 13 years ago
  94. 16295fc Tweak the loop rotation logic to check whether the loop is naturally by Chandler Carruth · 13 years ago
  95. 31490ba Remove dead SD nodes after the combining pass. Fixes PR12201. by Hal Finkel · 13 years ago
  96. 70daea9 Rewrite how machine block placement handles loop rotation. by Chandler Carruth · 13 years ago
  97. 2cb1e9d Remove AVX2 vpermq and vpermpd intrinsics. These can now be handled with normal shuffle vectors. by Craig Topper · 13 years ago
  98. f16af0a Fix PR12529. The Vxx family of instructions are only supported by AVX. by Nadav Rotem · 13 years ago
  99. 3ab32ea When emulating vselect using OR/AND/XOR make sure to bitcast the result back to the original type. by Nadav Rotem · 13 years ago
  100. 73c504a Added VPERM optimization for AVX2 shuffles by Elena Demikhovsky · 13 years ago