1. 73bfa71 Remove the X86 and PowerPC Simple instruction selectors; their time has passed. by Nate Begeman · 20 years ago
  2. 8482dd8 add a beta option for turning on dag->dag isel by Chris Lattner · 20 years ago
  3. b0096bd Turn loop strength reduction on by default. by Chris Lattner · 20 years ago
  4. 8f33132 Remove support for 64b PPC, it's been broken for a long time. It'll be by Nate Begeman · 20 years ago
  5. 3c304a3 Consolidate the GPOpt stuff to all use the Subtarget, instead of still by Chris Lattner · 20 years ago
  6. 4e624ec don't crash when running the PPC backend on non-ppc hosts without specifying by Chris Lattner · 20 years ago
  7. 3d72d14 Use the new subtarget support to automatically choose the correct ABI by Nate Begeman · 20 years ago
  8. 8c00f8c Add Subtarget support to PowerPC. Next up, using it. by Nate Begeman · 20 years ago
  9. 00b16889 Eliminate all remaining tabs and trailing spaces. by Jeff Cohen · 20 years ago
  10. 2497e63 Support building non-PIC by Nate Begeman · 20 years ago
  11. 2130c08 revert to using 4-byte alignment for doubles, as specified by the ABI by Chris Lattner · 20 years ago
  12. adeb43d Generate mfocrf when targeting g5. Generate fsqrt/fsqrts when targetin g5. by Nate Begeman · 20 years ago
  13. a3fd400 Integrate SelectFPExpr into SelectExpr. This gets PPC32 closer to being by Nate Begeman · 20 years ago
  14. 0431c96 Refactor the addPassesToEmitAssembly interface into a addPassesToEmitFile by Chris Lattner · 20 years ago
  15. b5f662f Remove trailing whitespace by Misha Brukman · 20 years ago
  16. f8b0294 Make pattern isel default for ppc by Nate Begeman · 20 years ago
  17. d3e6b94 Remove 64 bit simple ISel, it never worked correctly by Nate Begeman · 20 years ago
  18. 5e96661 Implement more of the PPC32 Pattern ISel: by Nate Begeman · 20 years ago
  19. a9795f8 Addition of the PPC32 Pattern ISel. While it is far from complete, it will by Nate Begeman · 20 years ago
  20. 4318a3d cleanup the cfg after lsr by Chris Lattner · 20 years ago
  21. 0c74906 Add a temporary option for llc-beta: -enable-lsr-for-ppc, which turns on by Chris Lattner · 20 years ago
  22. 3ea78c4 Use the target triple to pick this target. by Chris Lattner · 21 years ago
  23. 9d0087e The LLVM bool type shall have 1 byte alignment on PPC. by Chris Lattner · 21 years ago
  24. 2a0c0df The JIT works enough by Chris Lattner · 21 years ago
  25. 05ad237 Remove this method. by Chris Lattner · 21 years ago
  26. dd30751 Don't return value from void function. This is only temporary anyway while by Nate Begeman · 21 years ago
  27. c9a6b1f Be really paranoid about not breaking stuff yet by Chris Lattner · 21 years ago
  28. e4fce6f Move JITInfo from PPCTM to PPC32TM by Chris Lattner · 21 years ago
  29. 1deb74d Remove this method, it's not clear how it could be implemented indep of 32 or 64-bit mode by Chris Lattner · 21 years ago
  30. 097714b Disable the JIT until it can sorta kinda work. by Chris Lattner · 21 years ago
  31. cbb9812 bling bling! by Chris Lattner · 21 years ago
  32. ed42853 All PPC instructions are now auto-printed by Nate Begeman · 21 years ago
  33. 551ccae Changes For Bug 352 by Reid Spencer · 21 years ago
  34. f908888 Do not register ppc64 yet, as it breaks the SparcV9 backend by Chris Lattner · 21 years ago
  35. 983e92d LR needs to be saved at 16-byte offset on a 64-bit arch by Misha Brukman · 21 years ago
  36. 66aa3e0 No need for an `is64bit' flag by Misha Brukman · 21 years ago
  37. ca068e8 Replace PowerPCPEI.cpp with target independant PrologEpilogInserter by Nate Begeman · 21 years ago
  38. f5f7068 Disable PPC64 backend by default because LLC cannot choose automatically between by Misha Brukman · 21 years ago
  39. 1d3527e * Move AIX into the llvm namespace to be accessed from RegisterInfo by Misha Brukman · 21 years ago
  40. 9582822 Hyphenate ##-bit and remove first-person from comments. by Misha Brukman · 21 years ago
  41. 7a4fe9b Clean up 32/64bit and Darwin/AIX split. Next steps: 64 bit ISel, AIX asm printer. by Nate Begeman · 21 years ago
  42. 0145881 Breaking up the PowerPC target into 32- and 64-bit subparts, Part III: the rest. by Misha Brukman · 21 years ago
  43. 7103fba CodePrinter -> AsmPrinter by Misha Brukman · 21 years ago
  44. 3ea9346 by Chris Lattner · 21 years ago
  45. bd2c870 Run the branch selection pass right before the asm printer. by Misha Brukman · 21 years ago
  46. 9accb24 Bool alignment on MacOSX/PowerPC is 4 bytes. by Misha Brukman · 21 years ago
  47. cd2273f Shorts are aligned to 2 bytes, bools to 1 byte (in structs). by Misha Brukman · 21 years ago
  48. 5c45441 Double alignment in structs is 4 bytes, not 8. Patch by Nate Begeman. by Misha Brukman · 21 years ago
  49. a57b76f We don't really need to #include IPO.h into this file. by Misha Brukman · 21 years ago
  50. 6f14ad1 Define double alignment as 8 bytes now that assert(DoubleAlignment == PointerSize) by Misha Brukman · 21 years ago
  51. 017fdcb Revert stuff that I didn't mean to checkin by Chris Lattner · 21 years ago
  52. 76e2df2 Patches towards fixing PR341 by Chris Lattner · 21 years ago
  53. 01eca8d Implement getModuleMatchQuality and getJITMatchQuality() for PowerPC by Misha Brukman · 21 years ago
  54. 68905bb Delete the allocate*TargetMachine function, which is now dead. by Chris Lattner · 21 years ago
  55. 71d24aa Make these format a bit nicer by Chris Lattner · 21 years ago
  56. d36c970 Auto-registrate target by Chris Lattner · 21 years ago
  57. fab96f0 Fix all of those problems that the PPC backend has running 176.gcc :) by Chris Lattner · 21 years ago
  58. f233a84 Wrap long line by Misha Brukman · 21 years ago
  59. 60f3581 Lower ConstantExpressions before the code generator. by Misha Brukman · 21 years ago
  60. 1b17438 The code generator should work with unreachable blocks. If not, then this by Chris Lattner · 21 years ago
  61. 7cd4440 Can't print out machine code before it is constructed. by Misha Brukman · 21 years ago
  62. 34fa871 Allow debugging machine instrs (by printout) before/after isel and regalloc by Misha Brukman · 21 years ago
  63. 75afe1f Add option to print out machine code before register allocation. by Misha Brukman · 21 years ago
  64. 8c9f520 llvm/IntrinsicLowering.h => llvm/CodeGen/IntrinsicLowering.h by Misha Brukman · 21 years ago
  65. 5dfe3a9 Initial revision by Misha Brukman · 21 years ago