1. ef956fc Simplify some code. by Bill Wendling · 16 years ago
  2. 7fa8162 Fix whitespace. It was confusing me. by Bill Wendling · 16 years ago
  3. 5b16cd2 Code clean up. Bye bye PhysRegTracker. by Evan Cheng · 16 years ago
  4. a26eae6 Make DebugLoc independent of DwarfWriter. by Argyrios Kyrtzidis · 16 years ago
  5. 3a155f0 Join cross class copies using getCommonSubClass() by Jakob Stoklund Olesen · 16 years ago
  6. 0490dcb Add a smarter heuristic to determine when to coalesce a virtual register with a physical one. More specifically, it avoid tying a virtual register in the loop with a physical register defined / used outside the loop. When it determines it's not profitable, it will use the physical register as the allocation preference instead. by Evan Cheng · 16 years ago
  7. 4e5ea55 Move helper functions for optimizing division by constant into the APInt class. by Jay Foad · 16 years ago
  8. 6c14729 fix a regression handling indirect results: these need to be considered by Chris Lattner · 16 years ago
  9. 98a366d Instead of passing in an unsigned value for the optimization level, use an enum, by Bill Wendling · 16 years ago
  10. ec8eee2 Fix infinite recursion in the C++ code which handles movddup by making it unnecessary. by Nate Begeman · 16 years ago
  11. ce9be2c MachineInstr::isRegTiedTo{Use,Def}Operand can safely be made const. by Jakob Stoklund Olesen · 16 years ago
  12. a641575 Update comment, replace theoretically impossible check with an assert. by Nate Begeman · 16 years ago
  13. 96f3fd9 spillPhysRegAroundRegDefsUses() may have invalidated iterators stored in fixed_ IntervalPtrs. Reset them. by Evan Cheng · 16 years ago
  14. 5a5ca15 Implement review feedback for vector shuffle work. by Nate Begeman · 16 years ago
  15. a3518a1 Add a public method called getAddressSpace() to the GlobalAddressSDNode. by Sanjiv Gupta · 16 years ago
  16. 672452d Disable the load-shrinking optimization from looking at by Chris Lattner · 16 years ago
  17. 1c2f6da Determine allocation 'preference' with right register class. I haven't seen this changing codegen so no test case. by Evan Cheng · 16 years ago
  18. be8cc2a Second attempt: by Bill Wendling · 16 years ago
  19. 8a8a0df Move getMatchingSuperReg() out of coalescer and into TargetRegisterInfo. by Evan Cheng · 16 years ago
  20. 08e791f Don't coalesce a physical register with an incompatible virtual register. by Jakob Stoklund Olesen · 16 years ago
  21. d3d9657 Initialized arrays can be in any address space. by Sanjiv Gupta · 16 years ago
  22. fa4677b Move getSubRegisterRegClass from ScheduleDagSDNodesEmit.cpp to a TargetRegisterClass method. by Jakob Stoklund Olesen · 16 years ago
  23. 30590f5 Fix PR4034. Bug in LiveInterval::join when it's compacting new valno's. by Evan Cheng · 16 years ago
  24. e9ccb3a Fix for PR4051. When 2address pass delete an instruction, update kill info when necessary. by Evan Cheng · 16 years ago
  25. c69d56f r70270 isn't ready yet. Back this out. Sorry for the noise. by Bill Wendling · 16 years ago
  26. 2e9d5f9 Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to by Bill Wendling · 16 years ago
  27. c45288e Fix PR4076. Correctly create live interval of physical register with two-address update. by Evan Cheng · 16 years ago
  28. 82fd3f3 Don't skip the CopyMI when removing kill markers. by Owen Anderson · 16 years ago
  29. 9771b91 Now that PR2957 is resolved, remove a bunch of no-longer needed workarounds. by Duncan Sands · 16 years ago
  30. 9008ca6 2nd attempt, fixing SSE4.1 issues and implementing feedback from duncan. by Nate Begeman · 16 years ago
  31. d521bc9 Fix PR4056. It's possible a physical register def is dead if its implicit use is deleted by two-address pass. by Evan Cheng · 16 years ago
  32. 27e4666 Also delete last unused val#. by Evan Cheng · 16 years ago
  33. c7b3444 When transforming sext(trunc(load(x))) into sext(smaller load(x)), by Dan Gohman · 16 years ago
  34. a4b2bab Reuse unused val#'s to avoid running out of memory in extreme cases. by Evan Cheng · 16 years ago
  35. 2bee0af Refactor the code to grab the low and high parts of a value by Dan Gohman · 16 years ago
  36. 4128700 Add a top-level comment about DAGCombiner's role in the compiler. by Dan Gohman · 16 years ago
  37. 0adb527 Do not share a single unknown val# for all the live ranges merged into a physical sub-register live interval. When coalescer is merging in clobbered virtaul register live interval into a physical register live interval, give each virtual register val# a separate val# in the physical register live interval. Otherwise, the coalescer would have lost track of the definitions information it needs to make correct coalescing decisions. by Evan Cheng · 16 years ago
  38. 2f91f30 Fix PR 4057, a crash doing float->char const folding. by Dale Johannesen · 16 years ago
  39. 15684b2 Revert 69952. Causes testsuite failures on linux x86-64. by Rafael Espindola · 16 years ago
  40. b706d29 PR2957 by Nate Begeman · 16 years ago
  41. 98d0710 Instead of requiring TLI.LowerCallTo to return an ISD::BUILD_PAIR, by Dan Gohman · 16 years ago
  42. ad62f53 Factor out a bit of code that appears in several places into a utility function. by Dan Gohman · 16 years ago
  43. 5e5558b Handle Void types in ComputeValueVTs. This doesn't currently occur, by Dan Gohman · 16 years ago
  44. aa809fb Update comments. by Evan Cheng · 16 years ago
  45. c2cee14 Fix an obvious type. by Evan Cheng · 16 years ago
  46. 5b69eba It has finally happened. Spiller is now using live interval info. by Evan Cheng · 16 years ago
  47. 3e3702d Fix Visual Studio 2008 build failure. Patch by Marius Wachtler by Devang Patel · 16 years ago
  48. 70bc17d Make X86's copyRegToReg able to handle copies to and from subclasses. by Dan Gohman · 16 years ago
  49. bd209ab Simplify this code. getConstant knows how to make broadcasted vector constants. by Dan Gohman · 16 years ago
  50. 998e125 Move duplicated AddLiveIn function from X86 and ARM backends to be a method by Bob Wilson · 16 years ago
  51. c885165 Revise my previous change 68996 as suggested by Duncan. by Bob Wilson · 16 years ago
  52. c4f718a - Remove an arbitrary spill weight tweak that should not have been there. by Evan Cheng · 16 years ago
  53. 206d185 Added a linearscan register allocation optimization. When the register allocator spill an interval with multiple uses in the same basic block, it creates a different virtual register for each of the reloads. e.g. by Evan Cheng · 16 years ago
  54. a507e55 Now that BUILD_VECTOR operands are allowed to be by Duncan Sands · 16 years ago
  55. 2f992d1 Fix PR3898, which manifests as failures on are an Xcore, by Chris Lattner · 16 years ago
  56. b10b5ac Don't try to make BUILD_VECTOR operands have the same by Duncan Sands · 16 years ago
  57. cccdb2b Add a new LiveInterval::overlaps(). It checks if the live interval overlaps a range specified by [Start, End). by Evan Cheng · 16 years ago
  58. 97d14fc Inline asm's were still introducing bogus dependencies; by Dale Johannesen · 16 years ago
  59. 276b77e Teach spiller to unfold instructions which modref spill slot when a scratch by Evan Cheng · 16 years ago
  60. 0e4042d In the list-burr's pseudo two-addr dependency heuristics, don't by Dan Gohman · 16 years ago
  61. 8af808a Handle SUBREG_TO_REG instructions with the same heuristics by Dan Gohman · 16 years ago
  62. 02f8c41 Do not treat beginning of inlined scope as beginning of normal function scope if the location info is missing. by Devang Patel · 16 years ago
  63. 906caf2 Record line number at the beginning of a func.start. by Devang Patel · 16 years ago
  64. 16f2ffd In -fast mode do what FastISel does. This code could use some refactoring help! by Devang Patel · 16 years ago
  65. 390f3ac by Devang Patel · 16 years ago
  66. 682e0e6 If location where the function was inlined is not know then do not emit debug info describing inlinied region. by Devang Patel · 16 years ago
  67. 7d2f972 s/RootDbgScope/FunctionDbgScope/g by Devang Patel · 16 years ago
  68. 8818b8f Add DISubprogram is not null check. by Devang Patel · 16 years ago
  69. c23e496 Generalize one of the SelectionDAG::ReplaceAllUsesWith overloads by Dan Gohman · 16 years ago
  70. c782ad0 Check isInlinedSubroutine() before creating DW_TAG_inlined_subroutine. by Devang Patel · 16 years ago
  71. 9407cd4 Fix MachineInstr::getNumExplicitOperands to count by Dan Gohman · 16 years ago
  72. 33f1c68 Move MachineRegisterInfo::setRegClass out of line. by Dan Gohman · 16 years ago
  73. 593ea05 Move MachineJumpTableInfo::ReplaceMBBInJumpTables out of line. by Dan Gohman · 16 years ago
  74. 3bc1a37 Give RemoveRegOperandFromRegInfo a comment and move the code out of line. by Dan Gohman · 16 years ago
  75. 1be3ecc Construct and emit DW_TAG_inlined_subroutine DIEs for inlined subroutine scopes (only in FastISel mode). by Devang Patel · 16 years ago
  76. 5ec3b42 When the result of an EXTRACT_SUBREG, INSERT_SUBREG, or SUBREG_TO_REG by Dan Gohman · 16 years ago
  77. ec65a7d Do not force asm's to be chained if they don't touch by Dale Johannesen · 16 years ago
  78. 87d696a Fix PR3934 part 2. findOnlyInterestingUse() was not setting IsCopy and IsDstPhys which are returned by value and used by callee. This happened to work on the earlier test cases because of a logic error in the caller side. by Evan Cheng · 16 years ago
  79. 4cbb173 Make these errors more noticable in build logs. by Daniel Dunbar · 16 years ago
  80. b1303d0 Change SelectionDAG type legalization to allow BUILD_VECTOR operands to be by Bob Wilson · 16 years ago
  81. 88c7af0 Rename COPY_TO_SUBCLASS to COPY_TO_REGCLASS, and generalize by Dan Gohman · 16 years ago
  82. 26cbf9e Refactor some code in SelectionDAGLegalize::ExpandBUILD_VECTOR. by Bob Wilson · 16 years ago
  83. 3005ed6 PR3934: Fix a bogus two-address pass assertion. by Evan Cheng · 16 years ago
  84. 48c7fa2 Right now, Debugging information to encode scopes (DW_TAG_lexical_block) relies on DBG_LABEL. Unfortunately this intefers with the quality of optimized code. by Devang Patel · 16 years ago
  85. 0f7fef3 by Devang Patel · 16 years ago
  86. f8c7394 Add a new TargetInstrInfo MachineInstr opcode, COPY_TO_SUBCLASS. by Dan Gohman · 16 years ago
  87. 70f2f65 Don't abort on an aliasing physical register that does not have by Dan Gohman · 16 years ago
  88. 9a77a92 When assigning a physical register to a MachineOperand, set by Dan Gohman · 16 years ago
  89. 6ed0e20 Add an assertion to verify that a copy was actually emitted. by Dan Gohman · 16 years ago
  90. 266c7bb Add a new "available_externally" linkage type. This is intended by Chris Lattner · 16 years ago
  91. 36e3946 make UpdateValueMap handle the possiblity that we could be by Chris Lattner · 16 years ago
  92. c5040ab optimize FastISel::UpdateValueMap to avoid duplicate map lookups, by Chris Lattner · 16 years ago
  93. c6fa3ff Revert r68847. It breaks the build on non-Darwin targets, with this message by Dan Gohman · 16 years ago
  94. 2057532 Keep track of inlined functions and their locations. This information is collected when nested llvm.dbg.func.start intrinsics are seen. (Right now, inliner removes nested llvm.dbg.func.start intrinisics during inlining.) by Devang Patel · 16 years ago
  95. 03f0a2f DebugLabelFolder ruthlessly deletes redundant labels. However, sometimes the redundant labels is referenced by debug info somewhere else. This patch provies a way so that dwarf writer can mark labels as used. by Devang Patel · 16 years ago
  96. ec15bbf Clean up a bunch of whitespace issues and fix a comment typo. by Bob Wilson · 16 years ago
  97. 296185c fix two problems with machine sinking: by Chris Lattner · 16 years ago
  98. 0355862 Now that register classes have names, include the name in debug output. by Dan Gohman · 16 years ago
  99. 7d16e85 Pass in the std::string parameter instead of returning it by value. by Bill Wendling · 16 years ago
  100. a6f02fb Constify getter methods. by Bill Wendling · 16 years ago