- f1b1c5e implement a trivial readme entry. by Chris Lattner · 18 years ago
- 27a6c73 Several changes: by Chris Lattner · 18 years ago
- b97aec6 Add parameter to getDwarfRegNum to permit targets by Dale Johannesen · 18 years ago
- c69107c Unifacalize the CALLSEQ{START,END} stuff. by Bill Wendling · 18 years ago
- 0f8d9c0 Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack by Bill Wendling · 18 years ago
- 20ab290 Add a flag for indirect branch instructions. by Owen Anderson · 18 years ago
- f191c80 Use TableGen to emit information for dwarf register numbers. by Anton Korobeynikov · 18 years ago
- cc41586 Much improved pic jumptable codegen: by Evan Cheng · 18 years ago
- e0cb36b [ARM] Implement __builtin_thread_pointer. by Lauro Ramos Venancio · 18 years ago
- f1ba1ca Move the LowerMEMCPY and LowerMEMCPYCall to a common place. by Rafael Espindola · 18 years ago
- 8699a97 [ARM] Fix code generation for: by Lauro Ramos Venancio · 18 years ago
- ca0ed74 Eliminate the remaining uses of getTypeSize. This by Duncan Sands · 18 years ago
- e0703c8 Make ARM and X86 LowerMEMCPY identical by moving the isThumb check into getMaxInlineSizeThreshold by Rafael Espindola · 18 years ago
- fc05f40 Make ARM an X86 memcpy expansion more similar to each other. by Rafael Espindola · 18 years ago
- ca4571e Support non-POSIX hosts by removing use of strncasecmp. by Dale Johannesen · 18 years ago
- 4102eb5 Fix memcpy lowering when addresses are 4-byte aligned but size is not multiple of 4. by Evan Cheng · 18 years ago
- 7b73a5d split LowerMEMCPY into LowerMEMCPYCall and LowerMEMCPYInline in the ARM backend. by Rafael Espindola · 18 years ago
- 3a7c33a Add an easy microoptimization I noticed. by Chris Lattner · 18 years ago
- f0a0cdd - Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but only returns the opcode of the instruction post unfolding. by Evan Cheng · 18 years ago
- 58184e6 Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface. by Evan Cheng · 18 years ago
- a4c7910 Fix a misnamed parameter. by Christopher Lamb · 18 years ago
- 65a3323 legalizing the ret operation on f64 shouldn't introduce a new by Chris Lattner · 18 years ago
- 347d39f Revert 42908 for now. by Evan Cheng · 18 years ago
- 8ddde0a Change the names used for internal labels to use the current by Dan Gohman · 18 years ago
- f96e4de Set ISD::FPOW to Expand. by Dan Gohman · 18 years ago
- 525178c Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} to by Dan Gohman · 18 years ago
- 66f0f64 - Added a few target hooks to generate load / store instructions from / to any by Evan Cheng · 18 years ago
- cb406c2 Use empty() member functions when that's what's being tested for instead by Dan Gohman · 18 years ago
- cd8bc05 AsmPrinters overriding getAnalysisUsage should call super. by Gordon Henriksen · 18 years ago
- 9efce63 Allow copyRegToReg to emit cross register classes copies. by Evan Cheng · 18 years ago
- 677ccc6 More explicit keywords. by Dan Gohman · 18 years ago
- 76a4023 Honor user-defined section specification of a global, ignores whether its initializer is null. by Evan Cheng · 18 years ago
- 17207dd Enable if-conversion for ARM by default. by Evan Cheng · 18 years ago
- e71bff7 Avoid referencing deleted instruction. by Evan Cheng · 18 years ago
- 92dfe20 Remove isReg, isImm, and isMBB, and change all their users to use by Dan Gohman · 18 years ago
- fe4afb1 Enable indirect encoding for the personality function by Bill Wendling · 18 years ago
- 071a279 Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead. by Evan Cheng · 18 years ago
- f7331b3 Fold the adjust_trampoline intrinsic into by Duncan Sands · 18 years ago
- be36798 80 col. by Evan Cheng · 18 years ago
- bf8ae84 Add some notes about better flag handling. by Chris Lattner · 18 years ago
- 718cb66 Add lengthof and endof templates that hide a lot of sizeof computations. by Owen Anderson · 18 years ago
- eaf0894 Enhance APFloat to retain bits of NaNs (fixes oggenc). by Dale Johannesen · 18 years ago
- 8c13263 Instruction formats added used to generate multiply instructions of V5TE. by Raul Herbster · 18 years ago
- b94e608 Unused relocation type reloc_arm_absolute removed. by Raul Herbster · 18 years ago
- 9c1a382 Comments added. It now generates V5TE multiply instructions. However, it is still necessary to model PUWLSH bits more clearly. by Raul Herbster · 18 years ago
- 37fb5b1 ARM instruction table was modified by adding information to generate multiply instruction of V5TE. by Raul Herbster · 18 years ago
- d05c04c JITInfo now resolves function addrs and also relocations. It always emits a stub. by Raul Herbster · 18 years ago
- 35b35c5 Add a variant of foldMemoryOperand to fold any load / store, not just load / store from / to stack slots. by Evan Cheng · 18 years ago
- 0ff94f7 Initial JIT support for ARM by Raul Fernandes Herbster. by Evan Cheng · 18 years ago
- 61e729e More explicit keywords. by Dan Gohman · 18 years ago
- 7fc7761 Indexed loads each has 2 outputs. by Evan Cheng · 18 years ago
- f452207 More explicit keywords. by Dan Gohman · 18 years ago
- 36397f5 Support for trampolines, except for X86 codegen which is still under discussion. by Duncan Sands · 18 years ago
- b8275a3 Don't ignore the return value of AsmPrinter::doInitialization and by Dan Gohman · 18 years ago
- ffbacca No more noResults. by Evan Cheng · 18 years ago
- 8bd6035 Added -print-emitted-asm to print out JIT generated asm to cerr. by Evan Cheng · 18 years ago
- 64d80e3 Change instruction description to split OperandList into OutOperandList and by Evan Cheng · 18 years ago
- 4558b80 Only adjust esp around calls in presence of alloca. by Evan Cheng · 18 years ago
- c3dbe70 no email addrs in file headers by Chris Lattner · 18 years ago
- 2365f51 Long live the exception handling! by Anton Korobeynikov · 18 years ago
- 66a2a8f ARM: make branch folder remove unconditional branches by Dale Johannesen · 18 years ago
- 5d9c4b6 Fix hang compiling TimberWolf (allow for islands of size other than 4). by Dale Johannesen · 18 years ago
- 8202010 Didn't mean the last commit. Revert. by Evan Cheng · 18 years ago
- c608ff2 Update. by Evan Cheng · 18 years ago
- 13ab020 Remove clobbersPred. Add an OptionalDefOperand to instructions which have the 's' bit. by Evan Cheng · 18 years ago
- 87bdba6 The various "getModuleMatchQuality" implementations should return by Chris Lattner · 18 years ago
- 9ad6f03 No need for ccop anymore. by Evan Cheng · 18 years ago
- 4b9cb7d Incorrect check. by Evan Cheng · 18 years ago
- 06aae67 Do away with ImmutablePredicateOperand. by Evan Cheng · 18 years ago
- dfb2eba Print the s bit if the instruction is toggled to its CPSR setting form. by Evan Cheng · 18 years ago
- 04c813d PredicateDefOperand -> OptionalDefOperand. by Evan Cheng · 18 years ago
- 148b6a4 Initial ARM JIT support by Raul Fernandes Herbster. by Evan Cheng · 18 years ago
- d54874a Unbreak the build. by Evan Cheng · 18 years ago
- a99be51 Here is the bulk of the sanitizing. by Gabor Greif · 18 years ago
- 0e1d379 Reflects the chanegs made to PredicateOperand. by Evan Cheng · 18 years ago
- 16b6598 Added ARM::CPSR to represent ARM CPSR status register. by Evan Cheng · 18 years ago
- ee568cf Unfortunately we now require C++ code to isel Bcc, conditional moves, etc. by Evan Cheng · 18 years ago
- c85e832 Each ARM use predicate operand is now made up of two components. The new component is the CPSR register. by Evan Cheng · 18 years ago
- 3b5b836 Added ARM::CPSR to represent ARM CPSR status register. by Evan Cheng · 18 years ago
- e644ef7 Convert .cvsignore files by John Criswell · 18 years ago
- e2446c6 Silence a warning. by Evan Cheng · 18 years ago
- d45eddd Revert the earlier change that removed the M_REMATERIALIZABLE machine by Dan Gohman · 18 years ago
- 0819a9d Fix the build. by Owen Anderson · 18 years ago
- ea859be Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from by Dan Gohman · 18 years ago
- 5411835 Quote complex names for Darwin X86 and ARM. by Dale Johannesen · 18 years ago
- 97e604e Be more conservative of duplicating blocks. by Evan Cheng · 18 years ago
- 277f074 Allow predicated immediate ARM to ARM calls. by Evan Cheng · 18 years ago
- 82a87a0 Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad by Dan Gohman · 18 years ago
- eaa91b0 Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit. by Evan Cheng · 18 years ago
- d42e56e Instructions with unique labels or embedded jumptables cannot be duplicated during ifcvt. by Evan Cheng · 18 years ago
- 13e8b51 Handle blocks with 2 unconditional branches in AnalyzeBranch. by Dale Johannesen · 18 years ago
- bfd2ec4 Add a utility routine to check for unpredicated terminator instruction. by Evan Cheng · 18 years ago
- 61718a6 Define AsmTransCBE for ARM. by Lauro Ramos Venancio · 18 years ago
- 1fc7cb6 Fix ARM condition code subsumission check. by Evan Cheng · 18 years ago
- f81dea4 tBcc is not a barrier. by Evan Cheng · 18 years ago
- 9328c1a Stupid cut-n-paste bug caused me soooo much grief. Why wasn't there a compilation warning? I blame it on the FE folks. by Evan Cheng · 18 years ago
- 2c614c5 Mark these instructions clobbersPred. They modify the condition code register. by Evan Cheng · 18 years ago
- 5e148a3 Print predicate of the second instruction of the two-piece constant MI. by Evan Cheng · 18 years ago
- 341dccc PIC label asm printing cosmetic changes. by Evan Cheng · 18 years ago
- c621ae7 update this entry, now that Anton implemented shift/and lowering for by Chris Lattner · 18 years ago