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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / f34be827ac3bb257939e31575fcfc9ef27b94306 / lib / CodeGen
  1. f34be82 StringMap<DIE*>::iterator::first() returns a pointer to the first character of by Bill Wendling · 16 years ago
  2. 9238385 Silence unused variable warning. by Devang Patel · 16 years ago
  3. c30aa7b ignore register zero in isRegTiedToUseOperand, following the example of by Chris Lattner · 16 years ago
  4. 972bbac Use a StringMap instead of std::map for storing std::string->DIE* maps. This by Bill Wendling · 16 years ago
  5. b396992 llvm.dbg.func_start also defines beginning of function scope. by Devang Patel · 16 years ago
  6. d9df501 Fix pr3954. The register scavenger asserts for inline assembly with by Bob Wilson · 16 years ago
  7. 0c8382c reg0 references are not real registers. This fixes a crash on the by Chris Lattner · 16 years ago
  8. 57fc82d Generalize ExtendUsesToFormExtLoad to be usable for ANY_EXTEND, by Dan Gohman · 16 years ago
  9. 8e5c0da Don't copy the operand of a SwitchInst into virtual registers as by Dan Gohman · 16 years ago
  10. 75b2738 If subprogram type is not tagged as DW_TAG_subroutine_type then use it directly as a return value type. by Devang Patel · 16 years ago
  11. 3d0355b Soft float support for FREM. by Duncan Sands · 16 years ago
  12. 7beb1ec Soft float support for undef. Reported by Xerxes Rånby. by Duncan Sands · 16 years ago
  13. a118c2e change printStringChar to emit characters as unsigned char instead of char, by Chris Lattner · 16 years ago
  14. 97121ba Implement support for using modeling implicit-zero-extension on x86-64 by Dan Gohman · 16 years ago
  15. a49a671 Revert prev. patch for now. by Devang Patel · 16 years ago
  16. caf6129 Right now DBG_LABEL are required for llvm.dbg.region_start and llvm.dbg.region_end in non-fast mode also. by Devang Patel · 16 years ago
  17. 4fd5528 Don't attempt to handle aggregate argument values in FastISel; let by Dan Gohman · 16 years ago
  18. f50c798 Fix a TargetLowering optimization so that it doesn't duplicate by Dan Gohman · 16 years ago
  19. 8f9643f Delete ISD::INSERT_SUBREG and ISD::EXTRACT_SUBREG, which are unused. by Dan Gohman · 16 years ago
  20. 5274a4a To convert the StopPoint insn into an assembler directive by ISel, we need to have access to the line number field. So we convert that info as an operand by custom handling DBG_STOPPOINT in legalize. by Sanjiv Gupta · 16 years ago
  21. 6fb2168 Fully general expansion of integer shift of any size. by Evan Cheng · 16 years ago
  22. 968dc7a Reapply 68073, with fixes. EH Landing-pad basic blocks are not by Dan Gohman · 16 years ago
  23. 456e281 Minor top-level comment fix. by Dan Gohman · 16 years ago
  24. e67f5e4 Oy! When reverting r68073, I added in experimental code. Sorry... by Bill Wendling · 16 years ago
  25. 696a130 Remove the "fast" cases for spill and restore point determination, as these were subtlely wrong in obscure cases. Patch the testcase by Owen Anderson · 16 years ago
  26. 8fe0054 Revert r68073. It's causing a failure in the Apple-style builds. by Bill Wendling · 16 years ago
  27. 07c26ee Fix live-out reg logic to not insert over-aggressive AssertZExt by Dan Gohman · 16 years ago
  28. e6f350d Turn a 2-address instruction into a 3-address one when it's profitable even if the two-address operand is killed. by Evan Cheng · 16 years ago
  29. fd302b7 Balance out quote in debug output. by Bill Wendling · 16 years ago
  30. 430d423 Fix grammar-o in comment. by Bill Wendling · 16 years ago
  31. 6d1b89e Constify arguments in isSuccessor and isLayoutSuccessor. by Dan Gohman · 16 years ago
  32. 004e27c Fix PR3899: add support for extracting floats from vectors by Duncan Sands · 16 years ago
  33. 11ff978 Make check in CheckTailCallReturnConstraints for ignorable instructions between by Arnold Schwaighofer · 16 years ago
  34. e75fd69 Enable tail call optimization for functions that return a struct (bug 3664) and for functions that return types that need extending (e.g i1). by Arnold Schwaighofer · 16 years ago
  35. 0b0cd91 Optimize some 64-bit multiplication by constants into two lea's or one lea + shl since imulq is slow (latency 5). e.g. by Evan Cheng · 16 years ago
  36. a80efce Fix what surely must be a copy+pasto. by Dan Gohman · 16 years ago
  37. 84d08db Initialize LiveOutInfo's APInt members to zero, as APInt's by Dan Gohman · 16 years ago
  38. ea4d351 Shrink wrapping in PEI: initial release. Finishing development, enable with --shrink-wrap. by John Mosby · 16 years ago
  39. b98bbb7 Don't assign a new stack slot if the pre-alloc splitter already assigned one. by Owen Anderson · 16 years ago
  40. a02a3dd Pull transform from target-dependent code into target-independent code. by Bill Wendling · 16 years ago
  41. 3927f43 Revert 67132. This is breaking some objective-c apps. by Evan Cheng · 16 years ago
  42. beaec4c When optimizing with debug info, don't keep the by Dale Johannesen · 16 years ago
  43. 42bf74b CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose. by Evan Cheng · 16 years ago
  44. 86bda41 Do not ignore DW_TAG_class_type! by Devang Patel · 16 years ago
  45. 78a5bd5 Fix PR3845: Avoid stale MachineInstruction pointer reference. by Evan Cheng · 16 years ago
  46. e2f7bf8 more tidying: name the components of PhysReg in the case when by Chris Lattner · 16 years ago
  47. b3b4484 Tidy a bit more. by Chris Lattner · 16 years ago
  48. fc9d161 simplify this code a bit now that "allocation to a vreg class" can never fail. by Chris Lattner · 16 years ago
  49. 8f4aa33 Minor compile-time optimization; don't bother checking by Dan Gohman · 16 years ago
  50. 002b44f Add a pre-pass to the burr-list scheduler which makes adjustments to by Dan Gohman · 16 years ago
  51. f1c0ae9 Do not emit comments unless -asm-verbose. by Evan Cheng · 16 years ago
  52. 5d088fe Fix a bug in spill weight computation. If the alias is a super-register, and the super-register is in the register class we are trying to allocate. Then add the weight to all sub-registers of the super-register even if they are not aliases. by Evan Cheng · 16 years ago
  53. 1b25cb2 Fix internal representation of fp80 to be the by Dale Johannesen · 16 years ago
  54. fa9afef When unfolding a load during scheduling, the new operator node has by Dan Gohman · 16 years ago
  55. 2824a65 Fix PR3391 and PR3864. Reg allocator infinite looping. by Evan Cheng · 16 years ago
  56. 8cccf0e Don't set SUnit::hasPhysRegDefs to true unless the defs are by Dan Gohman · 16 years ago
  57. a5c8ae2 Fix canClobberPhysRegDefs to check all SDNodes grouped together by Dan Gohman · 16 years ago
  58. 3974667 Add a new bit to SUnit to record whether a node has implicit physreg by Dan Gohman · 16 years ago
  59. f871ccb Now that errs() is properly non-buffered, there's no need to by Dan Gohman · 16 years ago
  60. fb11288 Model inline asm constraint which ties an input to an output register as machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies. by Evan Cheng · 16 years ago
  61. 7d6d4b3 Do not fold away subreg_to_reg if the source register has a sub-register index. That means the source register is taking a sub-register of a larger register. e.g. On x86 by Evan Cheng · 16 years ago
  62. db95fa1 Simplify this code; use a while instead of an if and a do-while. by Dan Gohman · 16 years ago
  63. 697cbbf For inline asm output operand that matches an input. Encode the input operand index in the high bits. by Evan Cheng · 16 years ago
  64. 91520ea Fixed build warnings for unused variables. by Sanjiv Gupta · 16 years ago
  65. b169426 Fixed the comment. No functionality change. by Sanjiv Gupta · 16 years ago
  66. 8fc2d0e Apply the patch requested in PR3846. by Chris Lattner · 16 years ago
  67. 48fe635 Fix the Win32 VS2008 build: by Sebastian Redl · 16 years ago
  68. a24752f Added MachineInstr::isRegTiedToDefOperand to check for two-addressness. by Evan Cheng · 16 years ago
  69. 5e6345b Fix PEI to not walk off the start of a block when an updated instruction by Chris Lattner · 16 years ago
  70. aa9df0b Added missing support for widening when splitting an unary op (PR3683) by Mon P Wang · 16 years ago
  71. 152932b Don't force promotion of return arguments on the callee. by Rafael Espindola · 16 years ago
  72. 0b18e59 Fix codegen to compute the size of an allocation by multiplying the by Chris Lattner · 16 years ago
  73. 12a9dc8 r66870 missed this out. by Sanjiv Gupta · 16 years ago
  74. a5fec0d Reapply r67049, with the test adjusted for darwin by Duncan Sands · 16 years ago
  75. 93b7415 Fix a problem with DAGCombine where we were building an illegal build by Mon P Wang · 16 years ago
  76. e47b008 Spiller may unfold load / mod / store instructions as an optimization when the would be loaded value is available in a register. It needs to check if it's legal to clobber the register. Also, the register can contain values of multiple spill slots, make sure to check all instead of just the one being unfolded. by Evan Cheng · 16 years ago
  77. db14d63 --- Reverse-merging (from foreign repository) r67049 into '.': by Bill Wendling · 16 years ago
  78. dfec24c Tweak the fix for PR3784: be less sensitive about just by Duncan Sands · 16 years ago
  79. 420dd37 Give the pre-alloc splitter access to the VirtRegMap. It doesn't do anything by Owen Anderson · 16 years ago
  80. cfbf05e Add newlines at end of file (this can annoy gcov) by Daniel Dunbar · 16 years ago
  81. 0b7a786 Avoid doing the transformation c ? 1.0 : 2.0 as load { 2.0, 1.0 } + c*4 by Mon P Wang · 16 years ago
  82. 474d3b3 Improve FastISel's handling of truncates to i1, and implement by Dan Gohman · 16 years ago
  83. fc0b80d Fix PR3784: If the source of a phi comes from a bb ended with an invoke, make sure the copy is inserted before the try range (unless it's used as an input to the invoke, then insert it after the last use), not at the end of the bb. by Evan Cheng · 16 years ago
  84. 14ea1ec Fix FastISel's assumption that i1 values are always zero-extended by Dan Gohman · 16 years ago
  85. 1606e8e Fix some significant problems with constant pools that resulted in unnecessary paddings between constant pool entries, larger than necessary alignments (e.g. 8 byte alignment for .literal4 sections), and potentially other issues. by Evan Cheng · 16 years ago
  86. 49c8aa0 Convert VirtRegMap to a MachineFunctionPass. by Owen Anderson · 16 years ago
  87. 0582ae9 Oops...I committed too much. by Bill Wendling · 16 years ago
  88. c7a09ab Temporarily XFAIL this test. by Bill Wendling · 16 years ago
  89. b398fca Fix a typo in a comment. by Dan Gohman · 16 years ago
  90. 0ff4e21 Reorganize some #include's. by Owen Anderson · 16 years ago
  91. d1980a5 Move 3 "(add (select cc, 0, c), x) -> (select cc, x, (add, x, c))" by Chris Lattner · 16 years ago
  92. 8042255 Enable Chris' value propagation change. It make available known sign, zero, one bits information for values that are live out of basic blocks. The goal is to eliminate unnecessary sext, zext, truncate of values that are live-in to blocks. This does not handle PHI nodes yet. by Evan Cheng · 16 years ago
  93. c40d4f8 update by Gabor Greif · 16 years ago
  94. 1ed5b71 Reorganization: Move the Spiller out of VirtRegMap.cpp into its own files. No (intended) functionality change. by Owen Anderson · 16 years ago
  95. a597a97 My last coalescer fix introduced a subtler one. It's aborting a commuting optimization too late and left the live intervals to be out of sync with instructions. This fixes 8b10b. by Evan Cheng · 16 years ago
  96. 4dc2b39 It makes no sense to have a ODR version of common linkage, so remove it. by Duncan Sands · 16 years ago
  97. 9e8bd0b Add parentheses to pacify gcc-4.3. by Duncan Sands · 16 years ago
  98. 600fec3 reapply my previous patch (r66358) with a tweak to set the by Chris Lattner · 16 years ago
  99. 1362f97 Put the assignment back at the top of this method. by Bill Wendling · 16 years ago
  100. a2e6435 Two coalescer fixes in one. by Evan Cheng · 16 years ago