1. 8b6a20a Add test case for r90108 by Mon P Wang · 15 years ago
  2. fb245e2 While this test is testing a problem in the generic part of codegen, by Duncan Sands · 15 years ago
  3. 695b9f3 Test for 89905. by Evan Cheng · 15 years ago
  4. e7c9195 ProcessImplicitDefs should watch out for invalidated iterator and extra implicit operands on copies. by Evan Cheng · 15 years ago
  5. d71cebf Support PIC loading of constant pool entries by Bruno Cardoso Lopes · 15 years ago
  6. f7801b4 Do not store R31 into the caller's link area on PPC. by Dale Johannesen · 15 years ago
  7. d7f0810 Enable predication of NEON instructions in Thumb2 mode. by Evan Cheng · 15 years ago
  8. 5cdc3a9 Materialize global addresses via movt/movw pair, this is always better by Anton Korobeynikov · 15 years ago
  9. 77b02be move fconst[sd] to UAL. <rdar://7414913> by Jim Grosbach · 15 years ago
  10. bbf56bb update test for 89694 by Jim Grosbach · 15 years ago
  11. 18d18b7 Miss two, PR5307. by Edward O'Callaghan · 15 years ago
  12. f4a93dd Convert Thumb2 tests to FileCheck for PR5307. by Edward O'Callaghan · 15 years ago
  13. bfd987b Turns out stuff gets allocated to different registers depending on the subtarget. by Benjamin Kramer · 15 years ago
  14. 11cc4fa Convert ARM tests to FileCheck for PR5307. by Edward O'Callaghan · 15 years ago
  15. 3ebd44d Convert test to FileCheck. by Benjamin Kramer · 15 years ago
  16. de9b6b1 Forgot to alter RUN line when converting to FileCheck. by Edward O'Callaghan · 15 years ago
  17. 85d1aab Fix for bad FileCheck converts in revision 89584. by Edward O'Callaghan · 15 years ago
  18. 81fff07 Convert a few tests to FileCheck for PR5307. by Edward O'Callaghan · 15 years ago
  19. 21ce2e3 Revert 89562. We're being sneakier than I was giving us credit for, and this by Jim Grosbach · 15 years ago
  20. f3b33d0 Darwin requires a frame pointer for all non-leaf functions to support correct by Jim Grosbach · 15 years ago
  21. b99b63c Don't leave temporary files in the test directory. by Jakob Stoklund Olesen · 15 years ago
  22. 5b8bce1 When generating a vector the really slow way, via loads by Dale Johannesen · 15 years ago
  23. c26abd9 Enable hoisting load from constant memories. by Evan Cheng · 15 years ago
  24. b9e6b34 Recommitting PALIGNR shift width fixes. by Sean Callanan · 15 years ago
  25. 5ca1246 Remove an incorrect overaggressive optimization (PPC specific). by Dale Johannesen · 15 years ago
  26. 1bbf6d1 Reverting PALIGNR fix until I figure out how this broke the Clang testsuite. by Sean Callanan · 15 years ago
  27. 201dfa7 Fixed PALIGNR to take 8-bit rotations in all cases. by Sean Callanan · 15 years ago
  28. 4aedb61 Remat VLDRD from constpool. Clean up some instruction property specifications. by Evan Cheng · 15 years ago
  29. c088ae8 Fix PR5558, which was caused by a wrong fix for PR3393 (see commit 63048), by Duncan Sands · 15 years ago
  30. b4afb13 Fix fast-isel to avoid selecting the return instruction if a by Dan Gohman · 15 years ago
  31. 9b82425 Also CSE non-pic load from constant pools. by Evan Cheng · 15 years ago
  32. 9ef4835 Fix codegen of conditional move of immediates. We were not making use of the immediate forms of cmov instructions at all. by Evan Cheng · 15 years ago
  33. 2b86caf Unbreak test, Bruno please check. by Daniel Dunbar · 15 years ago
  34. 2ef9c8a More consistent thumb1 asm printing. by Evan Cheng · 15 years ago
  35. 5b397c9 Shrink ldr / str [sp, imm0-1024] to 16-bit instructions. by Evan Cheng · 15 years ago
  36. 2045c47 - Add sugregister logic to handle f64=(f32,f32). by Bruno Cardoso Lopes · 15 years ago
  37. 77bd09b Test from Dhrystone to make sure that we're not emitting an aligned load for a by Bill Wendling · 15 years ago
  38. 41a0456 Fix buildbots. by Bob Wilson · 15 years ago
  39. bea7df5 Add XCore support for indirectbr / blockaddress. by Richard Osborne · 15 years ago
  40. 60f34b9 Tail duplication still needs to iterate. Duplicating new instructions onto by Bob Wilson · 15 years ago
  41. 0b25ae1 Fix PR5300. by Jakob Stoklund Olesen · 15 years ago
  42. 5052c15 Fix inverted test and add testcase from failing self-host. by Jakob Stoklund Olesen · 15 years ago
  43. 6c8a071 Remove fragile test. by Jakob Stoklund Olesen · 15 years ago
  44. f04777b Enable arm jumpt table adjustment. by Jim Grosbach · 15 years ago
  45. d2aad77 Forgot to commit test fixes by Anton Korobeynikov · 15 years ago
  46. 95a2c8f Enable -split-phi-edges by default, except when -regalloc=local. by Jakob Stoklund Olesen · 15 years ago
  47. 9e97f3c Revert 89021. It's miscompiling llvm-gcc driver driver at -O0. by Evan Cheng · 15 years ago
  48. 2cbe71c Enable -split-phi-edges by default by Jakob Stoklund Olesen · 15 years ago
  49. 6cccc30 MOV64rm should be marked isReMaterializable. by Evan Cheng · 15 years ago
  50. 1187285 Convert to FileCheck by Jim Grosbach · 15 years ago
  51. 727f0c3 Convert to FileCheck by Jim Grosbach · 15 years ago
  52. 2c0fb63 Cleanup. Missed removing these when converting. Oops. by Jim Grosbach · 15 years ago
  53. 1d8c9e7 Fix this test - there don't appear to be any actual Reload Reuses by Dan Gohman · 15 years ago
  54. 10190cc Revert r87049, which was the workaround for the regression triggered by Dan Gohman · 15 years ago
  55. 9f07f3b Convert to FileCheck by Jim Grosbach · 15 years ago
  56. 600c043 - Check memoperand alignment instead of checking stack alignment. Most load / store folding instructions are not referencing spill stack slots. by Evan Cheng · 15 years ago
  57. 2f74603 Convert to FileCheck by Jim Grosbach · 15 years ago
  58. 0d6dd49 Added a testcase for PR5495. by Lang Hames · 15 years ago
  59. 4adcade Convert to FileCheck by Jim Grosbach · 15 years ago
  60. c051750 tbb opt off by default by Jim Grosbach · 15 years ago
  61. ddff941 by David Greene · 15 years ago
  62. 39aa725 Check if subreg index is zero. by Evan Cheng · 15 years ago
  63. 285a7d5 For some targets, a copy can use a register multiple times, e.g. ppc. by Evan Cheng · 15 years ago
  64. 2d94726 xfail for now. It has been failing. by Evan Cheng · 15 years ago
  65. 6e0b658 - Fix a small bug while handling target constant pools (one param was missing). by Bruno Cardoso Lopes · 15 years ago
  66. a443217 Detect need for autoalignment of the stack earlier to catch spills more by Jim Grosbach · 15 years ago
  67. e11d26b remove xfail by Jim Grosbach · 15 years ago
  68. 13c4fab Add XCore support for arbitrary-sized aggregate returns. by Richard Osborne · 15 years ago
  69. fae3e92 Added getSubRegIndex(A,B) that returns subreg index of A to B. Use it to replace broken code in VirtRegRewriter. by Evan Cheng · 15 years ago
  70. d57cdd5 - Change TargetInstrInfo::reMaterialize to pass in TargetRegisterInfo. by Evan Cheng · 15 years ago
  71. e17ae4f Add radar number. by Evan Cheng · 15 years ago
  72. 8fdd84c Fix PR5412: Fix an inverted check and another missing sub-register check. by Evan Cheng · 15 years ago
  73. ed9bab3 Enable the tail call optimization when the caller returns undef. by Dan Gohman · 15 years ago
  74. 0cd22dd When expanding t2STRDi8 r, r to two stores, add kill markers correctly. by Evan Cheng · 15 years ago
  75. 1f6a3c8 Fix PR5411. Bug in UpdateKills. A reg def partially define its super-registers. by Evan Cheng · 15 years ago
  76. c4c550c When optimizing for size, don't tail-merge unless it's likely to be a by Dan Gohman · 15 years ago
  77. 236490d Fix PR5410: LiveVariables lost subreg def: by Evan Cheng · 15 years ago
  78. 01205a8 Don't let a noalias difference disrupt the tailcall optimization. by Dan Gohman · 15 years ago
  79. 1e60881 Adjust isConstantSplat to allow for big-endian targets. by Dale Johannesen · 15 years ago
  80. 6242495 Update test. by Daniel Dunbar · 15 years ago
  81. cb2c2b7 Clean up testcase a bit. Simplify case blocks and adjust switch instruction to not take an undefined value as input. by Jim Grosbach · 15 years ago
  82. 9e3728b Fix typo in run line. by Benjamin Kramer · 15 years ago
  83. 60f9061 RegScavenger::enterBasicBlock should always reset register state. by Evan Cheng · 15 years ago
  84. 586f69a - Teach LSR to avoid changing cmp iv stride if it will create an immediate that by Evan Cheng · 15 years ago
  85. ad6af45 Tail merge at any size when there are two potentials blocks and one by Dan Gohman · 15 years ago
  86. c158dde x86 users can now return arbitrary sized structs. Structs too large to fit in return registers will be returned through a hidden sret parameter introduced during SelectionDAG construction. by Kenneth Uildriks · 15 years ago
  87. 2210c0b Add support for tail duplication to BranchFolding, and extend by Dan Gohman · 15 years ago
  88. 0123974 Add nounwind. by Evan Cheng · 15 years ago
  89. 5606ec8 Fix test to work on every platform. by Bill Wendling · 15 years ago
  90. 13f6135 Fix test to work on every platform. by Bill Wendling · 15 years ago
  91. ee161a6 Make sure that the exception handling data has the same visibility as the by Bill Wendling · 15 years ago
  92. 6b41aba Test this on Darwin only. by Bill Wendling · 15 years ago
  93. 9a645cd Emit correct code when making a ConstantPool entry for a vector by Dale Johannesen · 15 years ago
  94. b19a5e9 Modify how the prologue encoded the "move" information for the FDE. GCC by Bill Wendling · 15 years ago
  95. 75adb32 Add testcase for recent checkin. by Mike Stump · 15 years ago
  96. 3f51147 Update test by Jim Grosbach · 15 years ago
  97. e516549 Use Unified Assembly Syntax for the ARM backend. by Jim Grosbach · 15 years ago
  98. f0b47b7 Add and-not (bic) patterns. Based heavily on patch by Brian Lucas! by Anton Korobeynikov · 15 years ago
  99. 52f28e9 Fix invalid operand updates & implement post-inc memory operands by Anton Korobeynikov · 15 years ago
  100. c2fd919 It is invalid to infer the value type from the result #0 of the node by Anton Korobeynikov · 15 years ago