1. f63be7d First round of support for doing scalar FP using the SSE2 ISA extension and by Nate Begeman · 20 years ago
  2. 0e0a7a45 * Remove trailing whitespace * Convert tabs to spaces by Misha Brukman · 20 years ago
  3. a76f048 When commuting these instructions, make sure to actually swap the operands too. by Chris Lattner · 21 years ago
  4. 0df53d2 Improve coverage of the X86 instruction set by adding 16-bit shift doubles. by Chris Lattner · 21 years ago
  5. 41e431b Teach the code generator that shrd/shld is commutable if it has an immediate. by Chris Lattner · 21 years ago
  6. 5aee0b9 Disable 2->3 address promotion of add and inc instructions to LEA's. In by Chris Lattner · 21 years ago
  7. bcea4d6 Implement the convertToThreeAddress method, add support for inverting JP/JNP by Chris Lattner · 21 years ago
  8. bcdda01 Fix a warning by Chris Lattner · 21 years ago
  9. 31e155e Align breaks. by Alkis Evlogimenos · 21 years ago
  10. 167cf33 Add breaks by Chris Lattner · 21 years ago
  11. 6103c17 Simplify code a bit. by Alkis Evlogimenos · 21 years ago
  12. 02a4530 Correctly spell 'unconditional'. by Alkis Evlogimenos · 21 years ago
  13. 36f506e Implement insertGoto and reverseBranchCondition for the X86. by Alkis Evlogimenos · 21 years ago
  14. 8295f20 A big X86 instruction rename. The instructions are renamed to make by Alkis Evlogimenos · 21 years ago
  15. dce363d Adjust to change in TII ctor arguments by Chris Lattner · 21 years ago
  16. 1ddf475 These two virtual methods are never called. by Chris Lattner · 21 years ago
  17. 890f923 Move MOTy::UseType enum into MachineOperand. This eliminates the by Alkis Evlogimenos · 21 years ago
  18. be766c7 Remove getAllocatedRegNum(). Use getReg() instead. by Alkis Evlogimenos · 22 years ago
  19. 6d21518 Don't use MachineOperator::is(Phys|Virt)Register by Chris Lattner · 22 years ago
  20. 0bbf305 Tighten up checks by Chris Lattner · 22 years ago
  21. a1b6f95 FpMOV is also a move instruction. by Alkis Evlogimenos · 22 years ago
  22. 5e30002 Add TargetInstrInfo::isMoveInstr() to support coalescing in register allocation. by Alkis Evlogimenos · 22 years ago
  23. d0fde30 Put all LLVM code into the llvm namespace, as per bug 109. by Brian Gaeke · 22 years ago
  24. b576c94 Added LLVM project notice to the top of every C++ source file. by John Criswell · 22 years ago
  25. abf05b2 * Start using tablegen'd instruction descriptions by Chris Lattner · 22 years ago
  26. 12745c5 Reword to remove reference to how things worked in the past. by Misha Brukman · 22 years ago
  27. e9d8838 Implement the TargetInstrInfo's createNOPinstr() and isNOPinstr() interface. by Misha Brukman · 22 years ago
  28. 3501fea Rename MachineInstrInfo -> TargetInstrInfo by Chris Lattner · 23 years ago
  29. b339223 Add comments, switch uses/defs to match InstrInfo.def file by Chris Lattner · 23 years ago
  30. 4ce42a7 * Move information about Implicit Defs/Uses into X86InstrInfo.def. by Chris Lattner · 23 years ago
  31. a85d6bc Added -*- C++ -*- mode to the comments. by Misha Brukman · 23 years ago
  32. f21dfcd Expose base opcode by Chris Lattner · 23 years ago
  33. 6aab9cf Start to add more information to instr.def by Chris Lattner · 23 years ago
  34. dbb61c6 Reorganize printing interface a bit by Chris Lattner · 23 years ago
  35. b752e9a Set the destination register field based on the target specific flags by Chris Lattner · 23 years ago
  36. 055c965 Rename X86InstructionInfo to X86InstrInfo by Chris Lattner · 23 years ago
  37. 33f53b5 Minor renaming by Chris Lattner · 23 years ago
  38. 9bbf439 Implement MachineInstrInfo interface by Chris Lattner · 23 years ago
  39. 7261408 Initial checkin of X86 backend. by Chris Lattner · 23 years ago