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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / f75a7d3fbf7fbb3071f45e248d3fb93312ec4fbd / lib / CodeGen / SelectionDAG
  1. f75a7d3 Eliminate the restriction that the array size in an alloca must be i32. by Dan Gohman · 15 years ago
  2. 0798edd Update the saved stack pointer in the sjlj function context following either by Jim Grosbach · 15 years ago
  3. a658502 back out 104862/104869. Can reuse stacksave after all. Very cool. by Jim Grosbach · 15 years ago
  4. 084fb0e hook ISD::STACKADDR to an intrinsic by Jim Grosbach · 15 years ago
  5. 804a231 Add FIXME comment to remove this. by Bill Wendling · 15 years ago
  6. 8d717c7 Add "setjmp_syscall", "savectx", "qsetjmp", "vfork", "getcontext" to the list of by Bill Wendling · 15 years ago
  7. 23ff7cf Adjust eh.sjlj.setjmp to properly have a chain and to have an opcode entry in by Jim Grosbach · 15 years ago
  8. 394427b Update debug info when live-in reg is copied into a vreg. by Devang Patel · 15 years ago
  9. 9af7e9a Move the check for "calls setjmp" to SelectionDAGISel so that it can be used by by Bill Wendling · 15 years ago
  10. 93d3433 Eliminate the use of PriorityQueue and just use a std::vector, by Dan Gohman · 15 years ago
  11. d89c258 Delete an unused function. by Dan Gohman · 15 years ago
  12. 174e597 Temporarily revert r104655 as it's breaking the bots. by Eric Christopher · 15 years ago
  13. a4e4ffd Change push_all to a non-virtual function and implement it in the by Dan Gohman · 15 years ago
  14. 5eabaa2 Trim #include. by Dan Gohman · 15 years ago
  15. be22683 Dale and Evan suggested putting the "check for setjmp" much earlier in the by Bill Wendling · 15 years ago
  16. eddc114 Do one map lookup instead of two. by Dan Gohman · 15 years ago
  17. 86234c3 Fix another variant of PR 7191. Also add a testcase by Dale Johannesen · 15 years ago
  18. 61734eb Fix PR 7191. I have been unable to create a .ll file that fails, sorry. by Dale Johannesen · 15 years ago
  19. 5eb1951 Implement eh.sjlj.longjmp for ARM. Clean up the intrinsic a bit. by Jim Grosbach · 15 years ago
  20. 70fe664 Clean up extra whitespace. by Bob Wilson · 15 years ago
  21. 78f006a Change CodeGen/ARM/2009-11-02-NegativeLane.ll to use 16-bit vector elements by Bob Wilson · 15 years ago
  22. b11ac95 Rename -pre-RA-sched=hybrid to -pre-RA-sched=list-hybrid. by Evan Cheng · 15 years ago
  23. 1cc3984 Allow targets more controls on what nodes are scheduled by reg pressure, what for latency in hybrid mode. by Evan Cheng · 15 years ago
  24. 15a16de Add a hybrid bottom up scheduler that reduce register usage while avoiding by Evan Cheng · 15 years ago
  25. 492fd45 Optimize away insertelement of an undef value. This shows up in by Bob Wilson · 15 years ago
  26. e163168 Code clean up. by Evan Cheng · 15 years ago
  27. 211ffa1 Code refactoring: pull SchedPreference enum from TargetLowering.h to TargetMachine.h and put it in its own namespace. by Evan Cheng · 15 years ago
  28. 14b2141 When expanding a vector_shuffle, the element type may not be legal and may by Bob Wilson · 15 years ago
  29. 0a942db Intrinsics which do a vector compare (results are all zero or all ones) are modeled as icmp / fcmp + sext. This is turned into a vsetcc by dag combine (yes, not a good long term solution). The targets can then isel the vsetcc to the appropriate instruction. by Evan Cheng · 15 years ago
  30. 28dad2a Sink dag combine's post index load / store code that swap base ptr and index into the target hook. Only the target knows whether the swap is safe. In Thumb2 mode, the offset must be an immediate. rdar://7998649 by Evan Cheng · 15 years ago
  31. 5012f9b Continuously refine the register class of REG_SEQUENCE def with all the source registers and sub-register indices. by Evan Cheng · 15 years ago
  32. 27e4840 Fix PR7162: Use source register classes and sub-indices to determine the correct register class of the definitions of REG_SEQUENCE. by Evan Cheng · 15 years ago
  33. a083988 FIX PR7158. SimplifyVBinOp was asserting when it fails to constant fold (op (build_vector), (build_vector)). by Evan Cheng · 15 years ago
  34. 53f7602 - Set the "HasCalls" flag after instruction selection is finished. by Bill Wendling · 15 years ago
  35. 8d908eb Fix uint64->{float, double} conversion to do rounding correctly in 32-bit. by Dale Johannesen · 15 years ago
  36. 7899551 Improve assertion messages. by Dale Johannesen · 15 years ago
  37. 7f0d695 Fast ISel trivially coalesces away no-op casts, so check for this when by Dan Gohman · 15 years ago
  38. 8b3a8f5 Don't set kill flags for instructions which the scheduler has cloned. by Dan Gohman · 15 years ago
  39. b92187a Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what by Bill Wendling · 15 years ago
  40. a5afa1c Implement a correct ui64->f32 conversion. The old by Dale Johannesen · 15 years ago
  41. e1308d8 An Instruction has a trivial kill only if its use is in the same basic block. by Dan Gohman · 15 years ago
  42. a6cb641 Add initial kill flag support to FastISel. by Dan Gohman · 15 years ago
  43. 9d7019f Don't set kill flags on uses of CopyFromReg nodes. InstrEmitter doesn't by Dan Gohman · 15 years ago
  44. 16d8f8b I got tired of VISIBILITY_HIDDEN colliding with the gcc enum. Rename it by Duncan Sands · 15 years ago
  45. 038df88 Trim #includes and forward declarations. by Dan Gohman · 15 years ago
  46. ff7a562 Implement a bunch more TargetSelectionDAGInfo infrastructure. by Dan Gohman · 15 years ago
  47. 7d9663c Fixes for Microsoft Visual Studio 2010, from Steven Watanabe! by Douglas Gregor · 15 years ago
  48. 60ffa94 Indentation. by Evan Cheng · 15 years ago
  49. aad753b Be careful with operand promotion. For a binary operation, the source operands may be the same. PR7018. rdar://7939869. by Evan Cheng · 15 years ago
  50. ad017dc Add an assertion to catch attempts to access off the end of the array. by Duncan Sands · 15 years ago
  51. 4ce86f4 SDDbgValues are apparently not being legalized. Fix a symptom of the problem, by Dan Gohman · 15 years ago
  52. 02f0dbd Verify variable directly. by Devang Patel · 15 years ago
  53. 0a406ae Fix PR 7087, and probably other things, by extending by Dale Johannesen · 15 years ago
  54. fb95f89 Transfer debug location information from PHI nodes to resulting lowered copies. by Dan Gohman · 15 years ago
  55. cc751bb Print debug information for SDNodes. by Dan Gohman · 15 years ago
  56. 34dcc6f Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it by Dan Gohman · 15 years ago
  57. 97c94b8 In bottom-up mode, defer the materialization of local constant values. by Dan Gohman · 15 years ago
  58. a7a0ed7 Add an "IsBottomUp" member function to FastISel, which will be used to by Dan Gohman · 15 years ago
  59. d47f3c8 Use getValue() for PHINodes when direct NodeMap access does not work. by Devang Patel · 15 years ago
  60. f1ced25 Instruction selection optimizations may have moved the def of a function argument out of the entry block. rdar://7937489 by Evan Cheng · 15 years ago
  61. ba609c8 Teach scheduler about REG_SEQUENCE. by Evan Cheng · 15 years ago
  62. 2131e2a Re-enable isel kill flags, now that the local allocator is ignoring them. by Dan Gohman · 15 years ago
  63. 1fdc614 Factor out FastISel's code for materializing constants and other values by Dan Gohman · 15 years ago
  64. 17458a7 Insert ANY_EXTEND node instead of invalid truncate during DAG Combining (X & 1), by Anton Korobeynikov · 15 years ago
  65. d725f04 Remove the code for special-casing byval for fast-isel. SelectionDAG by Dan Gohman · 15 years ago
  66. 0b7afeb Re-disable kill flags, as there is more trouble. by Dan Gohman · 15 years ago
  67. 3a401bc Re-enable kill flags from SelectionDAGISel, with a fix: don't by Dan Gohman · 15 years ago
  68. 1b79a2f Fix whitespace. by Dan Gohman · 15 years ago
  69. 5d11ea3 Don't pass SDValues by non-const reference unless they may be modified. by Dan Gohman · 15 years ago
  70. 95140a4 Reorgnaize more switch code lowering to clean up some tricky by Dan Gohman · 15 years ago
  71. 1b40319 Delete the EdgeMapping variable itself. by Dan Gohman · 15 years ago
  72. af1d8ca Get rid of the EdgeMapping map. Instead, just check for BasicBlock by Dan Gohman · 15 years ago
  73. d71bb56 EXTRACT_VECTOR_ELT of an INSERT_VECTOR_ELT may have the same index, but the by Bill Wendling · 15 years ago
  74. e7fd7c6 Remove this debug output. The MachineFunction will be printed once all of by Dan Gohman · 15 years ago
  75. 891ff8f EmitDbgValue doesn't need its EdgeMapping argument. by Dan Gohman · 15 years ago
  76. 3ce89f4 Apply a patch from Jan Sjodin to fix a compiler abort on vector by Dan Gohman · 15 years ago
  77. 71cee76 Temporarily disable SelectionDAG kill flags, which are causing trouble. by Dan Gohman · 15 years ago
  78. 47bd03b Set register kill flags on the SelectionDAG path, at least in the easy cases. by Dan Gohman · 15 years ago
  79. 719f6a9 Refactor. by Devang Patel · 15 years ago
  80. a83ce98 DO not push DBG_VALUE machine instructions for inlined fuction arguments in entry block. by Devang Patel · 15 years ago
  81. 8fed761 Add comment. by Evan Cheng · 15 years ago
  82. a36acad Re-enable 102565 with fixes. by Evan Cheng · 15 years ago
  83. 16e4ace Temporarily disable my changes to unbreak the build. by Evan Cheng · 15 years ago
  84. 9e8a2b9 Do not generate duplicate dbg_value instructions for function arguments. by Evan Cheng · 15 years ago
  85. c924556 Fix missing #include. by Dan Gohman · 15 years ago
  86. ee1d91a Avoid emitting a dbg_value machineinstr that's not going to be inserted into entry block. by Evan Cheng · 15 years ago
  87. 1deef27 Check Reg against zero. by Evan Cheng · 15 years ago
  88. f38c6c8 tidy up. by Devang Patel · 15 years ago
  89. 2ad0fcf Replace r102368 with code that's less fragile. This creates DBG_VALUE instructions for function arguments early and insert them after instruction selection is done. by Evan Cheng · 15 years ago
  90. 54fc4d6 While lowering dbg_declare, emit DBG_VALUE machine instruction if alloca matching llvm.dbg.declare intrinsic is missing. by Devang Patel · 15 years ago
  91. b3a3d5e Try operation promotion only if regular dag combine and target-specific ones failed to do anything. by Evan Cheng · 15 years ago
  92. 0f9d952 Ignore DBG_VALUE instructions that points to undef values. by Devang Patel · 15 years ago
  93. ac7eae5 - When legal, promote a load to zextload rather than ext load. by Evan Cheng · 15 years ago
  94. fc0b860 Revert a small part of 102372; this fixes at least one by Dale Johannesen · 15 years ago
  95. cc7354e Avoid adding a null MD node operand, which crashes with "-debug" when trying by Bob Wilson · 15 years ago
  96. 925965e Remove crufty comments. by Dale Johannesen · 15 years ago
  97. fdb42fa Add DBG_VALUE handling for byval parameters; this by Dale Johannesen · 15 years ago
  98. 962021b - Move TargetLowering::EmitTargetCodeForFrameDebugValue to TargetInstrInfo and rename it to emitFrameIndexDebugValue. by Evan Cheng · 15 years ago
  99. f822e73 Stop abusing EmitInstrWithCustomInserter for target-dependent by Dale Johannesen · 15 years ago
  100. 7dc7840 Add comment re byval args. Doesn't actually work this way yet. xs by Dale Johannesen · 15 years ago