1. 45e5397 Apparently, it is possible for a block with a landing pad successor to have no calls. by Jakob Stoklund Olesen · 15 years ago
  2. cb64047 Add LiveIntervals::getLastSplitPoint(). by Jakob Stoklund Olesen · 15 years ago
  3. c9df025 Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic. by Jakob Stoklund Olesen · 15 years ago
  4. 4314268 Replace TargetRegisterInfo::printReg with a PrintReg class that also works without a TRI instance. by Jakob Stoklund Olesen · 15 years ago
  5. f4840c0 Fix emergency spilling in LiveIntervals::spillPhysRegAroundRegDefsUses. by Jakob Stoklund Olesen · 15 years ago
  6. 7c2e4a8 Fix PR8612 in the standard spiller, take two. by Jakob Stoklund Olesen · 15 years ago
  7. bea0b6a Revert "Fix PR8612 in the standard spiller as well." by Jakob Stoklund Olesen · 15 years ago
  8. a284aa1 Fix PR8612 in the standard spiller as well. by Jakob Stoklund Olesen · 15 years ago
  9. f4baeaf RABasic is nearly functionally complete. There are a few remaining by Andrew Trick · 15 years ago
  10. f4a1e1a Teach MachineBasicBlock::print() to annotate instructions and blocks with by Jakob Stoklund Olesen · 15 years ago
  11. 2ab36d3 Begin adding static dependence information to passes, which will allow us to by Owen Anderson · 15 years ago
  12. 31cc3ec Replace FindLiveRangeContaining() with getVNInfoAt() in LiveIntervalAnalysis. by Jakob Stoklund Olesen · 15 years ago
  13. ce665bd Now with fewer extraneous semicolons! by Owen Anderson · 15 years ago
  14. 6e2968c Removed VNInfo::isDefAccurate(). Def "accuracy" can be checked by testing whether LiveIntervals::getInstructionFromIndex(def) returns NULL. by Lang Hames · 15 years ago
  15. 011e591 Remove SlotIndex::PHI_BIT. It is no longer used by anything. by Jakob Stoklund Olesen · 15 years ago
  16. 148341c PHI elimination shouldn't require machineloopinfo since it's used at -O0. Move the requirement to LiveIntervalAnalysis instead. Note this does not change the number of times machineloopinfo is computed. by Evan Cheng · 15 years ago
  17. 1b29320 Remove trailing whitespace. by Jakob Stoklund Olesen · 15 years ago
  18. bae6969 Oops. Don't normalize spill weights twice. by Jakob Stoklund Olesen · 15 years ago
  19. d13db2c Fix batch of converting RegisterPass<> to INTIALIZE_PASS(). by Owen Anderson · 15 years ago
  20. 04c528a Remove many calls to TII::isMoveInstr. Targets should be producing COPY anyway. by Jakob Stoklund Olesen · 15 years ago
  21. 8ea3240 Fix small bug in isMoveInstr -> COPY translation by Jakob Stoklund Olesen · 15 years ago
  22. e05442d Change TII::foldMemoryOperand API to require the machine instruction to be by Jakob Stoklund Olesen · 15 years ago
  23. 0bc25f4 Convert EXTRACT_SUBREG to COPY when emitting machine instrs. by Jakob Stoklund Olesen · 15 years ago
  24. 5c00e07 Remove references to INSERT_SUBREG after de-SSA. by Jakob Stoklund Olesen · 15 years ago
  25. 4b76ffc Revert "Remove references to INSERT_SUBREG after de-SSA" r107725. by Jakob Stoklund Olesen · 15 years ago
  26. d3b376b Remove references to INSERT_SUBREG after de-SSA by Jakob Stoklund Olesen · 15 years ago
  27. ed2185e Convert INSERT_SUBREG to COPY in TwoAddressInstructionPass. by Jakob Stoklund Olesen · 15 years ago
  28. 273f7e4 Detect and handle COPY in many places. by Jakob Stoklund Olesen · 15 years ago
  29. ce9a20b VNInfos don't need to be destructed anymore. by Benjamin Kramer · 15 years ago
  30. 15a5714 Don't track kills in VNInfo. Use interval ends instead. by Jakob Stoklund Olesen · 15 years ago
  31. 3c7b3fe Remove the now unused LiveIntervals::getVNInfoSourceReg(). by Jakob Stoklund Olesen · 15 years ago
  32. 54edf4f Remove the -fast-spill option. by Jakob Stoklund Olesen · 15 years ago
  33. a24986d Replace a big gob of old coalescer logic with the new CoalescerPair class. by Jakob Stoklund Olesen · 15 years ago
  34. af5c60b Verify that VNI kills are pointing to existing instructions. by Jakob Stoklund Olesen · 15 years ago
  35. b8ac3b0 Revert "Replace a big gob of old coalescer logic with the new CoalescerPair class." by Jakob Stoklund Olesen · 15 years ago
  36. e9c5971 Replace a big gob of old coalescer logic with the new CoalescerPair class. by Jakob Stoklund Olesen · 15 years ago
  37. 0465bcf TwoAddressInstructionPass::CoalesceExtSubRegs can insert INSERT_SUBREG by Jakob Stoklund Olesen · 15 years ago
  38. c66d0f2 Allow a register to be redefined multiple times in a basic block. by Jakob Stoklund Olesen · 15 years ago
  39. ead06be Use readsWritesVirtualRegister instead of counting uses and defs when inserting by Jakob Stoklund Olesen · 15 years ago
  40. 1015ba7 - Change MachineInstr::findRegisterDefOperandIdx so it can also look for defs by Evan Cheng · 15 years ago
  41. 19f5f71 Revert "Use MachineInstr::readsWritesVirtualRegister to determine if a register is read." by Jakob Stoklund Olesen · 15 years ago
  42. 00c53ca Use MachineInstr::readsWritesVirtualRegister to determine if a register is read. by Jakob Stoklund Olesen · 15 years ago
  43. 63e6a48 If the first definition of a virtual register is a partial redef, add an by Jakob Stoklund Olesen · 15 years ago
  44. 761fd4c Fix typo in comment. by Nick Lewycky · 15 years ago
  45. ad6c5a2 Yes, if the redef is a copy, update the old val# with the copy. But make sure to clear the copy field if the redef is not a copy. by Evan Cheng · 15 years ago
  46. 87565c1 improve portability to systems that don't have powf/modf (e.g. solaris 9) by Chris Lattner · 15 years ago
  47. 61d5310 A partial re-def instruction may be a copy. by Evan Cheng · 15 years ago
  48. 623d3c1 Re-defined valno is always valno even for partial re-def's. by Evan Cheng · 15 years ago
  49. 3749943 Teach liveintervalanalysis about virtual registers which are defined by reg_sequence instructions that are formed by registers defined by distinct instructions. e.g. by Evan Cheng · 15 years ago
  50. afff40a Teach PHI elimination to remove REG_SEQUENCE instructions and update references of the source operands with references of the destination with subreg indices. e.g. by Evan Cheng · 15 years ago
  51. ad98f79 Print basic block numbers in live interval debug output. Since the rest of the by Bob Wilson · 15 years ago
  52. 6691a89 - Really preserve dbg_value instructions when the register is spilled. by Evan Cheng · 15 years ago
  53. 6fa7636 Re-enable 102323 with fix: do not update dbg_value's with incorrect frame indices when the live interval are being re-materialized. by Evan Cheng · 15 years ago
  54. 6cd4b34 Temporary disable spiller modifying dbg_value. It's breaking build. by Evan Cheng · 15 years ago
  55. 962021b - Move TargetLowering::EmitTargetCodeForFrameDebugValue to TargetInstrInfo and rename it to emitFrameIndexDebugValue. by Evan Cheng · 15 years ago
  56. 81bf03e Eliminate MachineBasicBlock::const_livein_iterator and make by Dan Gohman · 15 years ago
  57. 75361b6 rename llvm::llvm_report_error -> llvm::report_fatal_error by Chris Lattner · 15 years ago
  58. 991de14 Introduce SpecificBumpPtrAllocator, a wrapper for BumpPtrAllocator which allows by Benjamin Kramer · 15 years ago
  59. 01cb1b6 Reapply r99881 with some fixes: only call destructor in releaseMemory! by Torok Edwin · 15 years ago
  60. 226dd2b Revert 99881, it brooke smooshlab's llvm-gcc-i386-darwin9. by Torok Edwin · 15 years ago
  61. 2a22004 Introduce another Reset() method in BumpPtrAllocator that calls a destructor by Torok Edwin · 15 years ago
  62. 28a1e48 Avoid being influenced by the presence of dbg_value instructions. by Evan Cheng · 15 years ago
  63. d6a6b3b Revert Edwin's change that is breaking MultiSource/Applications/ClamAV/clamscan. by Bob Wilson · 15 years ago
  64. 1541738 Fix memory leak in liveintervals: the destructor for VNInfos must be called, by Torok Edwin · 15 years ago
  65. 4507f08 Fix liveintervals handling of dbg_value instructions. by Evan Cheng · 15 years ago
  66. 826cbac The check for coalescing a virtual register to a physical register, e.g. by Evan Cheng · 15 years ago
  67. a2f767b Fix a bug in DEBUG_VALUE handling Devang ran into. I'll get this loop right yet. by Dale Johannesen · 15 years ago
  68. e5d9041 Use methods to determine if a LiveInterval is spillable. by Jakob Stoklund Olesen · 15 years ago
  69. dcfe5f3 Keep track of phi join registers explicitly in LiveVariables. by Jakob Stoklund Olesen · 15 years ago
  70. 352d352 Always normalize spill weights, also for intervals created by spilling. by Jakob Stoklund Olesen · 15 years ago
  71. e21765d When I rewrote this loop per Chris' preference I changed its behavior. Oops. by Dale Johannesen · 15 years ago
  72. 1d0aeab Rewrite loop to suit Chris' preference. by Dale Johannesen · 15 years ago
  73. bd63520 Skip DBG_VALUE many places in live intervals and by Dale Johannesen · 15 years ago
  74. 518bb53 move target-independent opcodes out of TargetInstrInfo by Chris Lattner · 15 years ago
  75. 00a99a3 Run codegen dce pass for all targets at all optimization levels. Previously it's by Evan Cheng · 16 years ago
  76. 1caedd0 Ignore DEBUG_VALUE when building live intervals; by Dale Johannesen · 16 years ago
  77. 8a34229 by David Greene · 16 years ago
  78. 74ab5ee Changed slot index ranges for MachineBasicBlocks to be exclusive of endpoint. by Lang Hames · 16 years ago
  79. 74215fc Reuse lowered phi nodes. by Jakob Stoklund Olesen · 16 years ago
  80. ac94863 Coalesce insert_subreg undef, x first to avoid phase ordering issue. by Evan Cheng · 16 years ago
  81. cf97036 Also attempt trivial coalescing for live intervals that end in a copy. by Jakob Stoklund Olesen · 16 years ago
  82. 6194569 Added a new "splitting" spiller. by Lang Hames · 16 years ago
  83. dc492e0 Temporarily revert r90502. It was causing the llvm-gcc bootstrap on PPC to fail. by Bill Wendling · 16 years ago
  84. 6b74e50 Also attempt trivial coalescing for live intervals that end in a copy. by Jakob Stoklund Olesen · 16 years ago
  85. f4811a9 Clean up some loop logic. by Jakob Stoklund Olesen · 16 years ago
  86. 9836a26 Fix PR5391: support early clobber physical register def tied with a use (ewwww) by Evan Cheng · 16 years ago
  87. ce7a663 New virtual registers created for spill intervals should inherit allocation hints from the original register. by Jakob Stoklund Olesen · 16 years ago
  88. 6cd8103 More consistent labelling of basic blocks in debug output by Jakob Stoklund Olesen · 16 years ago
  89. 324da76 Add MachineBasicBlock::getName, and use it in place of getBasicBlock()->getName. by Jakob Stoklund Olesen · 16 years ago
  90. 1e78aa4 Remove the -early-coalescing option by Jakob Stoklund Olesen · 16 years ago
  91. df8ed02 Hide a couple of options. by Evan Cheng · 16 years ago
  92. 3de23e6 Fix inverted conflict test in -early-coalesce. by Jakob Stoklund Olesen · 16 years ago
  93. 233a60e The Indexes Patch. by Lang Hames · 16 years ago
  94. 5f4fb86 Trim unnecessary includes. by Evan Cheng · 16 years ago
  95. 0222a8c If the physical register being spilled does not have an interval, spill its sub-registers instead. by Evan Cheng · 16 years ago
  96. a70dca1 Factor out LiveIntervalAnalysis' code to determine whether an instruction by Dan Gohman · 16 years ago
  97. 599a87a isTriviallyReMaterializable checks the by Dan Gohman · 16 years ago
  98. 2627e08 Replace some code for aggressive-remat with MachineInstr::isInvariantLoad, and by Dan Gohman · 16 years ago
  99. 6cc91e3 Oops. Renamed remaining MachineInstrIndex references. by Lang Hames · 16 years ago
  100. cc3b065 Renamed MachineInstrIndex to LiveIndex. by Lang Hames · 16 years ago