diff --git a/cpu-exec.c b/cpu-exec.c
index f7a1b09..d658576 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -65,7 +65,7 @@
 /* exit the current TB from a signal handler. The host registers are
    restored in a state compatible with the CPU emulator
  */
-void cpu_resume_from_signal(CPUOldState *env1, void *puc)
+void cpu_resume_from_signal(CPUArchState *env1, void *puc)
 {
 #if !defined(CONFIG_SOFTMMU)
 #ifdef __linux__
diff --git a/cputlb.c b/cputlb.c
index d17f324..2e21e0b 100644
--- a/cputlb.c
+++ b/cputlb.c
@@ -152,7 +152,7 @@
    is permitted. Return 0 if OK or 2 if the page could not be mapped
    (can only happen in non SOFTMMU mode for I/O pages or pages
    conflicting with the host address space). */
-int tlb_set_page_exec(CPUOldState *env, target_ulong vaddr,
+int tlb_set_page_exec(CPUArchState *env, target_ulong vaddr,
                       hwaddr paddr, int prot,
                       int mmu_idx, int is_softmmu)
 {
diff --git a/exec.c b/exec.c
index 065d5c2..ef437fa 100644
--- a/exec.c
+++ b/exec.c
@@ -105,10 +105,10 @@
 RAMList ram_list = { .blocks = QLIST_HEAD_INITIALIZER(ram_list) };
 #endif
 
-CPUOldState *first_cpu;
+CPUArchState *first_cpu;
 /* current CPU in the current thread. It is only valid inside
    cpu_exec() */
-CPUOldState *cpu_single_env;
+CPUArchState *cpu_single_env;
 /* 0 = Do not count executed instructions.
    1 = Precise instruction counting.
    2 = Adaptive rate instruction counting.  */
@@ -532,9 +532,9 @@
 }
 #endif
 
-CPUOldState *qemu_get_cpu(int cpu)
+CPUArchState *qemu_get_cpu(int cpu)
 {
-    CPUOldState *env = first_cpu;
+    CPUArchState *env = first_cpu;
 
     while (env) {
         if (env->cpu_index == cpu)
@@ -545,9 +545,9 @@
     return env;
 }
 
-void cpu_exec_init(CPUOldState *env)
+void cpu_exec_init(CPUArchState *env)
 {
-    CPUOldState **penv;
+    CPUArchState **penv;
     int cpu_index;
 
 #if defined(CONFIG_USER_ONLY)
@@ -605,9 +605,9 @@
 
 /* flush all the translation blocks */
 /* XXX: tb_flush is currently not thread safe */
-void tb_flush(CPUOldState *env1)
+void tb_flush(CPUArchState *env1)
 {
-    CPUOldState *env;
+    CPUArchState *env;
 #if defined(DEBUG_FLUSH)
     printf("qemu: flush code_size=%ld nb_tbs=%d avg_tb_size=%ld\n",
            (unsigned long)(code_gen_ptr - code_gen_buffer),
@@ -751,7 +751,7 @@
 
 void tb_phys_invalidate(TranslationBlock *tb, target_ulong page_addr)
 {
-    CPUOldState *env;
+    CPUArchState *env;
     PageDesc *p;
     unsigned int h, n1;
     hwaddr phys_pc;
@@ -868,7 +868,7 @@
     }
 }
 
-TranslationBlock *tb_gen_code(CPUOldState *env,
+TranslationBlock *tb_gen_code(CPUArchState *env,
                               target_ulong pc, target_ulong cs_base,
                               int flags, int cflags)
 {
@@ -918,7 +918,7 @@
                                    int is_cpu_write_access)
 {
     TranslationBlock *tb, *tb_next, *saved_tb;
-    CPUOldState *env = cpu_single_env;
+    CPUArchState *env = cpu_single_env;
     target_ulong tb_start, tb_end;
     PageDesc *p;
     int n;
@@ -1055,7 +1055,7 @@
     int n;
 #ifdef TARGET_HAS_PRECISE_SMC
     TranslationBlock *current_tb = NULL;
-    CPUOldState *env = cpu_single_env;
+    CPUArchState *env = cpu_single_env;
     int current_tb_modified = 0;
     target_ulong current_pc = 0;
     target_ulong current_cs_base = 0;
@@ -1311,7 +1311,7 @@
 }
 
 #if defined(TARGET_HAS_ICE)
-static void breakpoint_invalidate(CPUOldState *env, target_ulong pc)
+static void breakpoint_invalidate(CPUArchState *env, target_ulong pc)
 {
     hwaddr addr;
     target_ulong pd;
@@ -1331,7 +1331,7 @@
 #endif
 
 /* Add a watchpoint.  */
-int cpu_watchpoint_insert(CPUOldState *env, target_ulong addr, target_ulong len,
+int cpu_watchpoint_insert(CPUArchState *env, target_ulong addr, target_ulong len,
                           int flags, CPUWatchpoint **watchpoint)
 {
     target_ulong len_mask = ~(len - 1);
@@ -1363,7 +1363,7 @@
 }
 
 /* Remove a specific watchpoint.  */
-int cpu_watchpoint_remove(CPUOldState *env, target_ulong addr, target_ulong len,
+int cpu_watchpoint_remove(CPUArchState *env, target_ulong addr, target_ulong len,
                           int flags)
 {
     target_ulong len_mask = ~(len - 1);
@@ -1380,7 +1380,7 @@
 }
 
 /* Remove a specific watchpoint by reference.  */
-void cpu_watchpoint_remove_by_ref(CPUOldState *env, CPUWatchpoint *watchpoint)
+void cpu_watchpoint_remove_by_ref(CPUArchState *env, CPUWatchpoint *watchpoint)
 {
     QTAILQ_REMOVE(&env->watchpoints, watchpoint, entry);
 
@@ -1390,7 +1390,7 @@
 }
 
 /* Remove all matching watchpoints.  */
-void cpu_watchpoint_remove_all(CPUOldState *env, int mask)
+void cpu_watchpoint_remove_all(CPUArchState *env, int mask)
 {
     CPUWatchpoint *wp, *next;
 
@@ -1401,7 +1401,7 @@
 }
 
 /* Add a breakpoint.  */
-int cpu_breakpoint_insert(CPUOldState *env, target_ulong pc, int flags,
+int cpu_breakpoint_insert(CPUArchState *env, target_ulong pc, int flags,
                           CPUBreakpoint **breakpoint)
 {
 #if defined(TARGET_HAS_ICE)
@@ -1429,7 +1429,7 @@
 }
 
 /* Remove a specific breakpoint.  */
-int cpu_breakpoint_remove(CPUOldState *env, target_ulong pc, int flags)
+int cpu_breakpoint_remove(CPUArchState *env, target_ulong pc, int flags)
 {
 #if defined(TARGET_HAS_ICE)
     CPUBreakpoint *bp;
@@ -1447,7 +1447,7 @@
 }
 
 /* Remove a specific breakpoint by reference.  */
-void cpu_breakpoint_remove_by_ref(CPUOldState *env, CPUBreakpoint *breakpoint)
+void cpu_breakpoint_remove_by_ref(CPUArchState *env, CPUBreakpoint *breakpoint)
 {
 #if defined(TARGET_HAS_ICE)
     QTAILQ_REMOVE(&env->breakpoints, breakpoint, entry);
@@ -1459,7 +1459,7 @@
 }
 
 /* Remove all matching breakpoints. */
-void cpu_breakpoint_remove_all(CPUOldState *env, int mask)
+void cpu_breakpoint_remove_all(CPUArchState *env, int mask)
 {
 #if defined(TARGET_HAS_ICE)
     CPUBreakpoint *bp, *next;
@@ -1702,10 +1702,10 @@
     abort();
 }
 
-CPUOldState *cpu_copy(CPUOldState *env)
+CPUArchState *cpu_copy(CPUOldState *env)
 {
-    CPUOldState *new_env = cpu_init(env->cpu_model_str);
-    CPUOldState *next_cpu = new_env->next_cpu;
+    CPUArchState *new_env = cpu_init(env->cpu_model_str);
+    CPUArchState *next_cpu = new_env->next_cpu;
     int cpu_index = new_env->cpu_index;
 #if defined(TARGET_HAS_ICE)
     CPUBreakpoint *bp;
@@ -1814,7 +1814,7 @@
 }
 
 /* update the TLB according to the current state of the dirty bits */
-void cpu_tlb_update_dirty(CPUOldState *env)
+void cpu_tlb_update_dirty(CPUArchState *env)
 {
     int i;
     int mmu_idx;
@@ -1827,15 +1827,15 @@
 
 #else
 
-void tlb_flush(CPUOldState *env, int flush_global)
+void tlb_flush(CPUArchState *env, int flush_global)
 {
 }
 
-void tlb_flush_page(CPUOldState *env, target_ulong addr)
+void tlb_flush_page(CPUArchState *env, target_ulong addr)
 {
 }
 
-int tlb_set_page_exec(CPUOldState *env, target_ulong vaddr,
+int tlb_set_page_exec(CPUArchState *env, target_ulong vaddr,
                       hwaddr paddr, int prot,
                       int mmu_idx, int is_softmmu)
 {
@@ -3544,7 +3544,7 @@
 
 /* in deterministic execution mode, instructions doing device I/Os
    must be at the end of the TB */
-void cpu_io_recompile(CPUOldState *env, void *retaddr)
+void cpu_io_recompile(CPUArchState *env, void *retaddr)
 {
     TranslationBlock *tb;
     uint32_t n, cflags;
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index 2c4258e..fd38fdf 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -355,20 +355,20 @@
 int page_check_range(target_ulong start, target_ulong len, int flags);
 #endif
 
-CPUOldState *cpu_copy(CPUOldState *env);
-CPUOldState *qemu_get_cpu(int cpu);
+CPUArchState *cpu_copy(CPUArchState *env);
+CPUArchState *qemu_get_cpu(int cpu);
 
 #define CPU_DUMP_CODE 0x00010000
 
-void cpu_dump_state(CPUOldState *env, FILE *f, fprintf_function cpu_fprintf,
+void cpu_dump_state(CPUArchState *env, FILE *f, fprintf_function cpu_fprintf,
                     int flags);
-void cpu_dump_statistics(CPUOldState *env, FILE *f, fprintf_function cpu_fprintf,
+void cpu_dump_statistics(CPUArchState *env, FILE *f, fprintf_function cpu_fprintf,
                           int flags);
 
-void QEMU_NORETURN cpu_abort(CPUOldState *env, const char *fmt, ...)
+void QEMU_NORETURN cpu_abort(CPUArchState *env, const char *fmt, ...)
     GCC_FMT_ATTR(2, 3);
-extern CPUOldState *first_cpu;
-extern CPUOldState *cpu_single_env;
+extern CPUArchState *first_cpu;
+extern CPUArchState *cpu_single_env;
 
 /* Flags for use in ENV->INTERRUPT_PENDING.
 
@@ -436,17 +436,17 @@
 #define BP_GDB                0x10
 #define BP_CPU                0x20
 
-int cpu_breakpoint_insert(CPUOldState *env, target_ulong pc, int flags,
+int cpu_breakpoint_insert(CPUArchState *env, target_ulong pc, int flags,
                           CPUBreakpoint **breakpoint);
-int cpu_breakpoint_remove(CPUOldState *env, target_ulong pc, int flags);
-void cpu_breakpoint_remove_by_ref(CPUOldState *env, CPUBreakpoint *breakpoint);
-void cpu_breakpoint_remove_all(CPUOldState *env, int mask);
-int cpu_watchpoint_insert(CPUOldState *env, target_ulong addr, target_ulong len,
+int cpu_breakpoint_remove(CPUArchState *env, target_ulong pc, int flags);
+void cpu_breakpoint_remove_by_ref(CPUArchState *env, CPUBreakpoint *breakpoint);
+void cpu_breakpoint_remove_all(CPUArchState *env, int mask);
+int cpu_watchpoint_insert(CPUArchState *env, target_ulong addr, target_ulong len,
                           int flags, CPUWatchpoint **watchpoint);
-int cpu_watchpoint_remove(CPUOldState *env, target_ulong addr,
+int cpu_watchpoint_remove(CPUArchState *env, target_ulong addr,
                           target_ulong len, int flags);
-void cpu_watchpoint_remove_by_ref(CPUOldState *env, CPUWatchpoint *watchpoint);
-void cpu_watchpoint_remove_all(CPUOldState *env, int mask);
+void cpu_watchpoint_remove_by_ref(CPUArchState *env, CPUWatchpoint *watchpoint);
+void cpu_watchpoint_remove_all(CPUArchState *env, int mask);
 
 #define SSTEP_ENABLE  0x1  /* Enable simulated HW single stepping */
 #define SSTEP_NOIRQ   0x2  /* Do not use IRQ while single stepping */
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index e442085..7bc632b 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -40,6 +40,7 @@
 #define DISAS_UPDATE  2 /* cpu state was modified dynamically */
 #define DISAS_TB_JUMP 3 /* only pc was modified statically */
 
+struct TranslationBlock;
 typedef struct TranslationBlock TranslationBlock;
 
 /* XXX: make safe guess about sizes */
@@ -67,33 +68,34 @@
 
 #include "qemu/log.h"
 
-void gen_intermediate_code(CPUOldState *env, struct TranslationBlock *tb);
-void gen_intermediate_code_pc(CPUOldState *env, struct TranslationBlock *tb);
-void restore_state_to_opc(CPUOldState *env, struct TranslationBlock *tb, int pc_pos);
+void gen_intermediate_code(CPUArchState *env, struct TranslationBlock *tb);
+void gen_intermediate_code_pc(CPUArchState *env, struct TranslationBlock *tb);
+void restore_state_to_opc(CPUArchState *env, struct TranslationBlock *tb,
+                          int pc_pos);
 
 unsigned long code_gen_max_block_size(void);
 void cpu_gen_init(void);
-int cpu_gen_code(CPUOldState *env, struct TranslationBlock *tb,
+int cpu_gen_code(CPUArchState *env, struct TranslationBlock *tb,
                  int *gen_code_size_ptr);
 int cpu_restore_state(struct TranslationBlock *tb,
-                      CPUOldState *env, unsigned long searched_pc);
-void cpu_resume_from_signal(CPUOldState *env1, void *puc);
-void cpu_io_recompile(CPUOldState *env, void *retaddr);
-TranslationBlock *tb_gen_code(CPUOldState *env,
+                      CPUArchState *env, unsigned long searched_pc);
+void QEMU_NORETURN cpu_resume_from_signal(CPUArchState *env1, void *puc);
+void QEMU_NORETURN cpu_io_recompile(CPUArchState *env, void *retaddr);
+TranslationBlock *tb_gen_code(CPUArchState *env, 
                               target_ulong pc, target_ulong cs_base, int flags,
                               int cflags);
-void cpu_exec_init(CPUOldState *env);
+void cpu_exec_init(CPUArchState *env);
 void QEMU_NORETURN cpu_loop_exit(void);
 int page_unprotect(target_ulong address, unsigned long pc, void *puc);
 void tb_invalidate_phys_page_range(hwaddr start, hwaddr end,
                                    int is_cpu_write_access);
 void tb_invalidate_page_range(target_ulong start, target_ulong end);
-void tlb_flush_page(CPUOldState *env, target_ulong addr);
-void tlb_flush(CPUOldState *env, int flush_global);
-int tlb_set_page_exec(CPUOldState *env, target_ulong vaddr,
+void tlb_flush_page(CPUArchState *env, target_ulong addr);
+void tlb_flush(CPUArchState *env, int flush_global);
+int tlb_set_page_exec(CPUArchState *env, target_ulong vaddr,
                       hwaddr paddr, int prot,
                       int mmu_idx, int is_softmmu);
-static inline int tlb_set_page(CPUOldState *env1, target_ulong vaddr,
+static inline int tlb_set_page(CPUArchState *env1, target_ulong vaddr,
                                hwaddr paddr, int prot,
                                int mmu_idx, int is_softmmu)
 {
@@ -128,7 +130,10 @@
 #define CODE_GEN_AVG_BLOCK_SIZE 64
 #endif
 
-#if defined(_ARCH_PPC) || defined(__x86_64__) || defined(__arm__) || defined(__i386__)
+#if defined(__arm__) || defined(_ARCH_PPC) \
+    || defined(__x86_64__) || defined(__i386__) \
+    || defined(__sparc__) || defined(__aarch64__) \
+    || defined(CONFIG_TCG_INTERPRETER)
 #define USE_DIRECT_JUMP
 #endif
 
@@ -260,7 +265,7 @@
 
 TranslationBlock *tb_alloc(target_ulong pc);
 void tb_free(TranslationBlock *tb);
-void tb_flush(CPUOldState *env);
+void tb_flush(CPUArchState *env);
 void tb_link_phys(TranslationBlock *tb,
                   target_ulong phys_pc, target_ulong phys_page2);
 void tb_phys_invalidate(TranslationBlock *tb, target_ulong page_addr);
@@ -388,7 +393,7 @@
 #endif
 
 #if defined(CONFIG_USER_ONLY)
-static inline target_ulong get_phys_addr_code(CPUOldState *env1, target_ulong addr)
+static inline target_ulong get_phys_addr_code(CPUArchState *env1, target_ulong addr)
 {
     return addr;
 }
@@ -396,7 +401,7 @@
 /* NOTE: this function can trigger an exception */
 /* NOTE2: the returned address is not exactly the physical address: it
    is the offset relative to phys_ram_base */
-static inline target_ulong get_phys_addr_code(CPUOldState *env1, target_ulong addr)
+static inline target_ulong get_phys_addr_code(CPUArchState *env1, target_ulong addr)
 {
     int mmu_idx, page_index, pd;
     void *p;
@@ -421,7 +426,7 @@
 }
 #endif
 
-typedef void (CPUDebugExcpHandler)(CPUOldState *env);
+typedef void (CPUDebugExcpHandler)(CPUArchState *env);
 
 CPUDebugExcpHandler *cpu_set_debug_excp_handler(CPUDebugExcpHandler *handler);
 
diff --git a/translate-all.c b/translate-all.c
index 1b7209d..bb369c0 100644
--- a/translate-all.c
+++ b/translate-all.c
@@ -96,7 +96,7 @@
    '*gen_code_size_ptr' contains the size of the generated code (host
    code).
 */
-int cpu_gen_code(CPUOldState *env, TranslationBlock *tb, int *gen_code_size_ptr)
+int cpu_gen_code(CPUArchState *env, TranslationBlock *tb, int *gen_code_size_ptr)
 {
     TCGContext *s = &tcg_ctx;
     uint8_t *gen_code_buf;
@@ -172,7 +172,7 @@
 /* The cpu state corresponding to 'searched_pc' is restored.
  */
 int cpu_restore_state(TranslationBlock *tb,
-                      CPUOldState *env, unsigned long searched_pc)
+                      CPUArchState *env, unsigned long searched_pc)
 {
     TCGContext *s = &tcg_ctx;
     int j;