Revert change I7af83e21c64d217c6b28bf6cb5ee2e2f23182c95 to fix Froyo build.

Apparently, that change that supposedly fixed AT-related ARMv7 bug broke
DexOpt step in the build process, resulting in trashed files that crash
the device. Rolling this change back to fix Froyo, until cause of the
DexOpt breaking has been found and fixed

Change-Id: I33b417fcbd65767f7cfe60f5fb5ffa32610b4852
diff --git a/target-arm/translate.c b/target-arm/translate.c
index ca04700..84600f7 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -30,7 +30,6 @@
 #include "disas.h"
 #include "tcg-op.h"
 #include "qemu-log.h"
-#include "it_helper.h"
 
 #ifdef CONFIG_TRACE
 #include "trace.h"
@@ -58,15 +57,8 @@
     int condlabel;
     /* Thumb-2 condtional execution bits.  */
     int condexec_mask;
-    /* Set to 1 iff currently translated instruction is IT instruction.
-     * This flag is then used to properly adjust condexec_mask field after
-     * instruction has been translated*/
-    int is_it_insn;
-    /* Set to 1 iff condexec_mask should be updated to CPU's condexec_bits.
-     * This flag is set to 1 if condexec_mask field has changed as the result
-     * of an instruction translation, so it must be saved to CPU's condexec_bits
-     * field after translated instruction has been executed. */
-    int save_condexec_mask;
+    int condexec_cond;
+    int condexec_mask_prev;  /* mask at start of instruction/block */
     struct TranslationBlock *tb;
     int singlestep_enabled;
     int thumb;
@@ -3532,11 +3524,16 @@
 static inline void
 gen_set_condexec (DisasContext *s)
 {
-    if (s->save_condexec_mask) {
+    if (s->condexec_mask) {
+        uint32_t val = (s->condexec_cond << 4) | (s->condexec_mask >> 1);
         TCGv tmp = new_tmp();
-        tcg_gen_movi_i32(tmp, s->condexec_mask);
+        tcg_gen_movi_i32(tmp, val);
         store_cpu_field(tmp, condexec_bits);
-        s->save_condexec_mask = 0;
+    }
+    else if (s->condexec_mask_prev != 0) {
+        TCGv tmp = new_tmp();
+        tcg_gen_movi_i32(tmp, 0);
+        store_cpu_field(tmp, condexec_bits);
     }
 }
 
@@ -8183,12 +8180,10 @@
     TCGv tmp2;
     TCGv addr;
 
-    if (itstate_is_in_it_block(s->condexec_mask)) {
-        /* We're translating an IT block instruction. Make it branch as
-         * requried by the current ITSTATE. */
-        const uint32_t it_cond = itstate_cond(s->condexec_mask);
+    if (s->condexec_mask) {
+        cond = s->condexec_cond;
         s->condlabel = gen_new_label();
-        gen_test_cc(it_cond ^ 1, s->condlabel);
+        gen_test_cc(cond ^ 1, s->condlabel);
         s->condjmp = 1;
     }
 
@@ -8707,9 +8702,8 @@
                 break;
             }
             /* If Then.  */
-            s->condexec_mask = insn & 0xff;
-            /* Let the translator know that this was an IT instruction. */
-            s->is_it_insn = 1;
+            s->condexec_cond = (insn >> 4) & 0xe;
+            s->condexec_mask = insn & 0x1f;
             /* No actual code generated for this insn, just setup state.  */
             break;
 
@@ -8885,11 +8879,9 @@
     dc->singlestep_enabled = env->singlestep_enabled;
     dc->condjmp = 0;
     dc->thumb = env->thumb;
-    if (!search_pc) {
-        /* Store current ITSTATE value. */
-        tb->itstate = env->condexec_bits;
-    }
-    dc->condexec_mask = tb->itstate;
+    dc->condexec_mask = (env->condexec_bits & 0xf) << 1;
+    dc->condexec_mask_prev = dc->condexec_mask;
+    dc->condexec_cond = env->condexec_bits >> 4;
 #if !defined(CONFIG_USER_ONLY)
     if (IS_M(env)) {
         dc->user = ((env->v7m.exception == 0) && (env->v7m.control & 1));
@@ -8924,9 +8916,6 @@
 #endif
 
     do {
-        /* Clear IT related flags at the beginning of insn translation. */
-        dc->save_condexec_mask = 0;
-        dc->is_it_insn = 0;
 #ifdef CONFIG_USER_ONLY
         /* Intercept jump to the magic kernel page.  */
         if (dc->pc >= 0xffff0000) {
@@ -8986,13 +8975,13 @@
 
         if (env->thumb) {
             disas_thumb_insn(env, dc);
+            dc->condexec_mask_prev = dc->condexec_mask;
             if (dc->condexec_mask) {
-                /* We just translated an IT-related instruction. We must save
-                 * updated ITSTATE into CPU's condexec_bits field at the end
-                 * this instruction translation. */
-                dc->save_condexec_mask = 1;
-                if (!dc->is_it_insn) {
-                    dc->condexec_mask = itstate_advance(dc->condexec_mask);
+                dc->condexec_cond = (dc->condexec_cond & 0xe)
+                                   | ((dc->condexec_mask >> 4) & 1);
+                dc->condexec_mask = (dc->condexec_mask << 1) & 0x1f;
+                if (dc->condexec_mask == 0) {
+                    dc->condexec_cond = 0;
                 }
             }
         } else {
@@ -9008,11 +8997,6 @@
             gen_set_label(dc->condlabel);
             dc->condjmp = 0;
         }
-
-        /* Update CPU's condexec_bits after we've moved beyond executed
-         * command for both, "fall through" and "branch" cases. */
-         gen_set_condexec(dc);
-
         /* Translation stops when a conditional branch is encountered.
          * Otherwise the subsequent code could get translated several times.
          * Also stop translation when a page boundary is reached.  This