commit bf7a22f3a6c38d359d2e933dec4706d1c7375f0a
author David 'Digit' Turner <digit@google.com> Tue Mar 25 16:36:03 2014 +0100
committer David 'Digit' Turner <digit@google.com> Wed Apr 09 19:43:25 2014 +0200
tree 3fa9c2d9cdd581ab2b6e4d1b89258e9edc0edfb6
parent fed223d2bab55eda155e3463b9cb6966e69dd73c

Move cpu_xxx functions to qom/cpu.h

This patch moves a few CPU-releated function declarations to
include/qom/cpu.h, while changing their signature to take a
CPUState instead of a CPUOldState.

Change-Id: I5f09b522dc755be334973a27f58b6704fbccc4c6

target-mips/helper.c

diff --git a/target-mips/helper.c b/target-mips/helper.c
index 433ad39..b9ad090 100644
--- a/target-mips/helper.c
+++ b/target-mips/helper.c
@@ -645,7 +645,7 @@
         env->active_tc.PC = (int32_t)0xBFC00480;
         break;
     case EXCP_RESET:
-        cpu_reset(env);
+        cpu_reset(ENV_GET_CPU(env));
         break;
     case EXCP_SRESET:
         env->CP0_Status |= (1 << CP0St_SR);

target-mips/op_helper.c

diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index 6429d97..3ff3cc2 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -662,7 +662,6 @@
           walking the list of CPUMIPSStates.  */
 static CPUMIPSState *mips_cpu_map_tc(CPUMIPSState *env, int *tc)
 {
-    CPUMIPSState *other;
     int vpe_idx, nr_threads = ENV_GET_CPU(env)->nr_threads;
     int tc_idx = *tc;
 
@@ -674,8 +673,8 @@
 
     vpe_idx = tc_idx / nr_threads;
     *tc = tc_idx % nr_threads;
-    other = qemu_get_cpu(vpe_idx);
-    return other ? other : env;
+    CPUState *other = qemu_get_cpu(vpe_idx);
+    return other ? other->env_ptr : env;
 }
 
 /* The per VPE CP0_Status register shares some fields with the per TC

target-mips/translate.c

diff --git a/target-mips/translate.c b/target-mips/translate.c
index 3952979..08c1ca4 100755
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -8317,7 +8317,7 @@
 #ifdef DEBUG_DISAS
     qemu_log_mask(CPU_LOG_TB_CPU, "------------------------------------------------\n");
     /* FIXME: This may print out stale hflags from env... */
-    log_cpu_state_mask(CPU_LOG_TB_CPU, env, 0);
+    log_cpu_state_mask(CPU_LOG_TB_CPU, ENV_GET_CPU(env), 0);
 #endif
     LOG_DISAS("\ntb %p idx %d hflags %04x\n", tb, ctx.mem_idx, ctx.hflags);
     gen_icount_start();
@@ -8503,10 +8503,11 @@
 }
 #endif
 
-void cpu_dump_state (CPUMIPSState *env, FILE *f,
+void cpu_dump_state (CPUState *cpu, FILE *f,
                      int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
                      int flags)
 {
+    CPUMIPSState *env = cpu->env_ptr;
     int i;
 
     cpu_fprintf(f, "pc=0x" TARGET_FMT_lx " HI=0x" TARGET_FMT_lx " LO=0x" TARGET_FMT_lx " ds %04x " TARGET_FMT_lx " %d\n",
@@ -8604,16 +8605,18 @@
 #endif
     mvp_init(env, def);
     mips_tcg_init();
-    cpu_reset(env);
-    qemu_init_vcpu(env);
+    cpu_reset(cpu);
+    qemu_init_vcpu(cpu);
     return env;
 }
 
-void cpu_reset (CPUMIPSState *env)
+void cpu_reset(CPUState *cpu)
 {
+    CPUMIPSState *env = cpu->env_ptr;
+
     if (qemu_loglevel_mask(CPU_LOG_RESET)) {
-        qemu_log("CPU Reset (CPU %d)\n", ENV_GET_CPU(env)->cpu_index);
-        log_cpu_state(env, 0);
+        qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index);
+        log_cpu_state(cpu, 0);
     }
 
     memset(env, 0, offsetof(CPUMIPSState, breakpoints));