Bunch of stuff
diff --git a/process.c b/process.c
index 44844ed..ea78824 100644
--- a/process.c
+++ b/process.c
@@ -2,6 +2,11 @@
* Copyright (c) 1991, 1992 Paul Kranenburg <pk@cs.few.eur.nl>
* Copyright (c) 1993 Branko Lankester <branko@hacktic.nl>
* Copyright (c) 1993, 1994, 1995, 1996 Rick Sladkey <jrs@world.std.com>
+ * Copyright (c) 1996-1999 Wichert Akkerman <wichert@cistron.nl>
+ * Copyright (c) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
+ * Linux for s390 port by D.J. Barrow
+ * <barrow_dj@mail.yahoo.com,djbarrow@de.ibm.com>
+ *
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -166,7 +171,7 @@
#ifdef PR_GET_PDEATHSIG
case PR_GET_PDEATHSIG:
for (i=1; i<tcp->u_nargs; i++)
- tprintf(", %@lx", tcp->u_arg[i]);
+ tprintf(", %#lx", tcp->u_arg[i]);
break;
#endif
default:
@@ -1421,116 +1426,189 @@
#endif /* !SUNOS4_KERNEL_ARCH_KLUDGE */
struct xlat struct_user_offsets[] = {
#ifdef LINUX
-#ifdef SPARC
+#ifdef S390
+ { PT_PSWMASK, "psw_mask" },
+ { PT_PSWADDR, "psw_addr" },
+ { PT_GPR0, "gpr0" },
+ { PT_GPR1, "gpr1" },
+ { PT_GPR2, "gpr2" },
+ { PT_GPR3, "gpr3" },
+ { PT_GPR4, "gpr4" },
+ { PT_GPR5, "gpr5" },
+ { PT_GPR6, "gpr6" },
+ { PT_GPR7, "gpr7" },
+ { PT_GPR8, "gpr8" },
+ { PT_GPR9, "gpr9" },
+ { PT_GPR10, "gpr10" },
+ { PT_GPR11, "gpr11" },
+ { PT_GPR12, "gpr12" },
+ { PT_GPR13, "gpr13" },
+ { PT_GPR14, "gpr14" },
+ { PT_GPR15, "gpr15" },
+ { PT_ACR0, "acr0" },
+ { PT_ACR1, "acr1" },
+ { PT_ACR2, "acr2" },
+ { PT_ACR3, "acr3" },
+ { PT_ACR4, "acr4" },
+ { PT_ACR5, "acr5" },
+ { PT_ACR6, "acr6" },
+ { PT_ACR7, "acr7" },
+ { PT_ACR8, "acr8" },
+ { PT_ACR9, "acr9" },
+ { PT_ACR10, "acr10" },
+ { PT_ACR11, "acr11" },
+ { PT_ACR12, "acr12" },
+ { PT_ACR13, "acr13" },
+ { PT_ACR14, "acr14" },
+ { PT_ACR15, "acr15" },
+ { PT_ORIGGPR2, "orig_gpr2" },
+ { PT_FPC, "fpc" },
+ { PT_FPR0_HI, "fpr0.hi" },
+ { PT_FPR0_LO, "fpr0.lo" },
+ { PT_FPR1_HI, "fpr1.hi" },
+ { PT_FPR1_LO, "fpr1.lo" },
+ { PT_FPR2_HI, "fpr2.hi" },
+ { PT_FPR2_LO, "fpr2.lo" },
+ { PT_FPR3_HI, "fpr3.hi" },
+ { PT_FPR3_LO, "fpr3.lo" },
+ { PT_FPR4_HI, "fpr4.hi" },
+ { PT_FPR4_LO, "fpr4.lo" },
+ { PT_FPR5_HI, "fpr5.hi" },
+ { PT_FPR5_LO, "fpr5.lo" },
+ { PT_FPR6_HI, "fpr6.hi" },
+ { PT_FPR6_LO, "fpr6.lo" },
+ { PT_FPR7_HI, "fpr7.hi" },
+ { PT_FPR7_LO, "fpr7.lo" },
+ { PT_FPR8_HI, "fpr8.hi" },
+ { PT_FPR8_LO, "fpr8.lo" },
+ { PT_FPR9_HI, "fpr9.hi" },
+ { PT_FPR9_LO, "fpr9.lo" },
+ { PT_FPR10_HI, "fpr10.hi" },
+ { PT_FPR10_LO, "fpr10.lo" },
+ { PT_FPR11_HI, "fpr11.hi" },
+ { PT_FPR11_LO, "fpr11.lo" },
+ { PT_FPR12_HI, "fpr12.hi" },
+ { PT_FPR12_LO, "fpr12.lo" },
+ { PT_FPR13_HI, "fpr13.hi" },
+ { PT_FPR13_LO, "fpr13.lo" },
+ { PT_FPR14_HI, "fpr14.hi" },
+ { PT_FPR14_LO, "fpr14.lo" },
+ { PT_FPR15_HI, "fpr15.hi" },
+ { PT_FPR15_LO, "fpr15.lo" },
+ { PT_CR_9, "cr9" },
+ { PT_CR_10, "cr10" },
+ { PT_CR_11, "cr11" },
+#endif
+#if defined(SPARC)
/* XXX No support for these offsets yet. */
#elif defined(POWERPC)
- { 4*PT_R0, "4*PT_R0" },
- { 4*PT_R1, "4*PT_R1" },
- { 4*PT_R2, "4*PT_R2" },
- { 4*PT_R3, "4*PT_R3" },
- { 4*PT_R4, "4*PT_R4" },
- { 4*PT_R5, "4*PT_R5" },
- { 4*PT_R6, "4*PT_R6" },
- { 4*PT_R7, "4*PT_R7" },
- { 4*PT_R8, "4*PT_R8" },
- { 4*PT_R9, "4*PT_R9" },
- { 4*PT_R10, "4*PT_R10" },
- { 4*PT_R11, "4*PT_R11" },
- { 4*PT_R12, "4*PT_R12" },
- { 4*PT_R13, "4*PT_R13" },
- { 4*PT_R14, "4*PT_R14" },
- { 4*PT_R15, "4*PT_R15" },
- { 4*PT_R16, "4*PT_R16" },
- { 4*PT_R17, "4*PT_R17" },
- { 4*PT_R18, "4*PT_R18" },
- { 4*PT_R19, "4*PT_R19" },
- { 4*PT_R20, "4*PT_R20" },
- { 4*PT_R21, "4*PT_R21" },
- { 4*PT_R22, "4*PT_R22" },
- { 4*PT_R23, "4*PT_R23" },
- { 4*PT_R24, "4*PT_R24" },
- { 4*PT_R25, "4*PT_R25" },
- { 4*PT_R26, "4*PT_R26" },
- { 4*PT_R27, "4*PT_R27" },
- { 4*PT_R28, "4*PT_R28" },
- { 4*PT_R29, "4*PT_R29" },
- { 4*PT_R30, "4*PT_R30" },
- { 4*PT_R31, "4*PT_R31" },
- { 4*PT_NIP, "4*PT_NIP" },
- { 4*PT_MSR, "4*PT_MSR" },
- { 4*PT_ORIG_R3, "4*PT_ORIG_R3" },
- { 4*PT_CTR, "4*PT_CTR" },
- { 4*PT_LNK, "4*PT_LNK" },
- { 4*PT_XER, "4*PT_XER" },
- { 4*PT_CCR, "4*PT_CCR" },
- { 4*PT_FPR0, "4*PT_FPR0" },
+ { 4*PT_R0, "4*PT_R0" },
+ { 4*PT_R1, "4*PT_R1" },
+ { 4*PT_R2, "4*PT_R2" },
+ { 4*PT_R3, "4*PT_R3" },
+ { 4*PT_R4, "4*PT_R4" },
+ { 4*PT_R5, "4*PT_R5" },
+ { 4*PT_R6, "4*PT_R6" },
+ { 4*PT_R7, "4*PT_R7" },
+ { 4*PT_R8, "4*PT_R8" },
+ { 4*PT_R9, "4*PT_R9" },
+ { 4*PT_R10, "4*PT_R10" },
+ { 4*PT_R11, "4*PT_R11" },
+ { 4*PT_R12, "4*PT_R12" },
+ { 4*PT_R13, "4*PT_R13" },
+ { 4*PT_R14, "4*PT_R14" },
+ { 4*PT_R15, "4*PT_R15" },
+ { 4*PT_R16, "4*PT_R16" },
+ { 4*PT_R17, "4*PT_R17" },
+ { 4*PT_R18, "4*PT_R18" },
+ { 4*PT_R19, "4*PT_R19" },
+ { 4*PT_R20, "4*PT_R20" },
+ { 4*PT_R21, "4*PT_R21" },
+ { 4*PT_R22, "4*PT_R22" },
+ { 4*PT_R23, "4*PT_R23" },
+ { 4*PT_R24, "4*PT_R24" },
+ { 4*PT_R25, "4*PT_R25" },
+ { 4*PT_R26, "4*PT_R26" },
+ { 4*PT_R27, "4*PT_R27" },
+ { 4*PT_R28, "4*PT_R28" },
+ { 4*PT_R29, "4*PT_R29" },
+ { 4*PT_R30, "4*PT_R30" },
+ { 4*PT_R31, "4*PT_R31" },
+ { 4*PT_NIP, "4*PT_NIP" },
+ { 4*PT_MSR, "4*PT_MSR" },
+ { 4*PT_ORIG_R3, "4*PT_ORIG_R3" },
+ { 4*PT_CTR, "4*PT_CTR" },
+ { 4*PT_LNK, "4*PT_LNK" },
+ { 4*PT_XER, "4*PT_XER" },
+ { 4*PT_CCR, "4*PT_CCR" },
+ { 4*PT_FPR0, "4*PT_FPR0" },
#else
#ifdef ALPHA
- { 0, "r0" },
- { 1, "r1" },
- { 2, "r2" },
- { 3, "r3" },
- { 4, "r4" },
- { 5, "r5" },
- { 6, "r6" },
- { 7, "r7" },
- { 8, "r8" },
- { 9, "r9" },
- { 10, "r10" },
- { 11, "r11" },
- { 12, "r12" },
- { 13, "r13" },
- { 14, "r14" },
- { 15, "r15" },
- { 16, "r16" },
- { 17, "r17" },
- { 18, "r18" },
- { 19, "r19" },
- { 20, "r20" },
- { 21, "r21" },
- { 22, "r22" },
- { 23, "r23" },
- { 24, "r24" },
- { 25, "r25" },
- { 26, "r26" },
- { 27, "r27" },
- { 28, "r28" },
- { 29, "gp" },
- { 30, "fp" },
- { 31, "zero" },
- { 32, "fp0" },
- { 33, "fp" },
- { 34, "fp2" },
- { 35, "fp3" },
- { 36, "fp4" },
- { 37, "fp5" },
- { 38, "fp6" },
- { 39, "fp7" },
- { 40, "fp8" },
- { 41, "fp9" },
- { 42, "fp10" },
- { 43, "fp11" },
- { 44, "fp12" },
- { 45, "fp13" },
- { 46, "fp14" },
- { 47, "fp15" },
- { 48, "fp16" },
- { 49, "fp17" },
- { 50, "fp18" },
- { 51, "fp19" },
- { 52, "fp20" },
- { 53, "fp21" },
- { 54, "fp22" },
- { 55, "fp23" },
- { 56, "fp24" },
- { 57, "fp25" },
- { 58, "fp26" },
- { 59, "fp27" },
- { 60, "fp28" },
- { 61, "fp29" },
- { 62, "fp30" },
- { 63, "fp31" },
- { 64, "pc" },
+ { 0, "r0" },
+ { 1, "r1" },
+ { 2, "r2" },
+ { 3, "r3" },
+ { 4, "r4" },
+ { 5, "r5" },
+ { 6, "r6" },
+ { 7, "r7" },
+ { 8, "r8" },
+ { 9, "r9" },
+ { 10, "r10" },
+ { 11, "r11" },
+ { 12, "r12" },
+ { 13, "r13" },
+ { 14, "r14" },
+ { 15, "r15" },
+ { 16, "r16" },
+ { 17, "r17" },
+ { 18, "r18" },
+ { 19, "r19" },
+ { 20, "r20" },
+ { 21, "r21" },
+ { 22, "r22" },
+ { 23, "r23" },
+ { 24, "r24" },
+ { 25, "r25" },
+ { 26, "r26" },
+ { 27, "r27" },
+ { 28, "r28" },
+ { 29, "gp" },
+ { 30, "fp" },
+ { 31, "zero" },
+ { 32, "fp0" },
+ { 33, "fp" },
+ { 34, "fp2" },
+ { 35, "fp3" },
+ { 36, "fp4" },
+ { 37, "fp5" },
+ { 38, "fp6" },
+ { 39, "fp7" },
+ { 40, "fp8" },
+ { 41, "fp9" },
+ { 42, "fp10" },
+ { 43, "fp11" },
+ { 44, "fp12" },
+ { 45, "fp13" },
+ { 46, "fp14" },
+ { 47, "fp15" },
+ { 48, "fp16" },
+ { 49, "fp17" },
+ { 50, "fp18" },
+ { 51, "fp19" },
+ { 52, "fp20" },
+ { 53, "fp21" },
+ { 54, "fp22" },
+ { 55, "fp23" },
+ { 56, "fp24" },
+ { 57, "fp25" },
+ { 58, "fp26" },
+ { 59, "fp27" },
+ { 60, "fp28" },
+ { 61, "fp29" },
+ { 62, "fp30" },
+ { 63, "fp31" },
+ { 64, "pc" },
#else /* !ALPHA */
#ifdef I386
{ 4*EBX, "4*EBX" },
@@ -1573,6 +1651,9 @@
{ 4*PT_PC, "4*PT_PC" },
#endif /* M68K */
#endif /* !I386 */
+#ifdef S390
+ { uoff(u_fpvalid), "offsetof(struct user, u_fpvalid)" },
+#endif
#ifndef MIPS
{ uoff(u_fpvalid), "offsetof(struct user, u_fpvalid)" },
#endif
@@ -1593,7 +1674,7 @@
{ uoff(reserved), "offsetof(struct user, reserved)" },
#endif
{ uoff(u_ar0), "offsetof(struct user, u_ar0)" },
-#if !defined(ARM) && !defined(MIPS)
+#if !defined(ARM) && !defined(MIPS) && !defined(S390)
{ uoff(u_fpstate), "offsetof(struct user, u_fpstate)" },
#endif
{ uoff(magic), "offsetof(struct user, magic)" },