Revert "Revert "Upgrade to 5.0.71.48"" DO NOT MERGE
This reverts commit f2e3994fa5148cc3d9946666f0b0596290192b0e,
and updates the x64 makefile properly so it doesn't break that
build.
FPIIM-449
Change-Id: Ib83e35bfbae6af627451c926a9650ec57c045605
(cherry picked from commit 109988c7ccb6f3fd1a58574fa3dfb88beaef6632)
diff --git a/src/compiler/x64/code-generator-x64.cc b/src/compiler/x64/code-generator-x64.cc
index be406fb..510c0c6 100644
--- a/src/compiler/x64/code-generator-x64.cc
+++ b/src/compiler/x64/code-generator-x64.cc
@@ -209,15 +209,16 @@
if (mode_ > RecordWriteMode::kValueIsPointer) {
__ JumpIfSmi(value_, exit());
}
- if (mode_ > RecordWriteMode::kValueIsMap) {
- __ CheckPageFlag(value_, scratch0_,
- MemoryChunk::kPointersToHereAreInterestingMask, zero,
- exit());
- }
+ __ CheckPageFlag(value_, scratch0_,
+ MemoryChunk::kPointersToHereAreInterestingMask, zero,
+ exit());
+ RememberedSetAction const remembered_set_action =
+ mode_ > RecordWriteMode::kValueIsMap ? EMIT_REMEMBERED_SET
+ : OMIT_REMEMBERED_SET;
SaveFPRegsMode const save_fp_mode =
frame()->DidAllocateDoubleRegisters() ? kSaveFPRegs : kDontSaveFPRegs;
RecordWriteStub stub(isolate(), object_, scratch0_, scratch1_,
- EMIT_REMEMBERED_SET, save_fp_mode);
+ remembered_set_action, save_fp_mode);
__ leap(scratch1_, operand_);
__ CallStub(&stub);
}
@@ -261,6 +262,32 @@
} \
} while (0)
+#define ASSEMBLE_COMPARE(asm_instr) \
+ do { \
+ if (AddressingModeField::decode(instr->opcode()) != kMode_None) { \
+ size_t index = 0; \
+ Operand left = i.MemoryOperand(&index); \
+ if (HasImmediateInput(instr, index)) { \
+ __ asm_instr(left, i.InputImmediate(index)); \
+ } else { \
+ __ asm_instr(left, i.InputRegister(index)); \
+ } \
+ } else { \
+ if (HasImmediateInput(instr, 1)) { \
+ if (instr->InputAt(0)->IsRegister()) { \
+ __ asm_instr(i.InputRegister(0), i.InputImmediate(1)); \
+ } else { \
+ __ asm_instr(i.InputOperand(0), i.InputImmediate(1)); \
+ } \
+ } else { \
+ if (instr->InputAt(1)->IsRegister()) { \
+ __ asm_instr(i.InputRegister(0), i.InputRegister(1)); \
+ } else { \
+ __ asm_instr(i.InputRegister(0), i.InputOperand(1)); \
+ } \
+ } \
+ } \
+ } while (0)
#define ASSEMBLE_MULT(asm_instr) \
do { \
@@ -654,11 +681,6 @@
frame_access_state()->ClearSPDelta();
break;
}
- case kArchLazyBailout: {
- EnsureSpaceForLazyDeopt();
- RecordCallPosition(instr);
- break;
- }
case kArchPrepareCallCFunction: {
// Frame alignment requires using FP-relative frame addressing.
frame_access_state()->SetFrameAccessToFP();
@@ -712,6 +734,13 @@
case kArchFramePointer:
__ movq(i.OutputRegister(), rbp);
break;
+ case kArchParentFramePointer:
+ if (frame_access_state()->frame()->needs_frame()) {
+ __ movq(i.OutputRegister(), Operand(rbp, 0));
+ } else {
+ __ movq(i.OutputRegister(), rbp);
+ }
+ break;
case kArchTruncateDoubleToI: {
auto result = i.OutputRegister();
auto input = i.InputDoubleRegister(0);
@@ -740,6 +769,18 @@
__ bind(ool->exit());
break;
}
+ case kArchStackSlot: {
+ FrameOffset offset =
+ frame_access_state()->GetFrameOffset(i.InputInt32(0));
+ Register base;
+ if (offset.from_stack_pointer()) {
+ base = rsp;
+ } else {
+ base = rbp;
+ }
+ __ leaq(i.OutputRegister(), Operand(base, offset.offset()));
+ break;
+ }
case kX64Add32:
ASSEMBLE_BINOP(addl);
break;
@@ -759,16 +800,16 @@
ASSEMBLE_BINOP(andq);
break;
case kX64Cmp32:
- ASSEMBLE_BINOP(cmpl);
+ ASSEMBLE_COMPARE(cmpl);
break;
case kX64Cmp:
- ASSEMBLE_BINOP(cmpq);
+ ASSEMBLE_COMPARE(cmpq);
break;
case kX64Test32:
- ASSEMBLE_BINOP(testl);
+ ASSEMBLE_COMPARE(testl);
break;
case kX64Test:
- ASSEMBLE_BINOP(testq);
+ ASSEMBLE_COMPARE(testq);
break;
case kX64Imul32:
ASSEMBLE_MULT(imull);
@@ -947,6 +988,22 @@
__ Roundss(i.OutputDoubleRegister(), i.InputDoubleRegister(0), mode);
break;
}
+ case kSSEFloat32ToInt32:
+ if (instr->InputAt(0)->IsDoubleRegister()) {
+ __ Cvttss2si(i.OutputRegister(), i.InputDoubleRegister(0));
+ } else {
+ __ Cvttss2si(i.OutputRegister(), i.InputOperand(0));
+ }
+ break;
+ case kSSEFloat32ToUint32: {
+ if (instr->InputAt(0)->IsDoubleRegister()) {
+ __ Cvttss2siq(i.OutputRegister(), i.InputDoubleRegister(0));
+ } else {
+ __ Cvttss2siq(i.OutputRegister(), i.InputOperand(0));
+ }
+ __ AssertZeroExtended(i.OutputRegister());
+ break;
+ }
case kSSEFloat64Cmp:
ASSEMBLE_SSE_BINOP(Ucomisd);
break;
@@ -1197,6 +1254,13 @@
__ Cvtlsi2sd(i.OutputDoubleRegister(), i.InputOperand(0));
}
break;
+ case kSSEInt32ToFloat32:
+ if (instr->InputAt(0)->IsRegister()) {
+ __ Cvtlsi2ss(i.OutputDoubleRegister(), i.InputRegister(0));
+ } else {
+ __ Cvtlsi2ss(i.OutputDoubleRegister(), i.InputOperand(0));
+ }
+ break;
case kSSEInt64ToFloat32:
if (instr->InputAt(0)->IsRegister()) {
__ Cvtqsi2ss(i.OutputDoubleRegister(), i.InputRegister(0));
@@ -1237,6 +1301,14 @@
}
__ Cvtqsi2sd(i.OutputDoubleRegister(), kScratchRegister);
break;
+ case kSSEUint32ToFloat32:
+ if (instr->InputAt(0)->IsRegister()) {
+ __ movl(kScratchRegister, i.InputRegister(0));
+ } else {
+ __ movl(kScratchRegister, i.InputOperand(0));
+ }
+ __ Cvtqsi2ss(i.OutputDoubleRegister(), kScratchRegister);
+ break;
case kSSEFloat64ExtractLowWord32:
if (instr->InputAt(0)->IsDoubleStackSlot()) {
__ movl(i.OutputRegister(), i.InputOperand(0));
@@ -1828,8 +1900,6 @@
// remaining stack slots.
if (FLAG_code_comments) __ RecordComment("-- OSR entrypoint --");
osr_pc_offset_ = __ pc_offset();
- // TODO(titzer): cannot address target function == local #-1
- __ movq(rdi, Operand(rbp, JavaScriptFrameConstants::kFunctionOffset));
stack_shrink_slots -=
static_cast<int>(OsrHelper(info()).UnoptimizedFrameSlots());
}
diff --git a/src/compiler/x64/instruction-codes-x64.h b/src/compiler/x64/instruction-codes-x64.h
index 8e8e765..6d5e77c 100644
--- a/src/compiler/x64/instruction-codes-x64.h
+++ b/src/compiler/x64/instruction-codes-x64.h
@@ -63,6 +63,8 @@
V(SSEFloat32Max) \
V(SSEFloat32Min) \
V(SSEFloat32ToFloat64) \
+ V(SSEFloat32ToInt32) \
+ V(SSEFloat32ToUint32) \
V(SSEFloat32Round) \
V(SSEFloat64Cmp) \
V(SSEFloat64Add) \
@@ -84,11 +86,13 @@
V(SSEFloat32ToUint64) \
V(SSEFloat64ToUint64) \
V(SSEInt32ToFloat64) \
+ V(SSEInt32ToFloat32) \
V(SSEInt64ToFloat32) \
V(SSEInt64ToFloat64) \
V(SSEUint64ToFloat32) \
V(SSEUint64ToFloat64) \
V(SSEUint32ToFloat64) \
+ V(SSEUint32ToFloat32) \
V(SSEFloat64ExtractLowWord32) \
V(SSEFloat64ExtractHighWord32) \
V(SSEFloat64InsertLowWord32) \
diff --git a/src/compiler/x64/instruction-scheduler-x64.cc b/src/compiler/x64/instruction-scheduler-x64.cc
index f8537c8..1f10b51 100644
--- a/src/compiler/x64/instruction-scheduler-x64.cc
+++ b/src/compiler/x64/instruction-scheduler-x64.cc
@@ -79,6 +79,8 @@
case kSSEFloat64Max:
case kSSEFloat64Min:
case kSSEFloat64ToFloat32:
+ case kSSEFloat32ToInt32:
+ case kSSEFloat32ToUint32:
case kSSEFloat64ToInt32:
case kSSEFloat64ToUint32:
case kSSEFloat64ToInt64:
@@ -86,11 +88,13 @@
case kSSEFloat64ToUint64:
case kSSEFloat32ToUint64:
case kSSEInt32ToFloat64:
+ case kSSEInt32ToFloat32:
case kSSEInt64ToFloat32:
case kSSEInt64ToFloat64:
case kSSEUint64ToFloat32:
case kSSEUint64ToFloat64:
case kSSEUint32ToFloat64:
+ case kSSEUint32ToFloat32:
case kSSEFloat64ExtractLowWord32:
case kSSEFloat64ExtractHighWord32:
case kSSEFloat64InsertLowWord32:
diff --git a/src/compiler/x64/instruction-selector-x64.cc b/src/compiler/x64/instruction-selector-x64.cc
index c47a42e..d3a2a8e 100644
--- a/src/compiler/x64/instruction-selector-x64.cc
+++ b/src/compiler/x64/instruction-selector-x64.cc
@@ -133,6 +133,7 @@
case MachineRepresentation::kWord64:
opcode = kX64Movq;
break;
+ case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone:
UNREACHABLE();
return;
@@ -219,6 +220,7 @@
case MachineRepresentation::kWord64:
opcode = kX64Movq;
break;
+ case MachineRepresentation::kSimd128: // Fall through.
case MachineRepresentation::kNone:
UNREACHABLE();
return;
@@ -264,8 +266,9 @@
case MachineRepresentation::kFloat64:
opcode = kCheckedLoadFloat64;
break;
- case MachineRepresentation::kBit:
- case MachineRepresentation::kTagged:
+ case MachineRepresentation::kBit: // Fall through.
+ case MachineRepresentation::kSimd128: // Fall through.
+ case MachineRepresentation::kTagged: // Fall through.
case MachineRepresentation::kNone:
UNREACHABLE();
return;
@@ -316,8 +319,9 @@
case MachineRepresentation::kFloat64:
opcode = kCheckedStoreFloat64;
break;
- case MachineRepresentation::kBit:
- case MachineRepresentation::kTagged:
+ case MachineRepresentation::kBit: // Fall through.
+ case MachineRepresentation::kSimd128: // Fall through.
+ case MachineRepresentation::kTagged: // Fall through.
case MachineRepresentation::kNone:
UNREACHABLE();
return;
@@ -622,6 +626,12 @@
}
+void InstructionSelector::VisitWord32ReverseBits(Node* node) { UNREACHABLE(); }
+
+
+void InstructionSelector::VisitWord64ReverseBits(Node* node) { UNREACHABLE(); }
+
+
void InstructionSelector::VisitWord32Popcnt(Node* node) {
X64OperandGenerator g(this);
Emit(kX64Popcnt32, g.DefineAsRegister(node), g.Use(node->InputAt(0)));
@@ -734,10 +744,11 @@
if (selector->IsLive(left) && !selector->IsLive(right)) {
std::swap(left, right);
}
+ InstructionOperand temps[] = {g.TempRegister(rax)};
// TODO(turbofan): We use UseUniqueRegister here to improve register
// allocation.
selector->Emit(opcode, g.DefineAsFixed(node, rdx), g.UseFixed(left, rax),
- g.UseUniqueRegister(right));
+ g.UseUniqueRegister(right), arraysize(temps), temps);
}
@@ -752,9 +763,10 @@
void VisitMod(InstructionSelector* selector, Node* node, ArchOpcode opcode) {
X64OperandGenerator g(selector);
- selector->Emit(opcode, g.DefineAsFixed(node, rdx),
- g.UseFixed(node->InputAt(0), rax),
- g.UseUniqueRegister(node->InputAt(1)));
+ InstructionOperand temps[] = {g.TempRegister(rax)};
+ selector->Emit(
+ opcode, g.DefineAsFixed(node, rdx), g.UseFixed(node->InputAt(0), rax),
+ g.UseUniqueRegister(node->InputAt(1)), arraysize(temps), temps);
}
} // namespace
@@ -857,6 +869,18 @@
}
+void InstructionSelector::VisitTruncateFloat32ToInt32(Node* node) {
+ X64OperandGenerator g(this);
+ Emit(kSSEFloat32ToInt32, g.DefineAsRegister(node), g.Use(node->InputAt(0)));
+}
+
+
+void InstructionSelector::VisitTruncateFloat32ToUint32(Node* node) {
+ X64OperandGenerator g(this);
+ Emit(kSSEFloat32ToUint32, g.DefineAsRegister(node), g.Use(node->InputAt(0)));
+}
+
+
void InstructionSelector::VisitTryTruncateFloat32ToInt64(Node* node) {
X64OperandGenerator g(this);
InstructionOperand inputs[] = {g.UseRegister(node->InputAt(0))};
@@ -1046,6 +1070,12 @@
}
+void InstructionSelector::VisitRoundInt32ToFloat32(Node* node) {
+ X64OperandGenerator g(this);
+ Emit(kSSEInt32ToFloat32, g.DefineAsRegister(node), g.Use(node->InputAt(0)));
+}
+
+
void InstructionSelector::VisitRoundInt64ToFloat32(Node* node) {
X64OperandGenerator g(this);
Emit(kSSEInt64ToFloat32, g.DefineAsRegister(node), g.Use(node->InputAt(0)));
@@ -1058,6 +1088,12 @@
}
+void InstructionSelector::VisitRoundUint32ToFloat32(Node* node) {
+ X64OperandGenerator g(this);
+ Emit(kSSEUint32ToFloat32, g.DefineAsRegister(node), g.Use(node->InputAt(0)));
+}
+
+
void InstructionSelector::VisitRoundUint64ToFloat32(Node* node) {
X64OperandGenerator g(this);
InstructionOperand temps[] = {g.TempRegister()};
@@ -1303,6 +1339,48 @@
namespace {
+void VisitCompareWithMemoryOperand(InstructionSelector* selector,
+ InstructionCode opcode, Node* left,
+ InstructionOperand right,
+ FlagsContinuation* cont) {
+ DCHECK(left->opcode() == IrOpcode::kLoad);
+ X64OperandGenerator g(selector);
+ size_t input_count = 0;
+ InstructionOperand inputs[6];
+ AddressingMode addressing_mode =
+ g.GetEffectiveAddressMemoryOperand(left, inputs, &input_count);
+ opcode |= AddressingModeField::encode(addressing_mode);
+ opcode = cont->Encode(opcode);
+ inputs[input_count++] = right;
+
+ if (cont->IsBranch()) {
+ inputs[input_count++] = g.Label(cont->true_block());
+ inputs[input_count++] = g.Label(cont->false_block());
+ selector->Emit(opcode, 0, nullptr, input_count, inputs);
+ } else {
+ DCHECK(cont->IsSet());
+ InstructionOperand output = g.DefineAsRegister(cont->result());
+ selector->Emit(opcode, 1, &output, input_count, inputs);
+ }
+}
+
+// Determines if {input} of {node} can be replaced by a memory operand.
+bool CanUseMemoryOperand(InstructionSelector* selector, InstructionCode opcode,
+ Node* node, Node* input) {
+ if (input->opcode() != IrOpcode::kLoad || !selector->CanCover(node, input)) {
+ return false;
+ }
+ MachineRepresentation rep =
+ LoadRepresentationOf(input->op()).representation();
+ if (rep == MachineRepresentation::kWord64 ||
+ rep == MachineRepresentation::kTagged) {
+ return opcode == kX64Cmp || opcode == kX64Test;
+ } else if (rep == MachineRepresentation::kWord32) {
+ return opcode == kX64Cmp32 || opcode == kX64Test32;
+ }
+ return false;
+}
+
// Shared routine for multiple compare operations.
void VisitCompare(InstructionSelector* selector, InstructionCode opcode,
InstructionOperand left, InstructionOperand right,
@@ -1330,26 +1408,41 @@
VisitCompare(selector, opcode, g.UseRegister(left), g.Use(right), cont);
}
-
// Shared routine for multiple word compare operations.
void VisitWordCompare(InstructionSelector* selector, Node* node,
InstructionCode opcode, FlagsContinuation* cont) {
X64OperandGenerator g(selector);
- Node* const left = node->InputAt(0);
- Node* const right = node->InputAt(1);
+ Node* left = node->InputAt(0);
+ Node* right = node->InputAt(1);
- // Match immediates on left or right side of comparison.
- if (g.CanBeImmediate(right)) {
- VisitCompare(selector, opcode, g.Use(left), g.UseImmediate(right), cont);
- } else if (g.CanBeImmediate(left)) {
+ // If one of the two inputs is an immediate, make sure it's on the right.
+ if (!g.CanBeImmediate(right) && g.CanBeImmediate(left)) {
if (!node->op()->HasProperty(Operator::kCommutative)) cont->Commute();
- VisitCompare(selector, opcode, g.Use(right), g.UseImmediate(left), cont);
- } else {
- VisitCompare(selector, opcode, left, right, cont,
- node->op()->HasProperty(Operator::kCommutative));
+ std::swap(left, right);
}
-}
+ // Match immediates on right side of comparison.
+ if (g.CanBeImmediate(right)) {
+ if (CanUseMemoryOperand(selector, opcode, node, left)) {
+ return VisitCompareWithMemoryOperand(selector, opcode, left,
+ g.UseImmediate(right), cont);
+ }
+ return VisitCompare(selector, opcode, g.Use(left), g.UseImmediate(right),
+ cont);
+ }
+
+ if (g.CanBeBetterLeftOperand(right)) {
+ if (!node->op()->HasProperty(Operator::kCommutative)) cont->Commute();
+ std::swap(left, right);
+ }
+
+ if (CanUseMemoryOperand(selector, opcode, node, left)) {
+ return VisitCompareWithMemoryOperand(selector, opcode, left,
+ g.UseRegister(right), cont);
+ }
+ return VisitCompare(selector, opcode, left, right, cont,
+ node->op()->HasProperty(Operator::kCommutative));
+}
// Shared routine for 64-bit word comparison operations.
void VisitWord64Compare(InstructionSelector* selector, Node* node,