Update V8 to r6768 as required by WebKit r78450
Change-Id: Ib8868ff7147a76547a8d1d85f257ebe8546a3d3f
diff --git a/src/ia32/assembler-ia32.h b/src/ia32/assembler-ia32.h
index 20446b0..11f324e 100644
--- a/src/ia32/assembler-ia32.h
+++ b/src/ia32/assembler-ia32.h
@@ -30,7 +30,7 @@
// The original source code covered by the above license above has been
// modified significantly by Google Inc.
-// Copyright 2010 the V8 project authors. All rights reserved.
+// Copyright 2011 the V8 project authors. All rights reserved.
// A light-weight IA32 Assembler.
@@ -64,30 +64,14 @@
// and best performance in optimized code.
//
struct Register {
- static const int kNumAllocatableRegisters = 5;
+ static const int kNumAllocatableRegisters = 6;
static const int kNumRegisters = 8;
- static int ToAllocationIndex(Register reg) {
- ASSERT(reg.code() < 4 || reg.code() == 7);
- return (reg.code() == 7) ? 4 : reg.code();
- }
+ static inline const char* AllocationIndexToString(int index);
- static Register FromAllocationIndex(int index) {
- ASSERT(index >= 0 && index < kNumAllocatableRegisters);
- return (index == 4) ? from_code(7) : from_code(index);
- }
+ static inline int ToAllocationIndex(Register reg);
- static const char* AllocationIndexToString(int index) {
- ASSERT(index >= 0 && index < kNumAllocatableRegisters);
- const char* const names[] = {
- "eax",
- "ecx",
- "edx",
- "ebx",
- "edi"
- };
- return names[index];
- }
+ static inline Register FromAllocationIndex(int index);
static Register from_code(int code) {
Register r = { code };
@@ -110,6 +94,7 @@
int code_;
};
+
const Register eax = { 0 };
const Register ecx = { 1 };
const Register edx = { 2 };
@@ -121,6 +106,26 @@
const Register no_reg = { -1 };
+inline const char* Register::AllocationIndexToString(int index) {
+ ASSERT(index >= 0 && index < kNumAllocatableRegisters);
+ // This is the mapping of allocation indices to registers.
+ const char* const kNames[] = { "eax", "ecx", "edx", "ebx", "esi", "edi" };
+ return kNames[index];
+}
+
+
+inline int Register::ToAllocationIndex(Register reg) {
+ ASSERT(reg.is_valid() && !reg.is(esp) && !reg.is(ebp));
+ return (reg.code() >= 6) ? reg.code() - 2 : reg.code();
+}
+
+
+inline Register Register::FromAllocationIndex(int index) {
+ ASSERT(index >= 0 && index < kNumAllocatableRegisters);
+ return (index >= 4) ? from_code(index + 2) : from_code(index);
+}
+
+
struct XMMRegister {
static const int kNumAllocatableRegisters = 7;
static const int kNumRegisters = 8;
@@ -928,6 +933,7 @@
void psrlq(XMMRegister dst, XMMRegister src);
void pshufd(XMMRegister dst, XMMRegister src, int8_t shuffle);
void pextrd(const Operand& dst, XMMRegister src, int8_t offset);
+ void pinsrd(XMMRegister dst, const Operand& src, int8_t offset);
// Parallel XMM operations.
void movntdqa(XMMRegister src, const Operand& dst);