Upgrade V8 to version 4.9.385.28
https://chromium.googlesource.com/v8/v8/+/4.9.385.28
FPIIM-449
Change-Id: I4b2e74289d4bf3667f2f3dc8aa2e541f63e26eb4
diff --git a/src/compiler/instruction-selector.h b/src/compiler/instruction-selector.h
index 5e3c52f..52aea70 100644
--- a/src/compiler/instruction-selector.h
+++ b/src/compiler/instruction-selector.h
@@ -5,11 +5,13 @@
#ifndef V8_COMPILER_INSTRUCTION_SELECTOR_H_
#define V8_COMPILER_INSTRUCTION_SELECTOR_H_
-#include <deque>
+#include <map>
#include "src/compiler/common-operator.h"
#include "src/compiler/instruction.h"
+#include "src/compiler/instruction-scheduler.h"
#include "src/compiler/machine-operator.h"
+#include "src/compiler/node.h"
#include "src/zone-containers.h"
namespace v8 {
@@ -17,69 +19,91 @@
namespace compiler {
// Forward declarations.
+class BasicBlock;
struct CallBuffer; // TODO(bmeurer): Remove this.
class FlagsContinuation;
class Linkage;
+class OperandGenerator;
+struct SwitchInfo;
-typedef IntVector NodeToVregMap;
-
-class InstructionSelector FINAL {
+// This struct connects nodes of parameters which are going to be pushed on the
+// call stack with their parameter index in the call descriptor of the callee.
+class PushParameter {
public:
- static const int kNodeUnmapped = -1;
+ PushParameter() : node_(nullptr), type_(MachineType::None()) {}
+ PushParameter(Node* node, MachineType type) : node_(node), type_(type) {}
+ Node* node() const { return node_; }
+ MachineType type() const { return type_; }
+
+ private:
+ Node* node_;
+ MachineType type_;
+};
+
+// Instruction selection generates an InstructionSequence for a given Schedule.
+class InstructionSelector final {
+ public:
// Forward declarations.
class Features;
- // TODO(dcarney): pass in vreg mapping instead of graph.
- InstructionSelector(Zone* local_zone, Graph* graph, Linkage* linkage,
- InstructionSequence* sequence, Schedule* schedule,
- SourcePositionTable* source_positions,
- Features features = SupportedFeatures());
+ enum SourcePositionMode { kCallSourcePositions, kAllSourcePositions };
+
+ InstructionSelector(
+ Zone* zone, size_t node_count, Linkage* linkage,
+ InstructionSequence* sequence, Schedule* schedule,
+ SourcePositionTable* source_positions,
+ SourcePositionMode source_position_mode = kCallSourcePositions,
+ Features features = SupportedFeatures());
// Visit code for the entire graph with the included schedule.
void SelectInstructions();
+ void StartBlock(RpoNumber rpo);
+ void EndBlock(RpoNumber rpo);
+ void AddInstruction(Instruction* instr);
+
// ===========================================================================
// ============= Architecture-independent code emission methods. =============
// ===========================================================================
- Instruction* Emit(InstructionCode opcode, InstructionOperand* output,
- size_t temp_count = 0, InstructionOperand* *temps = NULL);
- Instruction* Emit(InstructionCode opcode, InstructionOperand* output,
- InstructionOperand* a, size_t temp_count = 0,
- InstructionOperand* *temps = NULL);
- Instruction* Emit(InstructionCode opcode, InstructionOperand* output,
- InstructionOperand* a, InstructionOperand* b,
- size_t temp_count = 0, InstructionOperand* *temps = NULL);
- Instruction* Emit(InstructionCode opcode, InstructionOperand* output,
- InstructionOperand* a, InstructionOperand* b,
- InstructionOperand* c, size_t temp_count = 0,
- InstructionOperand* *temps = NULL);
- Instruction* Emit(InstructionCode opcode, InstructionOperand* output,
- InstructionOperand* a, InstructionOperand* b,
- InstructionOperand* c, InstructionOperand* d,
- size_t temp_count = 0, InstructionOperand* *temps = NULL);
- Instruction* Emit(InstructionCode opcode, InstructionOperand* output,
- InstructionOperand* a, InstructionOperand* b,
- InstructionOperand* c, InstructionOperand* d,
- InstructionOperand* e, size_t temp_count = 0,
- InstructionOperand* *temps = NULL);
- Instruction* Emit(InstructionCode opcode, InstructionOperand* output,
- InstructionOperand* a, InstructionOperand* b,
- InstructionOperand* c, InstructionOperand* d,
- InstructionOperand* e, InstructionOperand* f,
- size_t temp_count = 0, InstructionOperand* *temps = NULL);
+ Instruction* Emit(InstructionCode opcode, InstructionOperand output,
+ size_t temp_count = 0, InstructionOperand* temps = nullptr);
+ Instruction* Emit(InstructionCode opcode, InstructionOperand output,
+ InstructionOperand a, size_t temp_count = 0,
+ InstructionOperand* temps = nullptr);
+ Instruction* Emit(InstructionCode opcode, InstructionOperand output,
+ InstructionOperand a, InstructionOperand b,
+ size_t temp_count = 0, InstructionOperand* temps = nullptr);
+ Instruction* Emit(InstructionCode opcode, InstructionOperand output,
+ InstructionOperand a, InstructionOperand b,
+ InstructionOperand c, size_t temp_count = 0,
+ InstructionOperand* temps = nullptr);
+ Instruction* Emit(InstructionCode opcode, InstructionOperand output,
+ InstructionOperand a, InstructionOperand b,
+ InstructionOperand c, InstructionOperand d,
+ size_t temp_count = 0, InstructionOperand* temps = nullptr);
+ Instruction* Emit(InstructionCode opcode, InstructionOperand output,
+ InstructionOperand a, InstructionOperand b,
+ InstructionOperand c, InstructionOperand d,
+ InstructionOperand e, size_t temp_count = 0,
+ InstructionOperand* temps = nullptr);
+ Instruction* Emit(InstructionCode opcode, InstructionOperand output,
+ InstructionOperand a, InstructionOperand b,
+ InstructionOperand c, InstructionOperand d,
+ InstructionOperand e, InstructionOperand f,
+ size_t temp_count = 0, InstructionOperand* temps = nullptr);
Instruction* Emit(InstructionCode opcode, size_t output_count,
- InstructionOperand** outputs, size_t input_count,
- InstructionOperand** inputs, size_t temp_count = 0,
- InstructionOperand* *temps = NULL);
+ InstructionOperand* outputs, size_t input_count,
+ InstructionOperand* inputs, size_t temp_count = 0,
+ InstructionOperand* temps = nullptr);
Instruction* Emit(Instruction* instr);
// ===========================================================================
// ============== Architecture-independent CPU feature methods. ==============
// ===========================================================================
- class Features FINAL {
+ class Features final {
public:
Features() : bits_(0) {}
explicit Features(unsigned bits) : bits_(bits) {}
@@ -126,13 +150,17 @@
bool IsLive(Node* node) const { return !IsDefined(node) && IsUsed(node); }
int GetVirtualRegister(const Node* node);
- // Gets the current mapping if it exists, kNodeUnmapped otherwise.
- int GetMappedVirtualRegister(const Node* node) const;
- const NodeToVregMap& GetNodeMapForTesting() const { return node_map_; }
+ const std::map<NodeId, int> GetVirtualRegistersForTesting() const;
+
+ Isolate* isolate() const { return sequence()->isolate(); }
private:
friend class OperandGenerator;
+ void EmitTableSwitch(const SwitchInfo& sw, InstructionOperand& index_operand);
+ void EmitLookupSwitch(const SwitchInfo& sw,
+ InstructionOperand& value_operand);
+
// Inform the instruction selection that {node} was just defined.
void MarkAsDefined(Node* node);
@@ -140,25 +168,36 @@
// will need to generate code for it.
void MarkAsUsed(Node* node);
- // Checks if {node} is marked as double.
- bool IsDouble(const Node* node) const;
-
- // Inform the register allocator of a double result.
- void MarkAsDouble(Node* node);
-
- // Checks if {node} is marked as reference.
- bool IsReference(const Node* node) const;
-
- // Inform the register allocator of a reference result.
- void MarkAsReference(Node* node);
-
// Inform the register allocation of the representation of the value produced
// by {node}.
- void MarkAsRepresentation(MachineType rep, Node* node);
+ void MarkAsRepresentation(MachineRepresentation rep, Node* node);
+ void MarkAsWord32(Node* node) {
+ MarkAsRepresentation(MachineRepresentation::kWord32, node);
+ }
+ void MarkAsWord64(Node* node) {
+ MarkAsRepresentation(MachineRepresentation::kWord64, node);
+ }
+ void MarkAsFloat32(Node* node) {
+ MarkAsRepresentation(MachineRepresentation::kFloat32, node);
+ }
+ void MarkAsFloat64(Node* node) {
+ MarkAsRepresentation(MachineRepresentation::kFloat64, node);
+ }
+ void MarkAsReference(Node* node) {
+ MarkAsRepresentation(MachineRepresentation::kTagged, node);
+ }
// Inform the register allocation of the representation of the unallocated
// operand {op}.
- void MarkAsRepresentation(MachineType rep, InstructionOperand* op);
+ void MarkAsRepresentation(MachineRepresentation rep,
+ const InstructionOperand& op);
+
+ enum CallBufferFlag {
+ kCallCodeImmediate = 1u << 0,
+ kCallAddressImmediate = 1u << 1,
+ kCallTail = 1u << 2
+ };
+ typedef base::Flags<CallBufferFlag> CallBufferFlags;
// Initialize the call buffer with the InstructionOperands, nodes, etc,
// corresponding
@@ -166,15 +205,10 @@
// {call_code_immediate} to generate immediate operands to calls of code.
// {call_address_immediate} to generate immediate operands to address calls.
void InitializeCallBuffer(Node* call, CallBuffer* buffer,
- bool call_code_immediate,
- bool call_address_immediate);
+ CallBufferFlags flags, int stack_param_delta = 0);
+ bool IsTailCallAddressImmediate();
FrameStateDescriptor* GetFrameStateDescriptor(Node* node);
- void FillTypeVectorFromStateValues(ZoneVector<MachineType>* parameters,
- Node* state_values);
- void AddFrameStateInputs(Node* state, InstructionOperandVector* inputs,
- FrameStateDescriptor* descriptor);
- MachineType GetMachineType(Node* node);
// ===========================================================================
// ============= Architecture-specific graph covering methods. ===============
@@ -194,17 +228,25 @@
MACHINE_OP_LIST(DECLARE_GENERATOR)
#undef DECLARE_GENERATOR
- void VisitFinish(Node* node);
+ void VisitFinishRegion(Node* node);
+ void VisitGuard(Node* node);
void VisitParameter(Node* node);
+ void VisitIfException(Node* node);
+ void VisitOsrValue(Node* node);
void VisitPhi(Node* node);
void VisitProjection(Node* node);
void VisitConstant(Node* node);
- void VisitCall(Node* call);
+ void VisitCall(Node* call, BasicBlock* handler = nullptr);
+ void VisitTailCall(Node* call);
void VisitGoto(BasicBlock* target);
void VisitBranch(Node* input, BasicBlock* tbranch, BasicBlock* fbranch);
- void VisitReturn(Node* value);
+ void VisitSwitch(Node* node, const SwitchInfo& sw);
+ void VisitDeoptimize(DeoptimizeKind kind, Node* value);
+ void VisitReturn(Node* ret);
void VisitThrow(Node* value);
- void VisitDeoptimize(Node* deopt);
+
+ void EmitPrepareArguments(ZoneVector<compiler::PushParameter>* arguments,
+ const CallDescriptor* descriptor, Node* node);
// ===========================================================================
@@ -220,13 +262,15 @@
Linkage* const linkage_;
InstructionSequence* const sequence_;
SourcePositionTable* const source_positions_;
+ SourcePositionMode const source_position_mode_;
Features features_;
Schedule* const schedule_;
- NodeToVregMap node_map_;
BasicBlock* current_block_;
- ZoneDeque<Instruction*> instructions_;
+ ZoneVector<Instruction*> instructions_;
BoolVector defined_;
BoolVector used_;
+ IntVector virtual_registers_;
+ InstructionScheduler* scheduler_;
};
} // namespace compiler