Merge V8 5.3.332.45. DO NOT MERGE
Test: Manual
FPIIM-449
Change-Id: Id3254828b068abdea3cb10442e0172a8c9a98e03
(cherry picked from commit 13e2dadd00298019ed862f2b2fc5068bba730bcf)
diff --git a/src/compiler/ppc/OWNERS b/src/compiler/ppc/OWNERS
index eb007cb..752e8e3 100644
--- a/src/compiler/ppc/OWNERS
+++ b/src/compiler/ppc/OWNERS
@@ -3,3 +3,4 @@
joransiu@ca.ibm.com
mbrandy@us.ibm.com
michael_dawson@ca.ibm.com
+bjaideep@ca.ibm.com
diff --git a/src/compiler/ppc/code-generator-ppc.cc b/src/compiler/ppc/code-generator-ppc.cc
index 8a0c585..4909414 100644
--- a/src/compiler/ppc/code-generator-ppc.cc
+++ b/src/compiler/ppc/code-generator-ppc.cc
@@ -216,7 +216,12 @@
DCHECK_EQ(0, offset_immediate_);
__ add(scratch1_, object_, offset_);
}
- __ CallStub(&stub);
+ if (must_save_lr_ && FLAG_enable_embedded_constant_pool) {
+ ConstantPoolUnavailableScope constant_pool_unavailable(masm());
+ __ CallStub(&stub);
+ } else {
+ __ CallStub(&stub);
+ }
if (must_save_lr_) {
// We need to save and restore lr if the frame was elided.
__ Pop(scratch1_);
@@ -436,6 +441,34 @@
DCHECK_EQ(LeaveRC, i.OutputRCBit()); \
} while (0)
+#define ASSEMBLE_IEEE754_UNOP(name) \
+ do { \
+ /* TODO(bmeurer): We should really get rid of this special instruction, */ \
+ /* and generate a CallAddress instruction instead. */ \
+ FrameScope scope(masm(), StackFrame::MANUAL); \
+ __ PrepareCallCFunction(0, 1, kScratchReg); \
+ __ MovToFloatParameter(i.InputDoubleRegister(0)); \
+ __ CallCFunction(ExternalReference::ieee754_##name##_function(isolate()), \
+ 0, 1); \
+ /* Move the result in the double result register. */ \
+ __ MovFromFloatResult(i.OutputDoubleRegister()); \
+ DCHECK_EQ(LeaveRC, i.OutputRCBit()); \
+ } while (0)
+
+#define ASSEMBLE_IEEE754_BINOP(name) \
+ do { \
+ /* TODO(bmeurer): We should really get rid of this special instruction, */ \
+ /* and generate a CallAddress instruction instead. */ \
+ FrameScope scope(masm(), StackFrame::MANUAL); \
+ __ PrepareCallCFunction(0, 2, kScratchReg); \
+ __ MovToFloatParameters(i.InputDoubleRegister(0), \
+ i.InputDoubleRegister(1)); \
+ __ CallCFunction(ExternalReference::ieee754_##name##_function(isolate()), \
+ 0, 2); \
+ /* Move the result in the double result register. */ \
+ __ MovFromFloatResult(i.OutputDoubleRegister()); \
+ DCHECK_EQ(LeaveRC, i.OutputRCBit()); \
+ } while (0)
#define ASSEMBLE_FLOAT_MAX(scratch_reg) \
do { \
@@ -874,6 +907,9 @@
AssembleArchTableSwitch(instr);
DCHECK_EQ(LeaveRC, i.OutputRCBit());
break;
+ case kArchDebugBreak:
+ __ stop("kArchDebugBreak");
+ break;
case kArchNop:
case kArchThrowTerminator:
// don't emit code for nops.
@@ -1226,6 +1262,45 @@
// and generate a CallAddress instruction instead.
ASSEMBLE_FLOAT_MODULO();
break;
+ case kIeee754Float64Atan:
+ ASSEMBLE_IEEE754_UNOP(atan);
+ break;
+ case kIeee754Float64Atan2:
+ ASSEMBLE_IEEE754_BINOP(atan2);
+ break;
+ case kIeee754Float64Tan:
+ ASSEMBLE_IEEE754_UNOP(tan);
+ break;
+ case kIeee754Float64Cbrt:
+ ASSEMBLE_IEEE754_UNOP(cbrt);
+ break;
+ case kIeee754Float64Sin:
+ ASSEMBLE_IEEE754_UNOP(sin);
+ break;
+ case kIeee754Float64Cos:
+ ASSEMBLE_IEEE754_UNOP(cos);
+ break;
+ case kIeee754Float64Exp:
+ ASSEMBLE_IEEE754_UNOP(exp);
+ break;
+ case kIeee754Float64Expm1:
+ ASSEMBLE_IEEE754_UNOP(expm1);
+ break;
+ case kIeee754Float64Atanh:
+ ASSEMBLE_IEEE754_UNOP(atanh);
+ break;
+ case kIeee754Float64Log:
+ ASSEMBLE_IEEE754_UNOP(log);
+ break;
+ case kIeee754Float64Log1p:
+ ASSEMBLE_IEEE754_UNOP(log1p);
+ break;
+ case kIeee754Float64Log2:
+ ASSEMBLE_IEEE754_UNOP(log2);
+ break;
+ case kIeee754Float64Log10:
+ ASSEMBLE_IEEE754_UNOP(log10);
+ break;
case kPPC_Neg:
__ neg(i.OutputRegister(), i.InputRegister(0), LeaveOE, i.OutputRCBit());
break;
@@ -1308,6 +1383,12 @@
DCHECK_EQ(SetRC, i.OutputRCBit());
break;
#endif
+ case kPPC_Float64SilenceNaN: {
+ DoubleRegister value = i.InputDoubleRegister(0);
+ DoubleRegister result = i.OutputDoubleRegister();
+ __ CanonicalizeNaN(result, value);
+ break;
+ }
case kPPC_Push:
if (instr->InputAt(0)->IsFPRegister()) {
__ stfdu(i.InputDoubleRegister(0), MemOperand(sp, -kDoubleSize));
@@ -1321,8 +1402,15 @@
case kPPC_PushFrame: {
int num_slots = i.InputInt32(1);
if (instr->InputAt(0)->IsFPRegister()) {
- __ StoreDoubleU(i.InputDoubleRegister(0),
+ LocationOperand* op = LocationOperand::cast(instr->InputAt(0));
+ if (op->representation() == MachineRepresentation::kFloat64) {
+ __ StoreDoubleU(i.InputDoubleRegister(0),
MemOperand(sp, -num_slots * kPointerSize), r0);
+ } else {
+ DCHECK(op->representation() == MachineRepresentation::kFloat32);
+ __ StoreSingleU(i.InputDoubleRegister(0),
+ MemOperand(sp, -num_slots * kPointerSize), r0);
+ }
} else {
__ StorePU(i.InputRegister(0),
MemOperand(sp, -num_slots * kPointerSize), r0);
@@ -1332,8 +1420,15 @@
case kPPC_StoreToStackSlot: {
int slot = i.InputInt32(1);
if (instr->InputAt(0)->IsFPRegister()) {
- __ StoreDouble(i.InputDoubleRegister(0),
- MemOperand(sp, slot * kPointerSize), r0);
+ LocationOperand* op = LocationOperand::cast(instr->InputAt(0));
+ if (op->representation() == MachineRepresentation::kFloat64) {
+ __ StoreDouble(i.InputDoubleRegister(0),
+ MemOperand(sp, slot * kPointerSize), r0);
+ } else {
+ DCHECK(op->representation() == MachineRepresentation::kFloat32);
+ __ StoreSingle(i.InputDoubleRegister(0),
+ MemOperand(sp, slot * kPointerSize), r0);
+ }
} else {
__ StoreP(i.InputRegister(0), MemOperand(sp, slot * kPointerSize), r0);
}
@@ -1929,6 +2024,7 @@
if (src.rmode() == RelocInfo::WASM_MEMORY_SIZE_REFERENCE) {
#else
if (src.rmode() == RelocInfo::WASM_MEMORY_REFERENCE ||
+ src.rmode() == RelocInfo::WASM_GLOBAL_REFERENCE ||
src.rmode() == RelocInfo::WASM_MEMORY_SIZE_REFERENCE) {
#endif
__ mov(dst, Operand(src.ToInt32(), src.rmode()));
@@ -1938,7 +2034,8 @@
break;
case Constant::kInt64:
#if V8_TARGET_ARCH_PPC64
- if (src.rmode() == RelocInfo::WASM_MEMORY_REFERENCE) {
+ if (src.rmode() == RelocInfo::WASM_MEMORY_REFERENCE ||
+ src.rmode() == RelocInfo::WASM_GLOBAL_REFERENCE) {
__ mov(dst, Operand(src.ToInt64(), src.rmode()));
} else {
DCHECK(src.rmode() != RelocInfo::WASM_MEMORY_SIZE_REFERENCE);
@@ -1997,17 +2094,33 @@
__ Move(dst, src);
} else {
DCHECK(destination->IsFPStackSlot());
- __ StoreDouble(src, g.ToMemOperand(destination), r0);
+ LocationOperand* op = LocationOperand::cast(source);
+ if (op->representation() == MachineRepresentation::kFloat64) {
+ __ StoreDouble(src, g.ToMemOperand(destination), r0);
+ } else {
+ __ StoreSingle(src, g.ToMemOperand(destination), r0);
+ }
}
} else if (source->IsFPStackSlot()) {
DCHECK(destination->IsFPRegister() || destination->IsFPStackSlot());
MemOperand src = g.ToMemOperand(source);
if (destination->IsFPRegister()) {
- __ LoadDouble(g.ToDoubleRegister(destination), src, r0);
+ LocationOperand* op = LocationOperand::cast(source);
+ if (op->representation() == MachineRepresentation::kFloat64) {
+ __ LoadDouble(g.ToDoubleRegister(destination), src, r0);
+ } else {
+ __ LoadSingle(g.ToDoubleRegister(destination), src, r0);
+ }
} else {
+ LocationOperand* op = LocationOperand::cast(source);
DoubleRegister temp = kScratchDoubleReg;
- __ LoadDouble(temp, src, r0);
- __ StoreDouble(temp, g.ToMemOperand(destination), r0);
+ if (op->representation() == MachineRepresentation::kFloat64) {
+ __ LoadDouble(temp, src, r0);
+ __ StoreDouble(temp, g.ToMemOperand(destination), r0);
+ } else {
+ __ LoadSingle(temp, src, r0);
+ __ StoreSingle(temp, g.ToMemOperand(destination), r0);
+ }
}
} else {
UNREACHABLE();
diff --git a/src/compiler/ppc/instruction-codes-ppc.h b/src/compiler/ppc/instruction-codes-ppc.h
index 23cd235..d697da3 100644
--- a/src/compiler/ppc/instruction-codes-ppc.h
+++ b/src/compiler/ppc/instruction-codes-ppc.h
@@ -93,6 +93,7 @@
V(PPC_Uint32ToFloat32) \
V(PPC_Uint32ToDouble) \
V(PPC_Float32ToDouble) \
+ V(PPC_Float64SilenceNaN) \
V(PPC_DoubleToInt32) \
V(PPC_DoubleToUint32) \
V(PPC_DoubleToInt64) \
diff --git a/src/compiler/ppc/instruction-scheduler-ppc.cc b/src/compiler/ppc/instruction-scheduler-ppc.cc
index 1259a87..f41900d 100644
--- a/src/compiler/ppc/instruction-scheduler-ppc.cc
+++ b/src/compiler/ppc/instruction-scheduler-ppc.cc
@@ -92,6 +92,7 @@
case kPPC_Uint32ToFloat32:
case kPPC_Uint32ToDouble:
case kPPC_Float32ToDouble:
+ case kPPC_Float64SilenceNaN:
case kPPC_DoubleToInt32:
case kPPC_DoubleToUint32:
case kPPC_DoubleToInt64:
diff --git a/src/compiler/ppc/instruction-selector-ppc.cc b/src/compiler/ppc/instruction-selector-ppc.cc
index b8ca3ba..b724001 100644
--- a/src/compiler/ppc/instruction-selector-ppc.cc
+++ b/src/compiler/ppc/instruction-selector-ppc.cc
@@ -1294,6 +1294,10 @@
void InstructionSelector::VisitFloat64Max(Node* node) { UNREACHABLE(); }
+void InstructionSelector::VisitFloat64SilenceNaN(Node* node) {
+ VisitRR(this, kPPC_Float64SilenceNaN, node);
+}
+
void InstructionSelector::VisitFloat32Min(Node* node) { UNREACHABLE(); }
@@ -1310,11 +1314,24 @@
VisitRR(this, kPPC_AbsDouble, node);
}
-
void InstructionSelector::VisitFloat32Sqrt(Node* node) {
VisitRR(this, kPPC_SqrtDouble | MiscField::encode(1), node);
}
+void InstructionSelector::VisitFloat64Ieee754Unop(Node* node,
+ InstructionCode opcode) {
+ PPCOperandGenerator g(this);
+ Emit(opcode, g.DefineAsFixed(node, d1), g.UseFixed(node->InputAt(0), d1))
+ ->MarkAsCall();
+}
+
+void InstructionSelector::VisitFloat64Ieee754Binop(Node* node,
+ InstructionCode opcode) {
+ PPCOperandGenerator g(this);
+ Emit(opcode, g.DefineAsFixed(node, d1),
+ g.UseFixed(node->InputAt(0), d1),
+ g.UseFixed(node->InputAt(1), d2))->MarkAsCall();
+}
void InstructionSelector::VisitFloat64Sqrt(Node* node) {
VisitRR(this, kPPC_SqrtDouble, node);
@@ -1365,6 +1382,9 @@
UNREACHABLE();
}
+void InstructionSelector::VisitFloat32Neg(Node* node) { UNREACHABLE(); }
+
+void InstructionSelector::VisitFloat64Neg(Node* node) { UNREACHABLE(); }
void InstructionSelector::VisitInt32AddWithOverflow(Node* node) {
if (Node* ovf = NodeProperties::FindProjection(node, 1)) {
@@ -1991,6 +2011,13 @@
// We omit kWord32ShiftIsSafe as s[rl]w use 0x3f as a mask rather than 0x1f.
}
+// static
+MachineOperatorBuilder::AlignmentRequirements
+InstructionSelector::AlignmentRequirements() {
+ return MachineOperatorBuilder::AlignmentRequirements::
+ FullUnalignedAccessSupport();
+}
+
} // namespace compiler
} // namespace internal
} // namespace v8