Merge V8 5.3.332.45. DO NOT MERGE
Test: Manual
FPIIM-449
Change-Id: Id3254828b068abdea3cb10442e0172a8c9a98e03
(cherry picked from commit 13e2dadd00298019ed862f2b2fc5068bba730bcf)
diff --git a/src/globals.h b/src/globals.h
index ed297e7..a31f237 100644
--- a/src/globals.h
+++ b/src/globals.h
@@ -150,12 +150,21 @@
// encoded immediate, the addresses have to be in range of 256MB aligned
// region. Used only for large object space.
const size_t kMaximalCodeRangeSize = 256 * MB;
+const size_t kCodeRangeAreaAlignment = 256 * MB;
+#elif V8_HOST_ARCH_PPC && V8_TARGET_ARCH_PPC && V8_OS_LINUX
+const size_t kMaximalCodeRangeSize = 512 * MB;
+const size_t kCodeRangeAreaAlignment = 64 * KB; // OS page on PPC Linux
#else
const size_t kMaximalCodeRangeSize = 512 * MB;
+const size_t kCodeRangeAreaAlignment = 4 * KB; // OS page.
#endif
#if V8_OS_WIN
const size_t kMinimumCodeRangeSize = 4 * MB;
const size_t kReservedCodeRangePages = 1;
+// On PPC Linux PageSize is 4MB
+#elif V8_HOST_ARCH_PPC && V8_TARGET_ARCH_PPC && V8_OS_LINUX
+const size_t kMinimumCodeRangeSize = 12 * MB;
+const size_t kReservedCodeRangePages = 0;
#else
const size_t kMinimumCodeRangeSize = 3 * MB;
const size_t kReservedCodeRangePages = 0;
@@ -169,14 +178,24 @@
const bool kRequiresCodeRange = true;
const size_t kMaximalCodeRangeSize = 256 * MB;
const size_t kMinimumCodeRangeSize = 3 * MB;
-const size_t kReservedCodeRangePages = 0;
+const size_t kCodeRangeAreaAlignment = 4 * KB; // OS page.
+#elif V8_HOST_ARCH_PPC && V8_TARGET_ARCH_PPC && V8_OS_LINUX
+const bool kRequiresCodeRange = false;
+const size_t kMaximalCodeRangeSize = 0 * MB;
+const size_t kMinimumCodeRangeSize = 0 * MB;
+const size_t kCodeRangeAreaAlignment = 64 * KB; // OS page on PPC Linux
#else
const bool kRequiresCodeRange = false;
const size_t kMaximalCodeRangeSize = 0 * MB;
const size_t kMinimumCodeRangeSize = 0 * MB;
+const size_t kCodeRangeAreaAlignment = 4 * KB; // OS page.
+#endif
const size_t kReservedCodeRangePages = 0;
#endif
-#endif
+
+// The external allocation limit should be below 256 MB on all architectures
+// to avoid that resource-constrained embedders run low on memory.
+const int kExternalAllocationLimit = 192 * 1024 * 1024;
STATIC_ASSERT(kPointerSize == (1 << kPointerSizeLog2));
@@ -452,6 +471,26 @@
kSimd128Unaligned
};
+// Possible outcomes for decisions.
+enum class Decision : uint8_t { kUnknown, kTrue, kFalse };
+
+inline size_t hash_value(Decision decision) {
+ return static_cast<uint8_t>(decision);
+}
+
+inline std::ostream& operator<<(std::ostream& os, Decision decision) {
+ switch (decision) {
+ case Decision::kUnknown:
+ return os << "Unknown";
+ case Decision::kTrue:
+ return os << "True";
+ case Decision::kFalse:
+ return os << "False";
+ }
+ UNREACHABLE();
+ return os;
+}
+
// Supported write barrier modes.
enum WriteBarrierKind : uint8_t {
kNoWriteBarrier,
@@ -549,6 +588,8 @@
int instr_size;
int reloc_size;
int constant_pool_size;
+ byte* unwinding_info;
+ int unwinding_info_size;
Assembler* origin;
};
@@ -580,8 +621,6 @@
MEGAMORPHIC,
// A generic handler is installed and no extra typefeedback is recorded.
GENERIC,
- // Special state for debug break or step in prepare stubs.
- DEBUG_STUB
};
enum CacheHolderFlag {
@@ -591,6 +630,7 @@
kCacheOnReceiver
};
+enum WhereToStart { kStartAtReceiver, kStartAtPrototype };
// The Store Buffer (GC).
typedef enum {
@@ -640,6 +680,15 @@
} bits;
};
+#if V8_TARGET_LITTLE_ENDIAN
+typedef IeeeDoubleLittleEndianArchType IeeeDoubleArchType;
+const int kIeeeDoubleMantissaWordOffset = 0;
+const int kIeeeDoubleExponentWordOffset = 4;
+#else
+typedef IeeeDoubleBigEndianArchType IeeeDoubleArchType;
+const int kIeeeDoubleMantissaWordOffset = 4;
+const int kIeeeDoubleExponentWordOffset = 0;
+#endif
// AccessorCallback
struct AccessorDescriptor {
@@ -693,7 +742,6 @@
ARMv7,
ARMv8,
SUDIV,
- MLS,
UNALIGNED_ACCESSES,
MOVW_MOVT_IMMEDIATE_LOADS,
VFP32DREGS,
@@ -800,8 +848,14 @@
};
// The mips architecture prior to revision 5 has inverted encoding for sNaN.
-#if (V8_TARGET_ARCH_MIPS && !defined(_MIPS_ARCH_MIPS32R6)) || \
- (V8_TARGET_ARCH_MIPS64 && !defined(_MIPS_ARCH_MIPS64R6))
+// The x87 FPU convert the sNaN to qNaN automatically when loading sNaN from
+// memmory.
+// Use mips sNaN which is a not used qNaN in x87 port as sNaN to workaround this
+// issue
+// for some test cases.
+#if (V8_TARGET_ARCH_MIPS && !defined(_MIPS_ARCH_MIPS32R6)) || \
+ (V8_TARGET_ARCH_MIPS64 && !defined(_MIPS_ARCH_MIPS64R6)) || \
+ (V8_TARGET_ARCH_X87)
const uint32_t kHoleNanUpper32 = 0xFFFF7FFF;
const uint32_t kHoleNanLower32 = 0xFFFF7FFF;
#else
@@ -1007,6 +1061,10 @@
return kind & FunctionKind::kAsyncFunction;
}
+inline bool IsResumableFunction(FunctionKind kind) {
+ return IsGeneratorFunction(kind) || IsAsyncFunction(kind);
+}
+
inline bool IsConciseMethod(FunctionKind kind) {
DCHECK(IsValidFunctionKind(kind));
return kind & FunctionKind::kConciseMethod;