Merge V8 5.3.332.45. DO NOT MERGE
Test: Manual
FPIIM-449
Change-Id: Id3254828b068abdea3cb10442e0172a8c9a98e03
(cherry picked from commit 13e2dadd00298019ed862f2b2fc5068bba730bcf)
diff --git a/src/mips/macro-assembler-mips.h b/src/mips/macro-assembler-mips.h
index 2417025..8c6e5bd 100644
--- a/src/mips/macro-assembler-mips.h
+++ b/src/mips/macro-assembler-mips.h
@@ -687,6 +687,10 @@
// ---------------------------------------------------------------------------
// Pseudo-instructions.
+ // Change endianness
+ void ByteSwapSigned(Register reg, int operand_size);
+ void ByteSwapUnsigned(Register reg, int operand_size);
+
void mov(Register rd, Register rt) { or_(rd, rt, zero_reg); }
void Ulh(Register rd, const MemOperand& rs);
@@ -871,6 +875,12 @@
void Floor_w_d(FPURegister fd, FPURegister fs);
void Ceil_w_d(FPURegister fd, FPURegister fs);
+ // Preserve value of a NaN operand
+ void SubNanPreservePayloadAndSign_s(FPURegister fd, FPURegister fs,
+ FPURegister ft);
+ void SubNanPreservePayloadAndSign_d(FPURegister fd, FPURegister fs,
+ FPURegister ft);
+
// FP32 mode: Move the general purpose register into
// the high part of the double-register pair.
// FP64 mode: Move the general-purpose register into
@@ -1231,6 +1241,9 @@
Handle<WeakCell> cell, Handle<Code> success,
SmiCheckType smi_check_type);
+ // If the value is a NaN, canonicalize the value else, do nothing.
+ void FPUCanonicalizeNaN(const DoubleRegister dst, const DoubleRegister src);
+
// Get value of the weak cell.
void GetWeakValue(Register value, Handle<WeakCell> cell);