Merge V8 5.3.332.45. DO NOT MERGE
Test: Manual
FPIIM-449
Change-Id: Id3254828b068abdea3cb10442e0172a8c9a98e03
(cherry picked from commit 13e2dadd00298019ed862f2b2fc5068bba730bcf)
diff --git a/test/cctest/compiler/test-run-native-calls.cc b/test/cctest/compiler/test-run-native-calls.cc
index a63cc8a..9c67fd5 100644
--- a/test/cctest/compiler/test-run-native-calls.cc
+++ b/test/cctest/compiler/test-run-native-calls.cc
@@ -18,6 +18,8 @@
namespace internal {
namespace compiler {
+const auto GetRegConfig = RegisterConfiguration::Turbofan;
+
namespace {
typedef float float32;
typedef double float64;
@@ -76,12 +78,8 @@
class RegisterPairs : public Pairs {
public:
RegisterPairs()
- : Pairs(
- 100,
- RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->num_allocatable_general_registers(),
- RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->allocatable_general_codes()) {}
+ : Pairs(100, GetRegConfig()->num_allocatable_general_registers(),
+ GetRegConfig()->allocatable_general_codes()) {}
};
@@ -91,10 +89,14 @@
Float32RegisterPairs()
: Pairs(
100,
- RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->num_allocatable_aliased_double_registers(),
- RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->allocatable_double_codes()) {}
+#if V8_TARGET_ARCH_ARM
+ // TODO(bbudge) Modify wasm linkage to allow use of all float regs.
+ GetRegConfig()->num_allocatable_double_registers() / 2 - 2,
+#else
+ GetRegConfig()->num_allocatable_double_registers(),
+#endif
+ GetRegConfig()->allocatable_double_codes()) {
+ }
};
@@ -102,12 +104,8 @@
class Float64RegisterPairs : public Pairs {
public:
Float64RegisterPairs()
- : Pairs(
- 100,
- RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->num_allocatable_aliased_double_registers(),
- RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->allocatable_double_codes()) {}
+ : Pairs(100, GetRegConfig()->num_allocatable_double_registers(),
+ GetRegConfig()->allocatable_double_codes()) {}
};
@@ -136,7 +134,12 @@
if (IsFloatingPoint(type.representation())) {
// Allocate a floating point register/stack location.
if (fp_offset < fp_count) {
- return LinkageLocation::ForRegister(fp_regs[fp_offset++]);
+ int code = fp_regs[fp_offset++];
+#if V8_TARGET_ARCH_ARM
+ // TODO(bbudge) Modify wasm linkage to allow use of all float regs.
+ if (type.representation() == MachineRepresentation::kFloat32) code *= 2;
+#endif
+ return LinkageLocation::ForRegister(code);
} else {
int offset = -1 - stack_offset;
stack_offset += StackWords(type);
@@ -154,10 +157,7 @@
}
}
int StackWords(MachineType type) {
- // TODO(titzer): hack. float32 occupies 8 bytes on stack.
- int size = IsFloatingPoint(type.representation())
- ? kDoubleSize
- : (1 << ElementSizeLog2Of(type.representation()));
+ int size = 1 << ElementSizeLog2Of(type.representation());
return size <= kPointerSize ? 1 : size / kPointerSize;
}
void Reset() {
@@ -636,15 +636,14 @@
// Separate tests for parallelization.
-#define TEST_INT32_SUB_WITH_RET(x) \
- TEST(Run_Int32Sub_all_allocatable_pairs_##x) { \
- if (x < Register::kNumRegisters && \
- Register::from_code(x).IsAllocatable()) { \
- Test_RunInt32SubWithRet(x); \
- } \
+#define TEST_INT32_SUB_WITH_RET(x) \
+ TEST(Run_Int32Sub_all_allocatable_pairs_##x) { \
+ if (x < Register::kNumRegisters && \
+ GetRegConfig()->IsAllocatableGeneralCode(x)) { \
+ Test_RunInt32SubWithRet(x); \
+ } \
}
-
TEST_INT32_SUB_WITH_RET(0)
TEST_INT32_SUB_WITH_RET(1)
TEST_INT32_SUB_WITH_RET(2)
@@ -692,9 +691,7 @@
base::AccountingAllocator allocator;
Zone zone(&allocator);
int parray[2];
- int rarray[] = {
- RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->GetAllocatableGeneralCode(0)};
+ int rarray[] = {GetRegConfig()->GetAllocatableGeneralCode(0)};
pairs.Next(&parray[0], &parray[1], false);
Allocator params(parray, 2, nullptr, 0);
Allocator rets(rarray, 1, nullptr, 0);
@@ -741,14 +738,12 @@
static void Test_Int32_WeightedSum_of_size(int count) {
Int32Signature sig(count);
for (int p0 = 0; p0 < Register::kNumRegisters; p0++) {
- if (Register::from_code(p0).IsAllocatable()) {
+ if (GetRegConfig()->IsAllocatableGeneralCode(p0)) {
base::AccountingAllocator allocator;
Zone zone(&allocator);
int parray[] = {p0};
- int rarray[] = {
- RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->GetAllocatableGeneralCode(0)};
+ int rarray[] = {GetRegConfig()->GetAllocatableGeneralCode(0)};
Allocator params(parray, 1, nullptr, 0);
Allocator rets(rarray, 1, nullptr, 0);
RegisterConfig config(params, rets);
@@ -801,12 +796,8 @@
template <int which>
void Test_Int32_Select() {
- int parray[] = {
- RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->GetAllocatableGeneralCode(0)};
- int rarray[] = {
- RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->GetAllocatableGeneralCode(0)};
+ int parray[] = {GetRegConfig()->GetAllocatableGeneralCode(0)};
+ int rarray[] = {GetRegConfig()->GetAllocatableGeneralCode(0)};
Allocator params(parray, 1, nullptr, 0);
Allocator rets(rarray, 1, nullptr, 0);
RegisterConfig config(params, rets);
@@ -843,14 +834,10 @@
TEST(Int64Select_registers) {
- if (RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->num_allocatable_general_registers() < 2)
- return;
+ if (GetRegConfig()->num_allocatable_general_registers() < 2) return;
if (kPointerSize < 8) return; // TODO(titzer): int64 on 32-bit platforms
- int rarray[] = {
- RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->GetAllocatableGeneralCode(0)};
+ int rarray[] = {GetRegConfig()->GetAllocatableGeneralCode(0)};
ArgsBuffer<int64_t>::Sig sig(2);
RegisterPairs pairs;
@@ -871,14 +858,11 @@
TEST(Float32Select_registers) {
- if (RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->num_allocatable_double_registers() < 2) {
+ if (GetRegConfig()->num_allocatable_double_registers() < 2) {
return;
}
- int rarray[] = {
- RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->GetAllocatableDoubleCode(0)};
+ int rarray[] = {GetRegConfig()->GetAllocatableDoubleCode(0)};
ArgsBuffer<float32>::Sig sig(2);
Float32RegisterPairs pairs;
@@ -899,15 +883,9 @@
TEST(Float64Select_registers) {
- if (RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->num_allocatable_double_registers() < 2)
- return;
- if (RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->num_allocatable_general_registers() < 2)
- return;
- int rarray[] = {
- RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->GetAllocatableDoubleCode(0)};
+ if (GetRegConfig()->num_allocatable_double_registers() < 2) return;
+ if (GetRegConfig()->num_allocatable_general_registers() < 2) return;
+ int rarray[] = {GetRegConfig()->GetAllocatableDoubleCode(0)};
ArgsBuffer<float64>::Sig sig(2);
Float64RegisterPairs pairs;
@@ -928,9 +906,7 @@
TEST(Float32Select_stack_params_return_reg) {
- int rarray[] = {
- RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->GetAllocatableDoubleCode(0)};
+ int rarray[] = {GetRegConfig()->GetAllocatableDoubleCode(0)};
Allocator params(nullptr, 0, nullptr, 0);
Allocator rets(nullptr, 0, rarray, 1);
RegisterConfig config(params, rets);
@@ -951,9 +927,7 @@
TEST(Float64Select_stack_params_return_reg) {
- int rarray[] = {
- RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->GetAllocatableDoubleCode(0)};
+ int rarray[] = {GetRegConfig()->GetAllocatableDoubleCode(0)};
Allocator params(nullptr, 0, nullptr, 0);
Allocator rets(nullptr, 0, rarray, 1);
RegisterConfig config(params, rets);
@@ -1006,9 +980,7 @@
TEST(Float64StackParamsToStackParams) {
- int rarray[] = {
- RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->GetAllocatableDoubleCode(0)};
+ int rarray[] = {GetRegConfig()->GetAllocatableDoubleCode(0)};
Allocator params(nullptr, 0, nullptr, 0);
Allocator rets(nullptr, 0, rarray, 1);
@@ -1027,9 +999,7 @@
void MixedParamTest(int start) {
- if (RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->num_double_registers() < 2)
- return;
+ if (GetRegConfig()->num_double_registers() < 2) return;
// TODO(titzer): mix in 64-bit types on all platforms when supported.
#if V8_TARGET_ARCH_32_BIT
@@ -1058,22 +1028,12 @@
const int num_params = static_cast<int>(arraysize(types) - start);
// Build call descriptor
- int parray_gp[] = {
- RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->GetAllocatableGeneralCode(0),
- RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->GetAllocatableGeneralCode(1)};
- int rarray_gp[] = {
- RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->GetAllocatableGeneralCode(0)};
- int parray_fp[] = {
- RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->GetAllocatableDoubleCode(0),
- RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->GetAllocatableDoubleCode(1)};
- int rarray_fp[] = {
- RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->GetAllocatableDoubleCode(0)};
+ int parray_gp[] = {GetRegConfig()->GetAllocatableGeneralCode(0),
+ GetRegConfig()->GetAllocatableGeneralCode(1)};
+ int rarray_gp[] = {GetRegConfig()->GetAllocatableGeneralCode(0)};
+ int parray_fp[] = {GetRegConfig()->GetAllocatableDoubleCode(0),
+ GetRegConfig()->GetAllocatableDoubleCode(1)};
+ int rarray_fp[] = {GetRegConfig()->GetAllocatableDoubleCode(0)};
Allocator palloc(parray_gp, 2, parray_fp, 2);
Allocator ralloc(rarray_gp, 1, rarray_fp, 1);
RegisterConfig config(palloc, ralloc);
@@ -1174,29 +1134,17 @@
// Test: Generate with a function f which reserves a stack slot, call an inner
// function g from f which writes into the stack slot of f.
- if (RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->num_allocatable_double_registers() < 2)
- return;
+ if (GetRegConfig()->num_allocatable_double_registers() < 2) return;
Isolate* isolate = CcTest::InitIsolateOnce();
// Lots of code to generate the build descriptor for the inner function.
- int parray_gp[] = {
- RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->GetAllocatableGeneralCode(0),
- RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->GetAllocatableGeneralCode(1)};
- int rarray_gp[] = {
- RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->GetAllocatableGeneralCode(0)};
- int parray_fp[] = {
- RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->GetAllocatableDoubleCode(0),
- RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->GetAllocatableDoubleCode(1)};
- int rarray_fp[] = {
- RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
- ->GetAllocatableDoubleCode(0)};
+ int parray_gp[] = {GetRegConfig()->GetAllocatableGeneralCode(0),
+ GetRegConfig()->GetAllocatableGeneralCode(1)};
+ int rarray_gp[] = {GetRegConfig()->GetAllocatableGeneralCode(0)};
+ int parray_fp[] = {GetRegConfig()->GetAllocatableDoubleCode(0),
+ GetRegConfig()->GetAllocatableDoubleCode(1)};
+ int rarray_fp[] = {GetRegConfig()->GetAllocatableDoubleCode(0)};
Allocator palloc(parray_gp, 2, parray_fp, 2);
Allocator ralloc(rarray_gp, 1, rarray_fp, 1);
RegisterConfig config(palloc, ralloc);