commit 6ded16be15dd865a9b21ea304d5273c8be299c87
author Steve Block <steveblock@google.com> Mon May 10 14:33:55 2010 +0100
committer Steve Block <steveblock@google.com> Mon May 10 15:08:22 2010 +0100
tree b3661ae5d929e233f7024223f3fad0f2a284cd6e
parent 6599b9dd3411791c9d89ab7efbfb4131e5664c48

Update V8 to r4588

We're using WebKit r58033, as used by
http://src.chromium.org/svn/releases/5.0.387.0/DEPS
This requires http://v8.googlecode.com/svn/trunk@4465 but this version has a
crashing bug for ARM. Instead we use http://v8.googlecode.com/svn/trunk@4588,
which is used by http://src.chromium.org/svn/releases/6.0.399.0/DEPS

Note that a trivial bug fix was required in arm/codegen-arm.cc. This is guarded
with ANDROID. See http://code.google.com/p/v8/issues/detail?id=703

Change-Id: I459647a8286c4f8c7405f0c5581ecbf051a6f1e8

src/mips/simulator-mips.cc

diff --git a/src/mips/simulator-mips.cc b/src/mips/simulator-mips.cc
index 2e2dc86..bdb3b7f 100644
--- a/src/mips/simulator-mips.cc
+++ b/src/mips/simulator-mips.cc
@@ -31,7 +31,7 @@
 
 #include "disasm.h"
 #include "assembler.h"
-#include "globals.h"    // Need the bit_cast
+#include "globals.h"    // Need the BitCast
 #include "mips/constants-mips.h"
 #include "mips/simulator-mips.h"
 
@@ -139,7 +139,7 @@
   sim_->set_pc(sim_->get_pc() + Instruction::kInstructionSize);
   Debug();
 }
-#endif  // def GENERATED_CODE_COVERAGE
+#endif  // GENERATED_CODE_COVERAGE
 
 
 int32_t Debugger::GetRegisterValue(int regnum) {
@@ -604,7 +604,7 @@
 
 void Simulator::set_fpu_register_double(int fpureg, double value) {
   ASSERT((fpureg >= 0) && (fpureg < kNumFPURegisters) && ((fpureg % 2) == 0));
-  *v8i::bit_cast<double*, int32_t*>(&FPUregisters_[fpureg]) = value;
+  *v8i::BitCast<double*, int32_t*>(&FPUregisters_[fpureg]) = value;
 }
 
 
@@ -625,7 +625,7 @@
 
 double Simulator::get_fpu_register_double(int fpureg) const {
   ASSERT((fpureg >= 0) && (fpureg < kNumFPURegisters) && ((fpureg % 2) == 0));
-  return *v8i::bit_cast<double*, int32_t*>(
+  return *v8i::BitCast<double*, int32_t*>(
       const_cast<int32_t*>(&FPUregisters_[fpureg]));
 }
 
@@ -901,7 +901,7 @@
           break;
         case MFHC1:
           fp_out = get_fpu_register_double(fs_reg);
-          alu_out = *v8i::bit_cast<int32_t*, double*>(&fp_out);
+          alu_out = *v8i::BitCast<int32_t*, double*>(&fp_out);
           break;
         case MTC1:
         case MTHC1:
@@ -1644,5 +1644,5 @@
 
 } }  // namespace assembler::mips
 
-#endif  // !defined(__mips)
+#endif  // __mips