Merge V8 at r7668: Initial merge by Git.
Change-Id: I1703c8b4f5c63052451a22cf3fb878abc9a0ec75
diff --git a/test/cctest/test-disasm-arm.cc b/test/cctest/test-disasm-arm.cc
index 3221614..65a2cf3 100644
--- a/test/cctest/test-disasm-arm.cc
+++ b/test/cctest/test-disasm-arm.cc
@@ -1,4 +1,4 @@
-// Copyright 2007-2008 the V8 project authors. All rights reserved.
+// Copyright 2011 the V8 project authors. All rights reserved.
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are
// met:
@@ -72,11 +72,11 @@
// Setup V8 to a state where we can at least run the assembler and
// disassembler. Declare the variables and allocate the data structures used
// in the rest of the macros.
-#define SETUP() \
- InitializeVM(); \
- v8::HandleScope scope; \
+#define SETUP() \
+ InitializeVM(); \
+ v8::HandleScope scope; \
byte *buffer = reinterpret_cast<byte*>(malloc(4*1024)); \
- Assembler assm(buffer, 4*1024); \
+ Assembler assm(Isolate::Current(), buffer, 4*1024); \
bool failure = false;
@@ -270,7 +270,7 @@
"13a06000 movne r6, #0");
// mov -> movw.
- if (Isolate::Current()->cpu_features()->IsSupported(ARMv7)) {
+ if (CpuFeatures::IsSupported(ARMv7)) {
COMPARE(mov(r5, Operand(0x01234), LeaveCC, ne),
"13015234 movwne r5, #4660");
// We only disassemble one instruction so the eor instruction is not here.
@@ -360,7 +360,7 @@
TEST(Type3) {
SETUP();
- if (Isolate::Current()->cpu_features()->IsSupported(ARMv7)) {
+ if (CpuFeatures::IsSupported(ARMv7)) {
COMPARE(ubfx(r0, r1, 5, 10),
"e7e902d1 ubfx r0, r1, #5, #10");
COMPARE(ubfx(r1, r0, 5, 10),
@@ -415,7 +415,7 @@
TEST(Vfp) {
SETUP();
- if (Isolate::Current()->cpu_features()->IsSupported(VFP3)) {
+ if (CpuFeatures::IsSupported(VFP3)) {
CpuFeatures::Scope scope(VFP3);
COMPARE(vmov(d0, d1),
"eeb00b41 vmov.f64 d0, d1");
@@ -522,6 +522,23 @@
"aef1aa10 vmrsge r10, FPSCR");
COMPARE(vmrs(pc),
"eef1fa10 vmrs APSR, FPSCR");
+
+ COMPARE(vstm(ia, r0, d1, d3),
+ "ec801b06 vstmia r0, {d1-d3}");
+ COMPARE(vldm(ia, r1, d2, d5),
+ "ec912b08 vldmia r1, {d2-d5}");
+ COMPARE(vstm(ia, r2, d0, d15),
+ "ec820b20 vstmia r2, {d0-d15}");
+ COMPARE(vldm(ia, r3, d0, d15),
+ "ec930b20 vldmia r3, {d0-d15}");
+ COMPARE(vstm(ia, r4, s1, s3),
+ "ecc40a03 vstmia r4, {s1-s3}");
+ COMPARE(vldm(ia, r5, s2, s5),
+ "ec951a04 vldmia r5, {s2-s5}");
+ COMPARE(vstm(ia, r6, s0, s31),
+ "ec860a20 vstmia r6, {s0-s31}");
+ COMPARE(vldm(ia, r7, s0, s31),
+ "ec970a20 vldmia r7, {s0-s31}");
}
VERIFY_RUN();