Merge V8 5.2.361.47 DO NOT MERGE
https://chromium.googlesource.com/v8/v8/+/5.2.361.47
FPIIM-449
Change-Id: Ibec421b85a9b88cb3a432ada642e469fe7e78346
(cherry picked from commit bcf72ee8e3b26f1d0726869c7ddb3921c68b09a8)
diff --git a/src/compiler/s390/code-generator-s390.cc b/src/compiler/s390/code-generator-s390.cc
index 1d96856..fece596 100644
--- a/src/compiler/s390/code-generator-s390.cc
+++ b/src/compiler/s390/code-generator-s390.cc
@@ -67,8 +67,8 @@
MemOperand MemoryOperand(AddressingMode* mode, size_t* first_index) {
const size_t index = *first_index;
- *mode = AddressingModeField::decode(instr_->opcode());
- switch (*mode) {
+ if (mode) *mode = AddressingModeField::decode(instr_->opcode());
+ switch (AddressingModeField::decode(instr_->opcode())) {
case kMode_None:
break;
case kMode_MRI:
@@ -82,13 +82,14 @@
return MemOperand(r0);
}
- MemOperand MemoryOperand(AddressingMode* mode, size_t first_index = 0) {
+ MemOperand MemoryOperand(AddressingMode* mode = NULL,
+ size_t first_index = 0) {
return MemoryOperand(mode, &first_index);
}
MemOperand ToMemOperand(InstructionOperand* op) const {
DCHECK_NOT_NULL(op);
- DCHECK(op->IsStackSlot() || op->IsDoubleStackSlot());
+ DCHECK(op->IsStackSlot() || op->IsFPStackSlot());
return SlotToMemOperand(AllocatedOperand::cast(op)->index());
}
@@ -155,7 +156,8 @@
value_(value),
scratch0_(scratch0),
scratch1_(scratch1),
- mode_(mode) {}
+ mode_(mode),
+ must_save_lr_(!gen->frame_access_state()->has_frame()) {}
OutOfLineRecordWrite(CodeGenerator* gen, Register object, int32_t offset,
Register value, Register scratch0, Register scratch1,
@@ -236,15 +238,10 @@
#if V8_TARGET_ARCH_S390X
case kS390_Add:
case kS390_Sub:
- return lt;
#endif
case kS390_AddWithOverflow32:
case kS390_SubWithOverflow32:
-#if V8_TARGET_ARCH_S390X
- return ne;
-#else
return lt;
-#endif
default:
break;
}
@@ -254,15 +251,10 @@
#if V8_TARGET_ARCH_S390X
case kS390_Add:
case kS390_Sub:
- return ge;
#endif
case kS390_AddWithOverflow32:
case kS390_SubWithOverflow32:
-#if V8_TARGET_ARCH_S390X
- return eq;
-#else
return ge;
-#endif
default:
break;
}
@@ -332,16 +324,16 @@
} while (0)
#if V8_TARGET_ARCH_S390X
-#define ASSEMBLE_ADD_WITH_OVERFLOW32() \
- do { \
- ASSEMBLE_BINOP(AddP, AddP); \
- __ TestIfInt32(i.OutputRegister(), r0); \
+#define ASSEMBLE_ADD_WITH_OVERFLOW32() \
+ do { \
+ ASSEMBLE_ADD_WITH_OVERFLOW(); \
+ __ LoadAndTestP_ExtendSrc(kScratchReg, kScratchReg); \
} while (0)
-#define ASSEMBLE_SUB_WITH_OVERFLOW32() \
- do { \
- ASSEMBLE_BINOP(SubP, SubP); \
- __ TestIfInt32(i.OutputRegister(), r0); \
+#define ASSEMBLE_SUB_WITH_OVERFLOW32() \
+ do { \
+ ASSEMBLE_SUB_WITH_OVERFLOW(); \
+ __ LoadAndTestP_ExtendSrc(kScratchReg, kScratchReg); \
} while (0)
#else
#define ASSEMBLE_ADD_WITH_OVERFLOW32 ASSEMBLE_ADD_WITH_OVERFLOW
@@ -461,7 +453,6 @@
__ asm_instr(value, operand); \
} while (0)
-// TODO(mbrandy): fix paths that produce garbage in offset's upper 32-bits.
#define ASSEMBLE_CHECKED_LOAD_FLOAT(asm_instr, width) \
do { \
DoubleRegister result = i.OutputDoubleRegister(); \
@@ -469,7 +460,6 @@
AddressingMode mode = kMode_None; \
MemOperand operand = i.MemoryOperand(&mode, index); \
Register offset = operand.rb(); \
- __ lgfr(offset, offset); \
if (HasRegisterInput(instr, 2)) { \
__ CmpLogical32(offset, i.InputRegister(2)); \
} else { \
@@ -477,11 +467,11 @@
} \
auto ool = new (zone()) OutOfLineLoadNAN##width(this, result); \
__ bge(ool->entry()); \
+ __ CleanUInt32(offset); \
__ asm_instr(result, operand); \
__ bind(ool->exit()); \
} while (0)
-// TODO(mbrandy): fix paths that produce garbage in offset's upper 32-bits.
#define ASSEMBLE_CHECKED_LOAD_INTEGER(asm_instr) \
do { \
Register result = i.OutputRegister(); \
@@ -489,7 +479,6 @@
AddressingMode mode = kMode_None; \
MemOperand operand = i.MemoryOperand(&mode, index); \
Register offset = operand.rb(); \
- __ lgfr(offset, offset); \
if (HasRegisterInput(instr, 2)) { \
__ CmpLogical32(offset, i.InputRegister(2)); \
} else { \
@@ -497,11 +486,11 @@
} \
auto ool = new (zone()) OutOfLineLoadZero(this, result); \
__ bge(ool->entry()); \
+ __ CleanUInt32(offset); \
__ asm_instr(result, operand); \
__ bind(ool->exit()); \
} while (0)
-// TODO(mbrandy): fix paths that produce garbage in offset's upper 32-bits.
#define ASSEMBLE_CHECKED_STORE_FLOAT32() \
do { \
Label done; \
@@ -509,7 +498,6 @@
AddressingMode mode = kMode_None; \
MemOperand operand = i.MemoryOperand(&mode, index); \
Register offset = operand.rb(); \
- __ lgfr(offset, offset); \
if (HasRegisterInput(instr, 2)) { \
__ CmpLogical32(offset, i.InputRegister(2)); \
} else { \
@@ -517,11 +505,11 @@
} \
__ bge(&done); \
DoubleRegister value = i.InputDoubleRegister(3); \
+ __ CleanUInt32(offset); \
__ StoreFloat32(value, operand); \
__ bind(&done); \
} while (0)
-// TODO(mbrandy): fix paths that produce garbage in offset's upper 32-bits.
#define ASSEMBLE_CHECKED_STORE_DOUBLE() \
do { \
Label done; \
@@ -530,7 +518,6 @@
MemOperand operand = i.MemoryOperand(&mode, index); \
DCHECK_EQ(kMode_MRR, mode); \
Register offset = operand.rb(); \
- __ lgfr(offset, offset); \
if (HasRegisterInput(instr, 2)) { \
__ CmpLogical32(offset, i.InputRegister(2)); \
} else { \
@@ -538,11 +525,11 @@
} \
__ bge(&done); \
DoubleRegister value = i.InputDoubleRegister(3); \
+ __ CleanUInt32(offset); \
__ StoreDouble(value, operand); \
__ bind(&done); \
} while (0)
-// TODO(mbrandy): fix paths that produce garbage in offset's upper 32-bits.
#define ASSEMBLE_CHECKED_STORE_INTEGER(asm_instr) \
do { \
Label done; \
@@ -550,7 +537,6 @@
AddressingMode mode = kMode_None; \
MemOperand operand = i.MemoryOperand(&mode, index); \
Register offset = operand.rb(); \
- __ lgfr(offset, offset); \
if (HasRegisterInput(instr, 2)) { \
__ CmpLogical32(offset, i.InputRegister(2)); \
} else { \
@@ -558,6 +544,7 @@
} \
__ bge(&done); \
Register value = i.InputRegister(3); \
+ __ CleanUInt32(offset); \
__ asm_instr(value, operand); \
__ bind(&done); \
} while (0)
@@ -566,8 +553,6 @@
__ LeaveFrame(StackFrame::MANUAL);
}
-void CodeGenerator::AssembleSetupStackPointer() {}
-
void CodeGenerator::AssembleDeconstructActivationRecord(int stack_param_delta) {
int sp_slot_delta = TailCallFrameStackSlotDelta(stack_param_delta);
if (sp_slot_delta > 0) {
@@ -614,7 +599,8 @@
}
// Assembles an instruction after register allocation, producing machine code.
-void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
+CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
+ Instruction* instr) {
S390OperandConverter i(this, instr);
ArchOpcode opcode = ArchOpcodeField::decode(instr->opcode());
@@ -656,6 +642,14 @@
frame_access_state()->ClearSPDelta();
break;
}
+ case kArchTailCallAddress: {
+ int stack_param_delta = i.InputInt32(instr->InputCount() - 1);
+ AssembleDeconstructActivationRecord(stack_param_delta);
+ CHECK(!instr->InputAt(0)->IsImmediate());
+ __ Jump(i.InputRegister(0));
+ frame_access_state()->ClearSPDelta();
+ break;
+ }
case kArchCallJSFunction: {
EnsureSpaceForLazyDeopt();
Register func = i.InputRegister(0);
@@ -735,7 +729,9 @@
BuildTranslation(instr, -1, 0, OutputFrameStateCombine::Ignore());
Deoptimizer::BailoutType bailout_type =
Deoptimizer::BailoutType(MiscField::decode(instr->opcode()));
- AssembleDeoptimizerCall(deopt_state_id, bailout_type);
+ CodeGenResult result =
+ AssembleDeoptimizerCall(deopt_state_id, bailout_type);
+ if (result != kSuccess) return result;
break;
}
case kArchRet:
@@ -1306,7 +1302,7 @@
break;
#endif
case kS390_Push:
- if (instr->InputAt(0)->IsDoubleRegister()) {
+ if (instr->InputAt(0)->IsFPRegister()) {
__ lay(sp, MemOperand(sp, -kDoubleSize));
__ StoreDouble(i.InputDoubleRegister(0), MemOperand(sp));
frame_access_state()->IncreaseSPDelta(kDoubleSize / kPointerSize);
@@ -1318,7 +1314,7 @@
case kS390_PushFrame: {
int num_slots = i.InputInt32(1);
__ lay(sp, MemOperand(sp, -num_slots * kPointerSize));
- if (instr->InputAt(0)->IsDoubleRegister()) {
+ if (instr->InputAt(0)->IsFPRegister()) {
__ StoreDouble(i.InputDoubleRegister(0),
MemOperand(sp));
} else {
@@ -1329,7 +1325,7 @@
}
case kS390_StoreToStackSlot: {
int slot = i.InputInt32(1);
- if (instr->InputAt(0)->IsDoubleRegister()) {
+ if (instr->InputAt(0)->IsFPRegister()) {
__ StoreDouble(i.InputDoubleRegister(0),
MemOperand(sp, slot * kPointerSize));
} else {
@@ -1555,6 +1551,9 @@
case kS390_LoadWordS16:
ASSEMBLE_LOAD_INTEGER(LoadHalfWordP);
break;
+ case kS390_LoadWordU32:
+ ASSEMBLE_LOAD_INTEGER(LoadlW);
+ break;
case kS390_LoadWordS32:
ASSEMBLE_LOAD_INTEGER(LoadW);
break;
@@ -1607,7 +1606,7 @@
ASSEMBLE_CHECKED_LOAD_INTEGER(LoadLogicalHalfWordP);
break;
case kCheckedLoadWord32:
- ASSEMBLE_CHECKED_LOAD_INTEGER(LoadW);
+ ASSEMBLE_CHECKED_LOAD_INTEGER(LoadlW);
break;
case kCheckedLoadWord64:
#if V8_TARGET_ARCH_S390X
@@ -1644,10 +1643,35 @@
case kCheckedStoreFloat64:
ASSEMBLE_CHECKED_STORE_DOUBLE();
break;
+ case kAtomicLoadInt8:
+ __ LoadB(i.OutputRegister(), i.MemoryOperand());
+ break;
+ case kAtomicLoadUint8:
+ __ LoadlB(i.OutputRegister(), i.MemoryOperand());
+ break;
+ case kAtomicLoadInt16:
+ __ LoadHalfWordP(i.OutputRegister(), i.MemoryOperand());
+ break;
+ case kAtomicLoadUint16:
+ __ LoadLogicalHalfWordP(i.OutputRegister(), i.MemoryOperand());
+ break;
+ case kAtomicLoadWord32:
+ __ LoadlW(i.OutputRegister(), i.MemoryOperand());
+ break;
+ case kAtomicStoreWord8:
+ __ StoreByte(i.InputRegister(0), i.MemoryOperand(NULL, 1));
+ break;
+ case kAtomicStoreWord16:
+ __ StoreHalfWord(i.InputRegister(0), i.MemoryOperand(NULL, 1));
+ break;
+ case kAtomicStoreWord32:
+ __ StoreW(i.InputRegister(0), i.MemoryOperand(NULL, 1));
+ break;
default:
UNREACHABLE();
break;
}
+ return kSuccess;
} // NOLINT(readability/fn_size)
// Assembles branches after an instruction.
@@ -1744,7 +1768,7 @@
S390OperandConverter i(this, instr);
Register input = i.InputRegister(0);
for (size_t index = 2; index < instr->InputCount(); index += 2) {
- __ CmpP(input, Operand(i.InputInt32(index + 0)));
+ __ Cmp32(input, Operand(i.InputInt32(index + 0)));
__ beq(GetLabel(i.InputRpo(index + 1)));
}
AssembleArchJump(i.InputRpo(1));
@@ -1767,17 +1791,41 @@
__ Jump(kScratchReg);
}
-void CodeGenerator::AssembleDeoptimizerCall(
+CodeGenerator::CodeGenResult CodeGenerator::AssembleDeoptimizerCall(
int deoptimization_id, Deoptimizer::BailoutType bailout_type) {
Address deopt_entry = Deoptimizer::GetDeoptimizationEntry(
isolate(), deoptimization_id, bailout_type);
// TODO(turbofan): We should be able to generate better code by sharing the
// actual final call site and just bl'ing to it here, similar to what we do
// in the lithium backend.
+ if (deopt_entry == nullptr) return kTooManyDeoptimizationBailouts;
__ Call(deopt_entry, RelocInfo::RUNTIME_ENTRY);
+ return kSuccess;
}
-void CodeGenerator::AssemblePrologue() {
+void CodeGenerator::FinishFrame(Frame* frame) {
+ CallDescriptor* descriptor = linkage()->GetIncomingDescriptor();
+ const RegList double_saves = descriptor->CalleeSavedFPRegisters();
+
+ // Save callee-saved Double registers.
+ if (double_saves != 0) {
+ frame->AlignSavedCalleeRegisterSlots();
+ DCHECK(kNumCalleeSavedDoubles ==
+ base::bits::CountPopulation32(double_saves));
+ frame->AllocateSavedCalleeRegisterSlots(kNumCalleeSavedDoubles *
+ (kDoubleSize / kPointerSize));
+ }
+ // Save callee-saved registers.
+ const RegList saves = descriptor->CalleeSavedRegisters();
+ if (saves != 0) {
+ // register save area does not include the fp or constant pool pointer.
+ const int num_saves = kNumCalleeSaved - 1;
+ DCHECK(num_saves == base::bits::CountPopulation32(saves));
+ frame->AllocateSavedCalleeRegisterSlots(num_saves);
+ }
+}
+
+void CodeGenerator::AssembleConstructFrame() {
CallDescriptor* descriptor = linkage()->GetIncomingDescriptor();
if (frame_access_state()->has_frame()) {
@@ -1794,7 +1842,7 @@
}
}
- int stack_shrink_slots = frame()->GetSpillSlotCount();
+ int shrink_slots = frame()->GetSpillSlotCount();
if (info()->is_osr()) {
// TurboFan OSR-compiled functions cannot be entered directly.
__ Abort(kShouldNotDirectlyEnterOsrFunction);
@@ -1805,15 +1853,12 @@
// remaining stack slots.
if (FLAG_code_comments) __ RecordComment("-- OSR entrypoint --");
osr_pc_offset_ = __ pc_offset();
- stack_shrink_slots -= OsrHelper(info()).UnoptimizedFrameSlots();
+ shrink_slots -= OsrHelper(info()).UnoptimizedFrameSlots();
}
const RegList double_saves = descriptor->CalleeSavedFPRegisters();
- if (double_saves != 0) {
- stack_shrink_slots += frame()->AlignSavedCalleeRegisterSlots();
- }
- if (stack_shrink_slots > 0) {
- __ lay(sp, MemOperand(sp, -stack_shrink_slots * kPointerSize));
+ if (shrink_slots > 0) {
+ __ lay(sp, MemOperand(sp, -shrink_slots * kPointerSize));
}
// Save callee-saved Double registers.
@@ -1821,8 +1866,6 @@
__ MultiPushDoubles(double_saves);
DCHECK(kNumCalleeSavedDoubles ==
base::bits::CountPopulation32(double_saves));
- frame()->AllocateSavedCalleeRegisterSlots(kNumCalleeSavedDoubles *
- (kDoubleSize / kPointerSize));
}
// Save callee-saved registers.
@@ -1830,10 +1873,6 @@
if (saves != 0) {
__ MultiPush(saves);
// register save area does not include the fp or constant pool pointer.
- const int num_saves =
- kNumCalleeSaved - 1 - (FLAG_enable_embedded_constant_pool ? 1 : 0);
- DCHECK(num_saves == base::bits::CountPopulation32(saves));
- frame()->AllocateSavedCalleeRegisterSlots(num_saves);
}
}
@@ -1898,10 +1937,28 @@
destination->IsRegister() ? g.ToRegister(destination) : kScratchReg;
switch (src.type()) {
case Constant::kInt32:
- __ mov(dst, Operand(src.ToInt32()));
+#if V8_TARGET_ARCH_S390X
+ if (src.rmode() == RelocInfo::WASM_MEMORY_SIZE_REFERENCE) {
+#else
+ if (src.rmode() == RelocInfo::WASM_MEMORY_REFERENCE ||
+ src.rmode() == RelocInfo::WASM_MEMORY_SIZE_REFERENCE) {
+#endif
+ __ mov(dst, Operand(src.ToInt32(), src.rmode()));
+ } else {
+ __ mov(dst, Operand(src.ToInt32()));
+ }
break;
case Constant::kInt64:
+#if V8_TARGET_ARCH_S390X
+ if (src.rmode() == RelocInfo::WASM_MEMORY_REFERENCE) {
+ __ mov(dst, Operand(src.ToInt64(), src.rmode()));
+ } else {
+ DCHECK(src.rmode() != RelocInfo::WASM_MEMORY_SIZE_REFERENCE);
+ __ mov(dst, Operand(src.ToInt64()));
+ }
+#else
__ mov(dst, Operand(src.ToInt64()));
+#endif // V8_TARGET_ARCH_S390X
break;
case Constant::kFloat32:
__ Move(dst,
@@ -1935,7 +1992,7 @@
__ StoreP(dst, g.ToMemOperand(destination), r0);
}
} else {
- DoubleRegister dst = destination->IsDoubleRegister()
+ DoubleRegister dst = destination->IsFPRegister()
? g.ToDoubleRegister(destination)
: kScratchDoubleReg;
double value = (src.type() == Constant::kFloat32) ? src.ToFloat32()
@@ -1946,23 +2003,23 @@
__ LoadDoubleLiteral(dst, value, kScratchReg);
}
- if (destination->IsDoubleStackSlot()) {
+ if (destination->IsFPStackSlot()) {
__ StoreDouble(dst, g.ToMemOperand(destination));
}
}
- } else if (source->IsDoubleRegister()) {
+ } else if (source->IsFPRegister()) {
DoubleRegister src = g.ToDoubleRegister(source);
- if (destination->IsDoubleRegister()) {
+ if (destination->IsFPRegister()) {
DoubleRegister dst = g.ToDoubleRegister(destination);
__ Move(dst, src);
} else {
- DCHECK(destination->IsDoubleStackSlot());
+ DCHECK(destination->IsFPStackSlot());
__ StoreDouble(src, g.ToMemOperand(destination));
}
- } else if (source->IsDoubleStackSlot()) {
- DCHECK(destination->IsDoubleRegister() || destination->IsDoubleStackSlot());
+ } else if (source->IsFPStackSlot()) {
+ DCHECK(destination->IsFPRegister() || destination->IsFPStackSlot());
MemOperand src = g.ToMemOperand(source);
- if (destination->IsDoubleRegister()) {
+ if (destination->IsFPRegister()) {
__ LoadDouble(g.ToDoubleRegister(destination), src);
} else {
DoubleRegister temp = kScratchDoubleReg;
@@ -1996,7 +2053,7 @@
__ StoreP(temp, dst);
}
#if V8_TARGET_ARCH_S390X
- } else if (source->IsStackSlot() || source->IsDoubleStackSlot()) {
+ } else if (source->IsStackSlot() || source->IsFPStackSlot()) {
#else
} else if (source->IsStackSlot()) {
DCHECK(destination->IsStackSlot());
@@ -2009,24 +2066,24 @@
__ LoadP(temp_1, dst);
__ StoreP(temp_0, dst);
__ StoreP(temp_1, src);
- } else if (source->IsDoubleRegister()) {
+ } else if (source->IsFPRegister()) {
DoubleRegister temp = kScratchDoubleReg;
DoubleRegister src = g.ToDoubleRegister(source);
- if (destination->IsDoubleRegister()) {
+ if (destination->IsFPRegister()) {
DoubleRegister dst = g.ToDoubleRegister(destination);
__ ldr(temp, src);
__ ldr(src, dst);
__ ldr(dst, temp);
} else {
- DCHECK(destination->IsDoubleStackSlot());
+ DCHECK(destination->IsFPStackSlot());
MemOperand dst = g.ToMemOperand(destination);
__ ldr(temp, src);
__ LoadDouble(src, dst);
__ StoreDouble(temp, dst);
}
#if !V8_TARGET_ARCH_S390X
- } else if (source->IsDoubleStackSlot()) {
- DCHECK(destination->IsDoubleStackSlot());
+ } else if (source->IsFPStackSlot()) {
+ DCHECK(destination->IsFPStackSlot());
DoubleRegister temp_0 = kScratchDoubleReg;
DoubleRegister temp_1 = d0;
MemOperand src = g.ToMemOperand(source);
@@ -2049,10 +2106,6 @@
}
}
-void CodeGenerator::AddNopForSmiCodeInlining() {
- // We do not insert nops for inlined Smi code.
-}
-
void CodeGenerator::EnsureSpaceForLazyDeopt() {
if (!info()->ShouldEnsureSpaceForLazyDeopt()) {
return;