Update V8 to version 4.1.0.21
This is a cherry-pick of all commits up to and including the
4.1.0.21 cherry-pick in Chromium.
Original commit message:
Version 4.1.0.21 (cherry-pick)
Merged 206e9136bde0f2b5ae8cb77afbb1e7833e5bd412
Unlink pages from the space page list after evacuation.
BUG=430201
LOG=N
R=jkummerow@chromium.org
Review URL: https://codereview.chromium.org/953813002
Cr-Commit-Position: refs/branch-heads/4.1@{#22}
Cr-Branched-From: 2e08d2a7aa9d65d269d8c57aba82eb38a8cb0a18-refs/heads/candidates@{#25353}
---
FPIIM-449
Change-Id: I8c23c7bbb70772b4858fe8a47b64fa97ee0d1f8c
diff --git a/src/arm/constants-arm.h b/src/arm/constants-arm.h
index 375ef89..0037ce1 100644
--- a/src/arm/constants-arm.h
+++ b/src/arm/constants-arm.h
@@ -161,26 +161,26 @@
// Instruction encoding bits and masks.
enum {
- H = 1 << 5, // Halfword (or byte).
- S6 = 1 << 6, // Signed (or unsigned).
- L = 1 << 20, // Load (or store).
- S = 1 << 20, // Set condition code (or leave unchanged).
- W = 1 << 21, // Writeback base register (or leave unchanged).
- A = 1 << 21, // Accumulate in multiply instruction (or not).
- B = 1 << 22, // Unsigned byte (or word).
- N = 1 << 22, // Long (or short).
- U = 1 << 23, // Positive (or negative) offset/index.
- P = 1 << 24, // Offset/pre-indexed addressing (or post-indexed addressing).
- I = 1 << 25, // Immediate shifter operand (or not).
-
- B4 = 1 << 4,
- B5 = 1 << 5,
- B6 = 1 << 6,
- B7 = 1 << 7,
- B8 = 1 << 8,
- B9 = 1 << 9,
+ H = 1 << 5, // Halfword (or byte).
+ S6 = 1 << 6, // Signed (or unsigned).
+ L = 1 << 20, // Load (or store).
+ S = 1 << 20, // Set condition code (or leave unchanged).
+ W = 1 << 21, // Writeback base register (or leave unchanged).
+ A = 1 << 21, // Accumulate in multiply instruction (or not).
+ B = 1 << 22, // Unsigned byte (or word).
+ N = 1 << 22, // Long (or short).
+ U = 1 << 23, // Positive (or negative) offset/index.
+ P = 1 << 24, // Offset/pre-indexed addressing (or post-indexed addressing).
+ I = 1 << 25, // Immediate shifter operand (or not).
+ B4 = 1 << 4,
+ B5 = 1 << 5,
+ B6 = 1 << 6,
+ B7 = 1 << 7,
+ B8 = 1 << 8,
+ B9 = 1 << 9,
B12 = 1 << 12,
B16 = 1 << 16,
+ B17 = 1 << 17,
B18 = 1 << 18,
B19 = 1 << 19,
B20 = 1 << 20,
@@ -194,16 +194,16 @@
B28 = 1 << 28,
// Instruction bit masks.
- kCondMask = 15 << 28,
- kALUMask = 0x6f << 21,
- kRdMask = 15 << 12, // In str instruction.
+ kCondMask = 15 << 28,
+ kALUMask = 0x6f << 21,
+ kRdMask = 15 << 12, // In str instruction.
kCoprocessorMask = 15 << 8,
kOpCodeMask = 15 << 21, // In data-processing instructions.
- kImm24Mask = (1 << 24) - 1,
- kImm16Mask = (1 << 16) - 1,
- kImm8Mask = (1 << 8) - 1,
- kOff12Mask = (1 << 12) - 1,
- kOff8Mask = (1 << 8) - 1
+ kImm24Mask = (1 << 24) - 1,
+ kImm16Mask = (1 << 16) - 1,
+ kImm8Mask = (1 << 8) - 1,
+ kOff12Mask = (1 << 12) - 1,
+ kOff8Mask = (1 << 8) - 1
};
@@ -332,9 +332,9 @@
// standard SoftwareInterrupCode. Bit 23 is reserved for the stop feature.
enum SoftwareInterruptCodes {
// transition to C code
- kCallRtRedirected= 0x10,
+ kCallRtRedirected = 0x10,
// break point
- kBreakpoint= 0x20,
+ kBreakpoint = 0x20,
// stop
kStopCode = 1 << 23
};