Update V8 to version 4.1.0.21
This is a cherry-pick of all commits up to and including the
4.1.0.21 cherry-pick in Chromium.
Original commit message:
Version 4.1.0.21 (cherry-pick)
Merged 206e9136bde0f2b5ae8cb77afbb1e7833e5bd412
Unlink pages from the space page list after evacuation.
BUG=430201
LOG=N
R=jkummerow@chromium.org
Review URL: https://codereview.chromium.org/953813002
Cr-Commit-Position: refs/branch-heads/4.1@{#22}
Cr-Branched-From: 2e08d2a7aa9d65d269d8c57aba82eb38a8cb0a18-refs/heads/candidates@{#25353}
---
FPIIM-449
Change-Id: I8c23c7bbb70772b4858fe8a47b64fa97ee0d1f8c
diff --git a/src/x64/assembler-x64-inl.h b/src/x64/assembler-x64-inl.h
index b64bbfb..caf7af6 100644
--- a/src/x64/assembler-x64-inl.h
+++ b/src/x64/assembler-x64-inl.h
@@ -179,11 +179,75 @@
}
+void Assembler::emit_optional_rex_32(XMMRegister rm_reg) {
+ if (rm_reg.high_bit()) emit(0x41);
+}
+
+
void Assembler::emit_optional_rex_32(const Operand& op) {
if (op.rex_ != 0) emit(0x40 | op.rex_);
}
+// byte 1 of 3-byte VEX
+void Assembler::emit_vex3_byte1(XMMRegister reg, XMMRegister rm,
+ LeadingOpcode m) {
+ byte rxb = ~((reg.high_bit() << 2) | rm.high_bit()) << 5;
+ emit(rxb | m);
+}
+
+
+// byte 1 of 3-byte VEX
+void Assembler::emit_vex3_byte1(XMMRegister reg, const Operand& rm,
+ LeadingOpcode m) {
+ byte rxb = ~((reg.high_bit() << 2) | rm.rex_) << 5;
+ emit(rxb | m);
+}
+
+
+// byte 1 of 2-byte VEX
+void Assembler::emit_vex2_byte1(XMMRegister reg, XMMRegister v, VectorLength l,
+ SIMDPrefix pp) {
+ byte rv = ~((reg.high_bit() << 4) | v.code()) << 3;
+ emit(rv | l | pp);
+}
+
+
+// byte 2 of 3-byte VEX
+void Assembler::emit_vex3_byte2(VexW w, XMMRegister v, VectorLength l,
+ SIMDPrefix pp) {
+ emit(w | ((~v.code() & 0xf) << 3) | l | pp);
+}
+
+
+void Assembler::emit_vex_prefix(XMMRegister reg, XMMRegister vreg,
+ XMMRegister rm, VectorLength l, SIMDPrefix pp,
+ LeadingOpcode mm, VexW w) {
+ if (rm.high_bit() || mm != k0F || w != kW0) {
+ emit_vex3_byte0();
+ emit_vex3_byte1(reg, rm, mm);
+ emit_vex3_byte2(w, vreg, l, pp);
+ } else {
+ emit_vex2_byte0();
+ emit_vex2_byte1(reg, vreg, l, pp);
+ }
+}
+
+
+void Assembler::emit_vex_prefix(XMMRegister reg, XMMRegister vreg,
+ const Operand& rm, VectorLength l,
+ SIMDPrefix pp, LeadingOpcode mm, VexW w) {
+ if (rm.rex_ || mm != k0F || w != kW0) {
+ emit_vex3_byte0();
+ emit_vex3_byte1(reg, rm, mm);
+ emit_vex3_byte2(w, vreg, l, pp);
+ } else {
+ emit_vex2_byte0();
+ emit_vex2_byte1(reg, vreg, l, pp);
+ }
+}
+
+
Address Assembler::target_address_at(Address pc,
ConstantPoolArray* constant_pool) {
return Memory::int32_at(pc) + pc + 4;