Upgrade V8 to 5.1.281.57 DO NOT MERGE
FPIIM-449
Change-Id: Id981b686b4d587ac31697662eb98bb34be42ad90
(cherry picked from commit 3b9bc31999c9787eb726ecdbfd5796bfdec32a18)
diff --git a/src/mips64/assembler-mips64.h b/src/mips64/assembler-mips64.h
index bf2285a..de09366 100644
--- a/src/mips64/assembler-mips64.h
+++ b/src/mips64/assembler-mips64.h
@@ -535,7 +535,11 @@
// Distance between the instruction referring to the address of the call
// target and the return address.
+#ifdef _MIPS_ARCH_MIPS64R6
+ static const int kCallTargetAddressOffset = 5 * kInstrSize;
+#else
static const int kCallTargetAddressOffset = 6 * kInstrSize;
+#endif
// Distance between start of patched debug break slot and the emitted address
// to jump to.
@@ -545,7 +549,11 @@
// register.
static const int kPcLoadDelta = 4;
+#ifdef _MIPS_ARCH_MIPS64R6
+ static const int kDebugBreakSlotInstructions = 5;
+#else
static const int kDebugBreakSlotInstructions = 6;
+#endif
static const int kDebugBreakSlotLength =
kDebugBreakSlotInstructions * kInstrSize;
@@ -783,6 +791,7 @@
void dsrl(Register rd, Register rt, uint16_t sa);
void dsrlv(Register rd, Register rt, Register rs);
void drotr(Register rd, Register rt, uint16_t sa);
+ void drotr32(Register rd, Register rt, uint16_t sa);
void drotrv(Register rd, Register rt, Register rs);
void dsra(Register rt, Register rd, uint16_t sa);
void dsrav(Register rd, Register rt, Register rs);
@@ -790,10 +799,6 @@
void dsrl32(Register rt, Register rd, uint16_t sa);
void dsra32(Register rt, Register rd, uint16_t sa);
- // Address computing instructions with shift.
- void lsa(Register rd, Register rt, Register rs, uint8_t sa);
- void dlsa(Register rd, Register rt, Register rs, uint8_t sa);
-
// ------------Memory-instructions-------------
void lb(Register rd, const MemOperand& rs);
@@ -1107,7 +1112,9 @@
void dp(uintptr_t data) { dq(data); }
void dd(Label* label);
- PositionsRecorder* positions_recorder() { return &positions_recorder_; }
+ AssemblerPositionsRecorder* positions_recorder() {
+ return &positions_recorder_;
+ }
// Postpone the generation of the trampoline pool for the specified number of
// instructions.
@@ -1206,6 +1213,10 @@
bool IsPrevInstrCompactBranch() { return prev_instr_compact_branch_; }
protected:
+ // Load Scaled Address instructions.
+ void lsa(Register rd, Register rt, Register rs, uint8_t sa);
+ void dlsa(Register rd, Register rt, Register rs, uint8_t sa);
+
// Relocation for a type-recording IC has the AST id added to it. This
// member variable is a way to pass the information from the call site to
// the relocation info.
@@ -1490,8 +1501,8 @@
friend class CodePatcher;
friend class BlockTrampolinePoolScope;
- PositionsRecorder positions_recorder_;
- friend class PositionsRecorder;
+ AssemblerPositionsRecorder positions_recorder_;
+ friend class AssemblerPositionsRecorder;
friend class EnsureSpace;
};