Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1 | // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 | // All Rights Reserved. |
| 3 | // |
| 4 | // Redistribution and use in source and binary forms, with or without |
| 5 | // modification, are permitted provided that the following conditions are |
| 6 | // met: |
| 7 | // |
| 8 | // - Redistributions of source code must retain the above copyright notice, |
| 9 | // this list of conditions and the following disclaimer. |
| 10 | // |
| 11 | // - Redistribution in binary form must reproduce the above copyright |
| 12 | // notice, this list of conditions and the following disclaimer in the |
| 13 | // documentation and/or other materials provided with the distribution. |
| 14 | // |
| 15 | // - Neither the name of Sun Microsystems or the names of contributors may |
| 16 | // be used to endorse or promote products derived from this software without |
| 17 | // specific prior written permission. |
| 18 | // |
| 19 | // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS |
| 20 | // IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, |
| 21 | // THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
| 22 | // PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR |
| 23 | // CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, |
| 24 | // EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, |
| 25 | // PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR |
| 26 | // PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF |
| 27 | // LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING |
| 28 | // NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 29 | // SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 30 | |
| 31 | // The original source code covered by the above license above has been |
| 32 | // modified significantly by Google Inc. |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 33 | // Copyright 2011 the V8 project authors. All rights reserved. |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 34 | |
| 35 | |
| 36 | #ifndef V8_MIPS_ASSEMBLER_MIPS_H_ |
| 37 | #define V8_MIPS_ASSEMBLER_MIPS_H_ |
| 38 | |
| 39 | #include <stdio.h> |
| 40 | #include "assembler.h" |
| 41 | #include "constants-mips.h" |
| 42 | #include "serialize.h" |
| 43 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 44 | namespace v8 { |
| 45 | namespace internal { |
| 46 | |
| 47 | // CPU Registers. |
| 48 | // |
| 49 | // 1) We would prefer to use an enum, but enum values are assignment- |
| 50 | // compatible with int, which has caused code-generation bugs. |
| 51 | // |
| 52 | // 2) We would prefer to use a class instead of a struct but we don't like |
| 53 | // the register initialization to depend on the particular initialization |
| 54 | // order (which appears to be different on OS X, Linux, and Windows for the |
| 55 | // installed versions of C++ we tried). Using a struct permits C-style |
| 56 | // "initialization". Also, the Register objects cannot be const as this |
| 57 | // forces initialization stubs in MSVC, making us dependent on initialization |
| 58 | // order. |
| 59 | // |
| 60 | // 3) By not using an enum, we are possibly preventing the compiler from |
| 61 | // doing certain constant folds, which may significantly reduce the |
| 62 | // code generated for some assembly instructions (because they boil down |
| 63 | // to a few constants). If this is a problem, we could change the code |
| 64 | // such that we use an enum in optimized mode, and the struct in debug |
| 65 | // mode. This way we get the compile-time error checking in debug mode |
| 66 | // and best performance in optimized code. |
| 67 | |
| 68 | |
| 69 | // ----------------------------------------------------------------------------- |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 70 | // Implementation of Register and FPURegister. |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 71 | |
| 72 | // Core register. |
| 73 | struct Register { |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 74 | static const int kNumRegisters = v8::internal::kNumRegisters; |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 75 | static const int kNumAllocatableRegisters = 14; // v0 through t7. |
| 76 | static const int kSizeInBytes = 4; |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 77 | |
| 78 | static int ToAllocationIndex(Register reg) { |
| 79 | return reg.code() - 2; // zero_reg and 'at' are skipped. |
| 80 | } |
| 81 | |
| 82 | static Register FromAllocationIndex(int index) { |
| 83 | ASSERT(index >= 0 && index < kNumAllocatableRegisters); |
| 84 | return from_code(index + 2); // zero_reg and 'at' are skipped. |
| 85 | } |
| 86 | |
| 87 | static const char* AllocationIndexToString(int index) { |
| 88 | ASSERT(index >= 0 && index < kNumAllocatableRegisters); |
| 89 | const char* const names[] = { |
| 90 | "v0", |
| 91 | "v1", |
| 92 | "a0", |
| 93 | "a1", |
| 94 | "a2", |
| 95 | "a3", |
| 96 | "t0", |
| 97 | "t1", |
| 98 | "t2", |
| 99 | "t3", |
| 100 | "t4", |
| 101 | "t5", |
| 102 | "t6", |
| 103 | "t7", |
| 104 | }; |
| 105 | return names[index]; |
| 106 | } |
| 107 | |
| 108 | static Register from_code(int code) { |
| 109 | Register r = { code }; |
| 110 | return r; |
| 111 | } |
| 112 | |
Kristian Monsen | 0d5e116 | 2010-09-30 15:31:59 +0100 | [diff] [blame] | 113 | bool is_valid() const { return 0 <= code_ && code_ < kNumRegisters; } |
| 114 | bool is(Register reg) const { return code_ == reg.code_; } |
| 115 | int code() const { |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 116 | ASSERT(is_valid()); |
| 117 | return code_; |
| 118 | } |
Kristian Monsen | 0d5e116 | 2010-09-30 15:31:59 +0100 | [diff] [blame] | 119 | int bit() const { |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 120 | ASSERT(is_valid()); |
| 121 | return 1 << code_; |
| 122 | } |
| 123 | |
| 124 | // Unfortunately we can't make this private in a struct. |
| 125 | int code_; |
| 126 | }; |
| 127 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 128 | const Register no_reg = { -1 }; |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 129 | |
Ben Murdoch | 69a99ed | 2011-11-30 16:03:39 +0000 | [diff] [blame] | 130 | const Register zero_reg = { 0 }; // Always zero. |
| 131 | const Register at = { 1 }; // at: Reserved for synthetic instructions. |
| 132 | const Register v0 = { 2 }; // v0, v1: Used when returning multiple values |
| 133 | const Register v1 = { 3 }; // from subroutines. |
| 134 | const Register a0 = { 4 }; // a0 - a4: Used to pass non-FP parameters. |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 135 | const Register a1 = { 5 }; |
| 136 | const Register a2 = { 6 }; |
| 137 | const Register a3 = { 7 }; |
Ben Murdoch | 69a99ed | 2011-11-30 16:03:39 +0000 | [diff] [blame] | 138 | const Register t0 = { 8 }; // t0 - t9: Can be used without reservation, act |
| 139 | const Register t1 = { 9 }; // as temporary registers and are allowed to |
| 140 | const Register t2 = { 10 }; // be destroyed by subroutines. |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 141 | const Register t3 = { 11 }; |
| 142 | const Register t4 = { 12 }; |
| 143 | const Register t5 = { 13 }; |
| 144 | const Register t6 = { 14 }; |
| 145 | const Register t7 = { 15 }; |
Ben Murdoch | 69a99ed | 2011-11-30 16:03:39 +0000 | [diff] [blame] | 146 | const Register s0 = { 16 }; // s0 - s7: Subroutine register variables. |
| 147 | const Register s1 = { 17 }; // Subroutines that write to these registers |
| 148 | const Register s2 = { 18 }; // must restore their values before exiting so |
| 149 | const Register s3 = { 19 }; // that the caller can expect the values to be |
| 150 | const Register s4 = { 20 }; // preserved. |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 151 | const Register s5 = { 21 }; |
| 152 | const Register s6 = { 22 }; |
| 153 | const Register s7 = { 23 }; |
| 154 | const Register t8 = { 24 }; |
| 155 | const Register t9 = { 25 }; |
Ben Murdoch | 69a99ed | 2011-11-30 16:03:39 +0000 | [diff] [blame] | 156 | const Register k0 = { 26 }; // k0, k1: Reserved for system calls and |
| 157 | const Register k1 = { 27 }; // interrupt handlers. |
| 158 | const Register gp = { 28 }; // gp: Reserved. |
| 159 | const Register sp = { 29 }; // sp: Stack pointer. |
| 160 | const Register s8_fp = { 30 }; // fp: Frame pointer. |
| 161 | const Register ra = { 31 }; // ra: Return address pointer. |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 162 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 163 | |
| 164 | int ToNumber(Register reg); |
| 165 | |
| 166 | Register ToRegister(int num); |
| 167 | |
| 168 | // Coprocessor register. |
| 169 | struct FPURegister { |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 170 | static const int kNumRegisters = v8::internal::kNumFPURegisters; |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame^] | 171 | |
| 172 | // TODO(plind): Warning, inconsistent numbering here. kNumFPURegisters refers |
| 173 | // to number of 32-bit FPU regs, but kNumAllocatableRegisters refers to |
| 174 | // number of Double regs (64-bit regs, or FPU-reg-pairs). |
| 175 | |
| 176 | // A few double registers are reserved: one as a scratch register and one to |
| 177 | // hold 0.0. |
| 178 | // f28: 0.0 |
| 179 | // f30: scratch register. |
| 180 | static const int kNumReservedRegisters = 2; |
| 181 | static const int kNumAllocatableRegisters = kNumRegisters / 2 - |
| 182 | kNumReservedRegisters; |
| 183 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 184 | |
| 185 | static int ToAllocationIndex(FPURegister reg) { |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 186 | ASSERT(reg.code() % 2 == 0); |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame^] | 187 | ASSERT(reg.code() / 2 < kNumAllocatableRegisters); |
| 188 | ASSERT(reg.is_valid()); |
| 189 | return (reg.code() / 2); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 190 | } |
| 191 | |
| 192 | static FPURegister FromAllocationIndex(int index) { |
| 193 | ASSERT(index >= 0 && index < kNumAllocatableRegisters); |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame^] | 194 | return from_code(index * 2); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 195 | } |
| 196 | |
| 197 | static const char* AllocationIndexToString(int index) { |
| 198 | ASSERT(index >= 0 && index < kNumAllocatableRegisters); |
| 199 | const char* const names[] = { |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame^] | 200 | "f0", |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 201 | "f2", |
| 202 | "f4", |
| 203 | "f6", |
| 204 | "f8", |
| 205 | "f10", |
| 206 | "f12", |
| 207 | "f14", |
| 208 | "f16", |
| 209 | "f18", |
| 210 | "f20", |
| 211 | "f22", |
| 212 | "f24", |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame^] | 213 | "f26" |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 214 | }; |
| 215 | return names[index]; |
| 216 | } |
| 217 | |
| 218 | static FPURegister from_code(int code) { |
| 219 | FPURegister r = { code }; |
| 220 | return r; |
| 221 | } |
| 222 | |
| 223 | bool is_valid() const { return 0 <= code_ && code_ < kNumFPURegisters ; } |
Kristian Monsen | 0d5e116 | 2010-09-30 15:31:59 +0100 | [diff] [blame] | 224 | bool is(FPURegister creg) const { return code_ == creg.code_; } |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame^] | 225 | FPURegister low() const { |
| 226 | // Find low reg of a Double-reg pair, which is the reg itself. |
| 227 | ASSERT(code_ % 2 == 0); // Specified Double reg must be even. |
| 228 | FPURegister reg; |
| 229 | reg.code_ = code_; |
| 230 | ASSERT(reg.is_valid()); |
| 231 | return reg; |
| 232 | } |
| 233 | FPURegister high() const { |
| 234 | // Find high reg of a Doubel-reg pair, which is reg + 1. |
| 235 | ASSERT(code_ % 2 == 0); // Specified Double reg must be even. |
| 236 | FPURegister reg; |
| 237 | reg.code_ = code_ + 1; |
| 238 | ASSERT(reg.is_valid()); |
| 239 | return reg; |
| 240 | } |
| 241 | |
Kristian Monsen | 0d5e116 | 2010-09-30 15:31:59 +0100 | [diff] [blame] | 242 | int code() const { |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 243 | ASSERT(is_valid()); |
| 244 | return code_; |
| 245 | } |
Kristian Monsen | 0d5e116 | 2010-09-30 15:31:59 +0100 | [diff] [blame] | 246 | int bit() const { |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 247 | ASSERT(is_valid()); |
| 248 | return 1 << code_; |
| 249 | } |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 250 | void setcode(int f) { |
| 251 | code_ = f; |
| 252 | ASSERT(is_valid()); |
| 253 | } |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 254 | // Unfortunately we can't make this private in a struct. |
| 255 | int code_; |
| 256 | }; |
| 257 | |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame^] | 258 | // V8 now supports the O32 ABI, and the FPU Registers are organized as 32 |
| 259 | // 32-bit registers, f0 through f31. When used as 'double' they are used |
| 260 | // in pairs, starting with the even numbered register. So a double operation |
| 261 | // on f0 really uses f0 and f1. |
| 262 | // (Modern mips hardware also supports 32 64-bit registers, via setting |
| 263 | // (priviledged) Status Register FR bit to 1. This is used by the N32 ABI, |
| 264 | // but it is not in common use. Someday we will want to support this in v8.) |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 265 | |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame^] | 266 | // For O32 ABI, Floats and Doubles refer to same set of 32 32-bit registers. |
| 267 | typedef FPURegister DoubleRegister; |
| 268 | typedef FPURegister FloatRegister; |
| 269 | |
| 270 | const FPURegister no_freg = { -1 }; |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 271 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 272 | const FPURegister f0 = { 0 }; // Return value in hard float mode. |
| 273 | const FPURegister f1 = { 1 }; |
| 274 | const FPURegister f2 = { 2 }; |
| 275 | const FPURegister f3 = { 3 }; |
| 276 | const FPURegister f4 = { 4 }; |
| 277 | const FPURegister f5 = { 5 }; |
| 278 | const FPURegister f6 = { 6 }; |
| 279 | const FPURegister f7 = { 7 }; |
| 280 | const FPURegister f8 = { 8 }; |
| 281 | const FPURegister f9 = { 9 }; |
| 282 | const FPURegister f10 = { 10 }; |
| 283 | const FPURegister f11 = { 11 }; |
| 284 | const FPURegister f12 = { 12 }; // Arg 0 in hard float mode. |
| 285 | const FPURegister f13 = { 13 }; |
| 286 | const FPURegister f14 = { 14 }; // Arg 1 in hard float mode. |
| 287 | const FPURegister f15 = { 15 }; |
| 288 | const FPURegister f16 = { 16 }; |
| 289 | const FPURegister f17 = { 17 }; |
| 290 | const FPURegister f18 = { 18 }; |
| 291 | const FPURegister f19 = { 19 }; |
| 292 | const FPURegister f20 = { 20 }; |
| 293 | const FPURegister f21 = { 21 }; |
| 294 | const FPURegister f22 = { 22 }; |
| 295 | const FPURegister f23 = { 23 }; |
| 296 | const FPURegister f24 = { 24 }; |
| 297 | const FPURegister f25 = { 25 }; |
| 298 | const FPURegister f26 = { 26 }; |
| 299 | const FPURegister f27 = { 27 }; |
| 300 | const FPURegister f28 = { 28 }; |
| 301 | const FPURegister f29 = { 29 }; |
| 302 | const FPURegister f30 = { 30 }; |
| 303 | const FPURegister f31 = { 31 }; |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 304 | |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame^] | 305 | const FPURegister kDoubleRegZero = f28; |
| 306 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 307 | // FPU (coprocessor 1) control registers. |
| 308 | // Currently only FCSR (#31) is implemented. |
| 309 | struct FPUControlRegister { |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 310 | bool is_valid() const { return code_ == kFCSRRegister; } |
| 311 | bool is(FPUControlRegister creg) const { return code_ == creg.code_; } |
| 312 | int code() const { |
| 313 | ASSERT(is_valid()); |
| 314 | return code_; |
| 315 | } |
| 316 | int bit() const { |
| 317 | ASSERT(is_valid()); |
| 318 | return 1 << code_; |
| 319 | } |
| 320 | void setcode(int f) { |
| 321 | code_ = f; |
| 322 | ASSERT(is_valid()); |
| 323 | } |
| 324 | // Unfortunately we can't make this private in a struct. |
| 325 | int code_; |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 326 | }; |
| 327 | |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 328 | const FPUControlRegister no_fpucreg = { kInvalidFPUControlRegister }; |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 329 | const FPUControlRegister FCSR = { kFCSRRegister }; |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 330 | |
| 331 | |
| 332 | // ----------------------------------------------------------------------------- |
| 333 | // Machine instruction Operands. |
| 334 | |
| 335 | // Class Operand represents a shifter operand in data processing instructions. |
| 336 | class Operand BASE_EMBEDDED { |
| 337 | public: |
| 338 | // Immediate. |
| 339 | INLINE(explicit Operand(int32_t immediate, |
| 340 | RelocInfo::Mode rmode = RelocInfo::NONE)); |
| 341 | INLINE(explicit Operand(const ExternalReference& f)); |
| 342 | INLINE(explicit Operand(const char* s)); |
| 343 | INLINE(explicit Operand(Object** opp)); |
| 344 | INLINE(explicit Operand(Context** cpp)); |
| 345 | explicit Operand(Handle<Object> handle); |
| 346 | INLINE(explicit Operand(Smi* value)); |
| 347 | |
| 348 | // Register. |
| 349 | INLINE(explicit Operand(Register rm)); |
| 350 | |
| 351 | // Return true if this is a register operand. |
| 352 | INLINE(bool is_reg() const); |
| 353 | |
| 354 | Register rm() const { return rm_; } |
| 355 | |
| 356 | private: |
| 357 | Register rm_; |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 358 | int32_t imm32_; // Valid if rm_ == no_reg. |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 359 | RelocInfo::Mode rmode_; |
| 360 | |
| 361 | friend class Assembler; |
| 362 | friend class MacroAssembler; |
| 363 | }; |
| 364 | |
| 365 | |
| 366 | // On MIPS we have only one adressing mode with base_reg + offset. |
| 367 | // Class MemOperand represents a memory operand in load and store instructions. |
| 368 | class MemOperand : public Operand { |
| 369 | public: |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 370 | explicit MemOperand(Register rn, int32_t offset = 0); |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 371 | int32_t offset() const { return offset_; } |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 372 | |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame^] | 373 | bool OffsetIsInt16Encodable() const { |
| 374 | return is_int16(offset_); |
| 375 | } |
| 376 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 377 | private: |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 378 | int32_t offset_; |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 379 | |
| 380 | friend class Assembler; |
| 381 | }; |
| 382 | |
| 383 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 384 | // CpuFeatures keeps track of which features are supported by the target CPU. |
| 385 | // Supported features must be enabled by a Scope before use. |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 386 | class CpuFeatures : public AllStatic { |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 387 | public: |
| 388 | // Detect features of the target CPU. Set safe defaults if the serializer |
| 389 | // is enabled (snapshots must be portable). |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 390 | static void Probe(); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 391 | |
| 392 | // Check whether a feature is supported by the target CPU. |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 393 | static bool IsSupported(CpuFeature f) { |
| 394 | ASSERT(initialized_); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 395 | if (f == FPU && !FLAG_enable_fpu) return false; |
| 396 | return (supported_ & (1u << f)) != 0; |
| 397 | } |
| 398 | |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 399 | |
| 400 | #ifdef DEBUG |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 401 | // Check whether a feature is currently enabled. |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 402 | static bool IsEnabled(CpuFeature f) { |
| 403 | ASSERT(initialized_); |
| 404 | Isolate* isolate = Isolate::UncheckedCurrent(); |
| 405 | if (isolate == NULL) { |
| 406 | // When no isolate is available, work as if we're running in |
| 407 | // release mode. |
| 408 | return IsSupported(f); |
| 409 | } |
| 410 | unsigned enabled = static_cast<unsigned>(isolate->enabled_cpu_features()); |
| 411 | return (enabled & (1u << f)) != 0; |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 412 | } |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 413 | #endif |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 414 | |
| 415 | // Enable a specified feature within a scope. |
| 416 | class Scope BASE_EMBEDDED { |
| 417 | #ifdef DEBUG |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 418 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 419 | public: |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 420 | explicit Scope(CpuFeature f) { |
| 421 | unsigned mask = 1u << f; |
| 422 | ASSERT(CpuFeatures::IsSupported(f)); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 423 | ASSERT(!Serializer::enabled() || |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 424 | (CpuFeatures::found_by_runtime_probing_ & mask) == 0); |
| 425 | isolate_ = Isolate::UncheckedCurrent(); |
| 426 | old_enabled_ = 0; |
| 427 | if (isolate_ != NULL) { |
| 428 | old_enabled_ = static_cast<unsigned>(isolate_->enabled_cpu_features()); |
| 429 | isolate_->set_enabled_cpu_features(old_enabled_ | mask); |
| 430 | } |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 431 | } |
| 432 | ~Scope() { |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 433 | ASSERT_EQ(Isolate::UncheckedCurrent(), isolate_); |
| 434 | if (isolate_ != NULL) { |
| 435 | isolate_->set_enabled_cpu_features(old_enabled_); |
| 436 | } |
| 437 | } |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 438 | |
| 439 | private: |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 440 | Isolate* isolate_; |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 441 | unsigned old_enabled_; |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 442 | #else |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 443 | |
| 444 | public: |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 445 | explicit Scope(CpuFeature f) {} |
| 446 | #endif |
| 447 | }; |
| 448 | |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 449 | class TryForceFeatureScope BASE_EMBEDDED { |
| 450 | public: |
| 451 | explicit TryForceFeatureScope(CpuFeature f) |
| 452 | : old_supported_(CpuFeatures::supported_) { |
| 453 | if (CanForce()) { |
| 454 | CpuFeatures::supported_ |= (1u << f); |
| 455 | } |
| 456 | } |
| 457 | |
| 458 | ~TryForceFeatureScope() { |
| 459 | if (CanForce()) { |
| 460 | CpuFeatures::supported_ = old_supported_; |
| 461 | } |
| 462 | } |
| 463 | |
| 464 | private: |
| 465 | static bool CanForce() { |
| 466 | // It's only safe to temporarily force support of CPU features |
| 467 | // when there's only a single isolate, which is guaranteed when |
| 468 | // the serializer is enabled. |
| 469 | return Serializer::enabled(); |
| 470 | } |
| 471 | |
| 472 | const unsigned old_supported_; |
| 473 | }; |
| 474 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 475 | private: |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 476 | #ifdef DEBUG |
| 477 | static bool initialized_; |
| 478 | #endif |
| 479 | static unsigned supported_; |
| 480 | static unsigned found_by_runtime_probing_; |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 481 | |
| 482 | DISALLOW_COPY_AND_ASSIGN(CpuFeatures); |
| 483 | }; |
| 484 | |
| 485 | |
| 486 | class Assembler : public AssemblerBase { |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 487 | public: |
| 488 | // Create an assembler. Instructions and relocation information are emitted |
| 489 | // into a buffer, with the instructions starting from the beginning and the |
| 490 | // relocation information starting from the end of the buffer. See CodeDesc |
| 491 | // for a detailed comment on the layout (globals.h). |
| 492 | // |
| 493 | // If the provided buffer is NULL, the assembler allocates and grows its own |
| 494 | // buffer, and buffer_size determines the initial buffer size. The buffer is |
| 495 | // owned by the assembler and deallocated upon destruction of the assembler. |
| 496 | // |
| 497 | // If the provided buffer is not NULL, the assembler uses the provided buffer |
| 498 | // for code generation and assumes its size to be buffer_size. If the buffer |
| 499 | // is too small, a fatal error occurs. No deallocation of the buffer is done |
| 500 | // upon destruction of the assembler. |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 501 | Assembler(Isolate* isolate, void* buffer, int buffer_size); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 502 | ~Assembler(); |
| 503 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 504 | // Overrides the default provided by FLAG_debug_code. |
| 505 | void set_emit_debug_code(bool value) { emit_debug_code_ = value; } |
| 506 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 507 | // GetCode emits any pending (non-emitted) code and fills the descriptor |
| 508 | // desc. GetCode() is idempotent; it returns the same result if no other |
| 509 | // Assembler functions are invoked in between GetCode() calls. |
| 510 | void GetCode(CodeDesc* desc); |
| 511 | |
| 512 | // Label operations & relative jumps (PPUM Appendix D). |
| 513 | // |
| 514 | // Takes a branch opcode (cc) and a label (L) and generates |
| 515 | // either a backward branch or a forward branch and links it |
| 516 | // to the label fixup chain. Usage: |
| 517 | // |
| 518 | // Label L; // unbound label |
| 519 | // j(cc, &L); // forward branch to unbound label |
| 520 | // bind(&L); // bind label to the current pc |
| 521 | // j(cc, &L); // backward branch to bound label |
| 522 | // bind(&L); // illegal: a label may be bound only once |
| 523 | // |
| 524 | // Note: The same Label can be used for forward and backward branches |
| 525 | // but it may be bound only once. |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 526 | void bind(Label* L); // Binds an unbound label L to current code position. |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 527 | // Determines if Label is bound and near enough so that branch instruction |
| 528 | // can be used to reach it, instead of jump instruction. |
| 529 | bool is_near(Label* L); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 530 | |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 531 | // Returns the branch offset to the given label from the current code |
| 532 | // position. Links the label to the current position if it is still unbound. |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 533 | // Manages the jump elimination optimization if the second parameter is true. |
| 534 | int32_t branch_offset(Label* L, bool jump_elimination_allowed); |
| 535 | int32_t shifted_branch_offset(Label* L, bool jump_elimination_allowed) { |
| 536 | int32_t o = branch_offset(L, jump_elimination_allowed); |
| 537 | ASSERT((o & 3) == 0); // Assert the offset is aligned. |
| 538 | return o >> 2; |
| 539 | } |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 540 | uint32_t jump_address(Label* L); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 541 | |
| 542 | // Puts a labels target address at the given position. |
| 543 | // The high 8 bits are set to zero. |
| 544 | void label_at_put(Label* L, int at_offset); |
| 545 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 546 | // Read/Modify the code target address in the branch/call instruction at pc. |
| 547 | static Address target_address_at(Address pc); |
| 548 | static void set_target_address_at(Address pc, Address target); |
| 549 | |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame^] | 550 | static void JumpLabelToJumpRegister(Address pc); |
| 551 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 552 | // This sets the branch destination (which gets loaded at the call address). |
| 553 | // This is for calls and branches within generated code. |
| 554 | inline static void set_target_at(Address instruction_payload, |
| 555 | Address target) { |
| 556 | set_target_address_at(instruction_payload, target); |
| 557 | } |
| 558 | |
| 559 | // This sets the branch destination. |
| 560 | // This is for calls and branches to runtime code. |
| 561 | inline static void set_external_target_at(Address instruction_payload, |
| 562 | Address target) { |
| 563 | set_target_address_at(instruction_payload, target); |
| 564 | } |
| 565 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 566 | // Size of an instruction. |
| 567 | static const int kInstrSize = sizeof(Instr); |
| 568 | |
| 569 | // Difference between address of current opcode and target address offset. |
| 570 | static const int kBranchPCOffset = 4; |
| 571 | |
| 572 | // Here we are patching the address in the LUI/ORI instruction pair. |
| 573 | // These values are used in the serialization process and must be zero for |
| 574 | // MIPS platform, as Code, Embedded Object or External-reference pointers |
| 575 | // are split across two consecutive instructions and don't exist separately |
| 576 | // in the code, so the serializer should not step forwards in memory after |
| 577 | // a target is resolved and written. |
| 578 | static const int kCallTargetSize = 0 * kInstrSize; |
| 579 | static const int kExternalTargetSize = 0 * kInstrSize; |
| 580 | |
| 581 | // Number of consecutive instructions used to store 32bit constant. |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame^] | 582 | // Before jump-optimizations, this constant was used in |
| 583 | // RelocInfo::target_address_address() function to tell serializer address of |
| 584 | // the instruction that follows LUI/ORI instruction pair. Now, with new jump |
| 585 | // optimization, where jump-through-register instruction that usually |
| 586 | // follows LUI/ORI pair is substituted with J/JAL, this constant equals |
| 587 | // to 3 instructions (LUI+ORI+J/JAL/JR/JALR). |
| 588 | static const int kInstructionsFor32BitConstant = 3; |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 589 | |
| 590 | // Distance between the instruction referring to the address of the call |
| 591 | // target and the return address. |
| 592 | static const int kCallTargetAddressOffset = 4 * kInstrSize; |
| 593 | |
| 594 | // Distance between start of patched return sequence and the emitted address |
| 595 | // to jump to. |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 596 | static const int kPatchReturnSequenceAddressOffset = 0; |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 597 | |
Ben Murdoch | 7f4d5bd | 2010-06-15 11:15:29 +0100 | [diff] [blame] | 598 | // Distance between start of patched debug break slot and the emitted address |
| 599 | // to jump to. |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 600 | static const int kPatchDebugBreakSlotAddressOffset = 0 * kInstrSize; |
| 601 | |
| 602 | // Difference between address of current opcode and value read from pc |
| 603 | // register. |
| 604 | static const int kPcLoadDelta = 4; |
| 605 | |
| 606 | // Number of instructions used for the JS return sequence. The constant is |
| 607 | // used by the debugger to patch the JS return sequence. |
| 608 | static const int kJSReturnSequenceInstructions = 7; |
| 609 | static const int kDebugBreakSlotInstructions = 4; |
| 610 | static const int kDebugBreakSlotLength = |
| 611 | kDebugBreakSlotInstructions * kInstrSize; |
| 612 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 613 | |
| 614 | // --------------------------------------------------------------------------- |
| 615 | // Code generation. |
| 616 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 617 | // Insert the smallest number of nop instructions |
| 618 | // possible to align the pc offset to a multiple |
| 619 | // of m. m must be a power of 2 (>= 4). |
| 620 | void Align(int m); |
| 621 | // Aligns code to something that's optimal for a jump target for the platform. |
| 622 | void CodeTargetAlign(); |
| 623 | |
| 624 | // Different nop operations are used by the code generator to detect certain |
| 625 | // states of the generated code. |
| 626 | enum NopMarkerTypes { |
| 627 | NON_MARKING_NOP = 0, |
| 628 | DEBUG_BREAK_NOP, |
| 629 | // IC markers. |
| 630 | PROPERTY_ACCESS_INLINED, |
| 631 | PROPERTY_ACCESS_INLINED_CONTEXT, |
| 632 | PROPERTY_ACCESS_INLINED_CONTEXT_DONT_DELETE, |
| 633 | // Helper values. |
| 634 | LAST_CODE_MARKER, |
| 635 | FIRST_IC_MARKER = PROPERTY_ACCESS_INLINED |
| 636 | }; |
| 637 | |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 638 | // Type == 0 is the default non-marking type. |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 639 | void nop(unsigned int type = 0) { |
| 640 | ASSERT(type < 32); |
| 641 | sll(zero_reg, zero_reg, type, true); |
| 642 | } |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 643 | |
| 644 | |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 645 | // --------Branch-and-jump-instructions---------- |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 646 | // We don't use likely variant of instructions. |
| 647 | void b(int16_t offset); |
| 648 | void b(Label* L) { b(branch_offset(L, false)>>2); } |
| 649 | void bal(int16_t offset); |
| 650 | void bal(Label* L) { bal(branch_offset(L, false)>>2); } |
| 651 | |
| 652 | void beq(Register rs, Register rt, int16_t offset); |
| 653 | void beq(Register rs, Register rt, Label* L) { |
| 654 | beq(rs, rt, branch_offset(L, false) >> 2); |
| 655 | } |
| 656 | void bgez(Register rs, int16_t offset); |
| 657 | void bgezal(Register rs, int16_t offset); |
| 658 | void bgtz(Register rs, int16_t offset); |
| 659 | void blez(Register rs, int16_t offset); |
| 660 | void bltz(Register rs, int16_t offset); |
| 661 | void bltzal(Register rs, int16_t offset); |
| 662 | void bne(Register rs, Register rt, int16_t offset); |
| 663 | void bne(Register rs, Register rt, Label* L) { |
| 664 | bne(rs, rt, branch_offset(L, false)>>2); |
| 665 | } |
| 666 | |
| 667 | // Never use the int16_t b(l)cond version with a branch offset |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 668 | // instead of using the Label* version. |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 669 | |
| 670 | // Jump targets must be in the current 256 MB-aligned region. ie 28 bits. |
| 671 | void j(int32_t target); |
| 672 | void jal(int32_t target); |
| 673 | void jalr(Register rs, Register rd = ra); |
| 674 | void jr(Register target); |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame^] | 675 | void j_or_jr(int32_t target, Register rs); |
| 676 | void jal_or_jalr(int32_t target, Register rs); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 677 | |
| 678 | |
| 679 | //-------Data-processing-instructions--------- |
| 680 | |
| 681 | // Arithmetic. |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 682 | void addu(Register rd, Register rs, Register rt); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 683 | void subu(Register rd, Register rs, Register rt); |
| 684 | void mult(Register rs, Register rt); |
| 685 | void multu(Register rs, Register rt); |
| 686 | void div(Register rs, Register rt); |
| 687 | void divu(Register rs, Register rt); |
| 688 | void mul(Register rd, Register rs, Register rt); |
| 689 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 690 | void addiu(Register rd, Register rs, int32_t j); |
| 691 | |
| 692 | // Logical. |
| 693 | void and_(Register rd, Register rs, Register rt); |
| 694 | void or_(Register rd, Register rs, Register rt); |
| 695 | void xor_(Register rd, Register rs, Register rt); |
| 696 | void nor(Register rd, Register rs, Register rt); |
| 697 | |
| 698 | void andi(Register rd, Register rs, int32_t j); |
| 699 | void ori(Register rd, Register rs, int32_t j); |
| 700 | void xori(Register rd, Register rs, int32_t j); |
| 701 | void lui(Register rd, int32_t j); |
| 702 | |
| 703 | // Shifts. |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 704 | // Please note: sll(zero_reg, zero_reg, x) instructions are reserved as nop |
| 705 | // and may cause problems in normal code. coming_from_nop makes sure this |
| 706 | // doesn't happen. |
| 707 | void sll(Register rd, Register rt, uint16_t sa, bool coming_from_nop = false); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 708 | void sllv(Register rd, Register rt, Register rs); |
| 709 | void srl(Register rd, Register rt, uint16_t sa); |
| 710 | void srlv(Register rd, Register rt, Register rs); |
| 711 | void sra(Register rt, Register rd, uint16_t sa); |
| 712 | void srav(Register rt, Register rd, Register rs); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 713 | void rotr(Register rd, Register rt, uint16_t sa); |
| 714 | void rotrv(Register rd, Register rt, Register rs); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 715 | |
| 716 | |
| 717 | //------------Memory-instructions------------- |
| 718 | |
| 719 | void lb(Register rd, const MemOperand& rs); |
| 720 | void lbu(Register rd, const MemOperand& rs); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 721 | void lh(Register rd, const MemOperand& rs); |
| 722 | void lhu(Register rd, const MemOperand& rs); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 723 | void lw(Register rd, const MemOperand& rs); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 724 | void lwl(Register rd, const MemOperand& rs); |
| 725 | void lwr(Register rd, const MemOperand& rs); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 726 | void sb(Register rd, const MemOperand& rs); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 727 | void sh(Register rd, const MemOperand& rs); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 728 | void sw(Register rd, const MemOperand& rs); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 729 | void swl(Register rd, const MemOperand& rs); |
| 730 | void swr(Register rd, const MemOperand& rs); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 731 | |
| 732 | |
| 733 | //-------------Misc-instructions-------------- |
| 734 | |
| 735 | // Break / Trap instructions. |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 736 | void break_(uint32_t code, bool break_as_stop = false); |
| 737 | void stop(const char* msg, uint32_t code = kMaxStopCode); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 738 | void tge(Register rs, Register rt, uint16_t code); |
| 739 | void tgeu(Register rs, Register rt, uint16_t code); |
| 740 | void tlt(Register rs, Register rt, uint16_t code); |
| 741 | void tltu(Register rs, Register rt, uint16_t code); |
| 742 | void teq(Register rs, Register rt, uint16_t code); |
| 743 | void tne(Register rs, Register rt, uint16_t code); |
| 744 | |
| 745 | // Move from HI/LO register. |
| 746 | void mfhi(Register rd); |
| 747 | void mflo(Register rd); |
| 748 | |
| 749 | // Set on less than. |
| 750 | void slt(Register rd, Register rs, Register rt); |
| 751 | void sltu(Register rd, Register rs, Register rt); |
| 752 | void slti(Register rd, Register rs, int32_t j); |
| 753 | void sltiu(Register rd, Register rs, int32_t j); |
| 754 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 755 | // Conditional move. |
| 756 | void movz(Register rd, Register rs, Register rt); |
| 757 | void movn(Register rd, Register rs, Register rt); |
| 758 | void movt(Register rd, Register rs, uint16_t cc = 0); |
| 759 | void movf(Register rd, Register rs, uint16_t cc = 0); |
| 760 | |
| 761 | // Bit twiddling. |
| 762 | void clz(Register rd, Register rs); |
| 763 | void ins_(Register rt, Register rs, uint16_t pos, uint16_t size); |
| 764 | void ext_(Register rt, Register rs, uint16_t pos, uint16_t size); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 765 | |
| 766 | //--------Coprocessor-instructions---------------- |
| 767 | |
| 768 | // Load, store, and move. |
| 769 | void lwc1(FPURegister fd, const MemOperand& src); |
| 770 | void ldc1(FPURegister fd, const MemOperand& src); |
| 771 | |
| 772 | void swc1(FPURegister fs, const MemOperand& dst); |
| 773 | void sdc1(FPURegister fs, const MemOperand& dst); |
| 774 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 775 | void mtc1(Register rt, FPURegister fs); |
| 776 | void mfc1(Register rt, FPURegister fs); |
| 777 | |
| 778 | void ctc1(Register rt, FPUControlRegister fs); |
| 779 | void cfc1(Register rt, FPUControlRegister fs); |
| 780 | |
| 781 | // Arithmetic. |
| 782 | void add_d(FPURegister fd, FPURegister fs, FPURegister ft); |
| 783 | void sub_d(FPURegister fd, FPURegister fs, FPURegister ft); |
| 784 | void mul_d(FPURegister fd, FPURegister fs, FPURegister ft); |
| 785 | void div_d(FPURegister fd, FPURegister fs, FPURegister ft); |
| 786 | void abs_d(FPURegister fd, FPURegister fs); |
| 787 | void mov_d(FPURegister fd, FPURegister fs); |
| 788 | void neg_d(FPURegister fd, FPURegister fs); |
| 789 | void sqrt_d(FPURegister fd, FPURegister fs); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 790 | |
| 791 | // Conversion. |
| 792 | void cvt_w_s(FPURegister fd, FPURegister fs); |
| 793 | void cvt_w_d(FPURegister fd, FPURegister fs); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 794 | void trunc_w_s(FPURegister fd, FPURegister fs); |
| 795 | void trunc_w_d(FPURegister fd, FPURegister fs); |
| 796 | void round_w_s(FPURegister fd, FPURegister fs); |
| 797 | void round_w_d(FPURegister fd, FPURegister fs); |
| 798 | void floor_w_s(FPURegister fd, FPURegister fs); |
| 799 | void floor_w_d(FPURegister fd, FPURegister fs); |
| 800 | void ceil_w_s(FPURegister fd, FPURegister fs); |
| 801 | void ceil_w_d(FPURegister fd, FPURegister fs); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 802 | |
| 803 | void cvt_l_s(FPURegister fd, FPURegister fs); |
| 804 | void cvt_l_d(FPURegister fd, FPURegister fs); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 805 | void trunc_l_s(FPURegister fd, FPURegister fs); |
| 806 | void trunc_l_d(FPURegister fd, FPURegister fs); |
| 807 | void round_l_s(FPURegister fd, FPURegister fs); |
| 808 | void round_l_d(FPURegister fd, FPURegister fs); |
| 809 | void floor_l_s(FPURegister fd, FPURegister fs); |
| 810 | void floor_l_d(FPURegister fd, FPURegister fs); |
| 811 | void ceil_l_s(FPURegister fd, FPURegister fs); |
| 812 | void ceil_l_d(FPURegister fd, FPURegister fs); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 813 | |
| 814 | void cvt_s_w(FPURegister fd, FPURegister fs); |
| 815 | void cvt_s_l(FPURegister fd, FPURegister fs); |
| 816 | void cvt_s_d(FPURegister fd, FPURegister fs); |
| 817 | |
| 818 | void cvt_d_w(FPURegister fd, FPURegister fs); |
| 819 | void cvt_d_l(FPURegister fd, FPURegister fs); |
| 820 | void cvt_d_s(FPURegister fd, FPURegister fs); |
| 821 | |
| 822 | // Conditions and branches. |
| 823 | void c(FPUCondition cond, SecondaryField fmt, |
| 824 | FPURegister ft, FPURegister fs, uint16_t cc = 0); |
| 825 | |
| 826 | void bc1f(int16_t offset, uint16_t cc = 0); |
| 827 | void bc1f(Label* L, uint16_t cc = 0) { bc1f(branch_offset(L, false)>>2, cc); } |
| 828 | void bc1t(int16_t offset, uint16_t cc = 0); |
| 829 | void bc1t(Label* L, uint16_t cc = 0) { bc1t(branch_offset(L, false)>>2, cc); } |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 830 | void fcmp(FPURegister src1, const double src2, FPUCondition cond); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 831 | |
| 832 | // Check the code size generated from label to here. |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 833 | int SizeOfCodeGeneratedSince(Label* label) { |
| 834 | return pc_offset() - label->pos(); |
| 835 | } |
| 836 | |
| 837 | // Check the number of instructions generated from label to here. |
| 838 | int InstructionsGeneratedSince(Label* label) { |
| 839 | return SizeOfCodeGeneratedSince(label) / kInstrSize; |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 840 | } |
| 841 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 842 | // Class for scoping postponing the trampoline pool generation. |
| 843 | class BlockTrampolinePoolScope { |
| 844 | public: |
| 845 | explicit BlockTrampolinePoolScope(Assembler* assem) : assem_(assem) { |
| 846 | assem_->StartBlockTrampolinePool(); |
| 847 | } |
| 848 | ~BlockTrampolinePoolScope() { |
| 849 | assem_->EndBlockTrampolinePool(); |
| 850 | } |
| 851 | |
| 852 | private: |
| 853 | Assembler* assem_; |
| 854 | |
| 855 | DISALLOW_IMPLICIT_CONSTRUCTORS(BlockTrampolinePoolScope); |
| 856 | }; |
| 857 | |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 858 | // Class for postponing the assembly buffer growth. Typically used for |
| 859 | // sequences of instructions that must be emitted as a unit, before |
| 860 | // buffer growth (and relocation) can occur. |
| 861 | // This blocking scope is not nestable. |
| 862 | class BlockGrowBufferScope { |
| 863 | public: |
| 864 | explicit BlockGrowBufferScope(Assembler* assem) : assem_(assem) { |
| 865 | assem_->StartBlockGrowBuffer(); |
| 866 | } |
| 867 | ~BlockGrowBufferScope() { |
| 868 | assem_->EndBlockGrowBuffer(); |
| 869 | } |
| 870 | |
| 871 | private: |
| 872 | Assembler* assem_; |
| 873 | |
| 874 | DISALLOW_IMPLICIT_CONSTRUCTORS(BlockGrowBufferScope); |
| 875 | }; |
| 876 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 877 | // Debugging. |
| 878 | |
| 879 | // Mark address of the ExitJSFrame code. |
| 880 | void RecordJSReturn(); |
| 881 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 882 | // Mark address of a debug break slot. |
| 883 | void RecordDebugBreakSlot(); |
| 884 | |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 885 | // Record the AST id of the CallIC being compiled, so that it can be placed |
| 886 | // in the relocation information. |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 887 | void SetRecordedAstId(unsigned ast_id) { |
| 888 | ASSERT(recorded_ast_id_ == kNoASTId); |
| 889 | recorded_ast_id_ = ast_id; |
| 890 | } |
| 891 | |
| 892 | unsigned RecordedAstId() { |
| 893 | ASSERT(recorded_ast_id_ != kNoASTId); |
| 894 | return recorded_ast_id_; |
| 895 | } |
| 896 | |
| 897 | void ClearRecordedAstId() { recorded_ast_id_ = kNoASTId; } |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 898 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 899 | // Record a comment relocation entry that can be used by a disassembler. |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 900 | // Use --code-comments to enable. |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 901 | void RecordComment(const char* msg); |
| 902 | |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 903 | static int RelocateInternalReference(byte* pc, intptr_t pc_delta); |
| 904 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 905 | // Writes a single byte or word of data in the code stream. Used for |
| 906 | // inline tables, e.g., jump-tables. |
| 907 | void db(uint8_t data); |
| 908 | void dd(uint32_t data); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 909 | |
| 910 | int32_t pc_offset() const { return pc_ - buffer_; } |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 911 | |
| 912 | PositionsRecorder* positions_recorder() { return &positions_recorder_; } |
| 913 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 914 | // Postpone the generation of the trampoline pool for the specified number of |
| 915 | // instructions. |
| 916 | void BlockTrampolinePoolFor(int instructions); |
| 917 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 918 | // Check if there is less than kGap bytes available in the buffer. |
| 919 | // If this is the case, we need to grow the buffer before emitting |
| 920 | // an instruction or relocation information. |
| 921 | inline bool overflow() const { return pc_ >= reloc_info_writer.pos() - kGap; } |
| 922 | |
| 923 | // Get the number of bytes available in the buffer. |
| 924 | inline int available_space() const { return reloc_info_writer.pos() - pc_; } |
| 925 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 926 | // Read/patch instructions. |
| 927 | static Instr instr_at(byte* pc) { return *reinterpret_cast<Instr*>(pc); } |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 928 | static void instr_at_put(byte* pc, Instr instr) { |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 929 | *reinterpret_cast<Instr*>(pc) = instr; |
| 930 | } |
| 931 | Instr instr_at(int pos) { return *reinterpret_cast<Instr*>(buffer_ + pos); } |
| 932 | void instr_at_put(int pos, Instr instr) { |
| 933 | *reinterpret_cast<Instr*>(buffer_ + pos) = instr; |
| 934 | } |
| 935 | |
| 936 | // Check if an instruction is a branch of some kind. |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 937 | static bool IsBranch(Instr instr); |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 938 | static bool IsBeq(Instr instr); |
| 939 | static bool IsBne(Instr instr); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 940 | |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 941 | static bool IsJump(Instr instr); |
| 942 | static bool IsJ(Instr instr); |
| 943 | static bool IsLui(Instr instr); |
| 944 | static bool IsOri(Instr instr); |
| 945 | |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame^] | 946 | static bool IsJal(Instr instr); |
| 947 | static bool IsJr(Instr instr); |
| 948 | static bool IsJalr(Instr instr); |
| 949 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 950 | static bool IsNop(Instr instr, unsigned int type); |
| 951 | static bool IsPop(Instr instr); |
| 952 | static bool IsPush(Instr instr); |
| 953 | static bool IsLwRegFpOffset(Instr instr); |
| 954 | static bool IsSwRegFpOffset(Instr instr); |
| 955 | static bool IsLwRegFpNegOffset(Instr instr); |
| 956 | static bool IsSwRegFpNegOffset(Instr instr); |
| 957 | |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 958 | static Register GetRtReg(Instr instr); |
| 959 | static Register GetRsReg(Instr instr); |
| 960 | static Register GetRdReg(Instr instr); |
| 961 | |
| 962 | static uint32_t GetRt(Instr instr); |
| 963 | static uint32_t GetRtField(Instr instr); |
| 964 | static uint32_t GetRs(Instr instr); |
| 965 | static uint32_t GetRsField(Instr instr); |
| 966 | static uint32_t GetRd(Instr instr); |
| 967 | static uint32_t GetRdField(Instr instr); |
| 968 | static uint32_t GetSa(Instr instr); |
| 969 | static uint32_t GetSaField(Instr instr); |
| 970 | static uint32_t GetOpcodeField(Instr instr); |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 971 | static uint32_t GetFunction(Instr instr); |
| 972 | static uint32_t GetFunctionField(Instr instr); |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 973 | static uint32_t GetImmediate16(Instr instr); |
| 974 | static uint32_t GetLabelConst(Instr instr); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 975 | |
| 976 | static int32_t GetBranchOffset(Instr instr); |
| 977 | static bool IsLw(Instr instr); |
| 978 | static int16_t GetLwOffset(Instr instr); |
| 979 | static Instr SetLwOffset(Instr instr, int16_t offset); |
| 980 | |
| 981 | static bool IsSw(Instr instr); |
| 982 | static Instr SetSwOffset(Instr instr, int16_t offset); |
| 983 | static bool IsAddImmediate(Instr instr); |
| 984 | static Instr SetAddImmediateOffset(Instr instr, int16_t offset); |
| 985 | |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 986 | static bool IsAndImmediate(Instr instr); |
| 987 | |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 988 | void CheckTrampolinePool(); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 989 | |
| 990 | protected: |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 991 | // Relocation for a type-recording IC has the AST id added to it. This |
| 992 | // member variable is a way to pass the information from the call site to |
| 993 | // the relocation info. |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 994 | unsigned recorded_ast_id_; |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 995 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 996 | bool emit_debug_code() const { return emit_debug_code_; } |
| 997 | |
| 998 | int32_t buffer_space() const { return reloc_info_writer.pos() - pc_; } |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 999 | |
| 1000 | // Decode branch instruction at pos and return branch target pos. |
| 1001 | int target_at(int32_t pos); |
| 1002 | |
| 1003 | // Patch branch instruction at pos to branch to given branch target pos. |
| 1004 | void target_at_put(int32_t pos, int32_t target_pos); |
| 1005 | |
| 1006 | // Say if we need to relocate with this mode. |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1007 | bool MustUseReg(RelocInfo::Mode rmode); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1008 | |
| 1009 | // Record reloc info for current pc_. |
| 1010 | void RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data = 0); |
| 1011 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1012 | // Block the emission of the trampoline pool before pc_offset. |
| 1013 | void BlockTrampolinePoolBefore(int pc_offset) { |
| 1014 | if (no_trampoline_pool_before_ < pc_offset) |
| 1015 | no_trampoline_pool_before_ = pc_offset; |
| 1016 | } |
| 1017 | |
| 1018 | void StartBlockTrampolinePool() { |
| 1019 | trampoline_pool_blocked_nesting_++; |
| 1020 | } |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1021 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1022 | void EndBlockTrampolinePool() { |
| 1023 | trampoline_pool_blocked_nesting_--; |
| 1024 | } |
| 1025 | |
| 1026 | bool is_trampoline_pool_blocked() const { |
| 1027 | return trampoline_pool_blocked_nesting_ > 0; |
| 1028 | } |
| 1029 | |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 1030 | bool has_exception() const { |
| 1031 | return internal_trampoline_exception_; |
| 1032 | } |
| 1033 | |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame^] | 1034 | void DoubleAsTwoUInt32(double d, uint32_t* lo, uint32_t* hi); |
| 1035 | |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1036 | bool is_trampoline_emitted() const { |
| 1037 | return trampoline_emitted_; |
| 1038 | } |
| 1039 | |
| 1040 | // Temporarily block automatic assembly buffer growth. |
| 1041 | void StartBlockGrowBuffer() { |
| 1042 | ASSERT(!block_buffer_growth_); |
| 1043 | block_buffer_growth_ = true; |
| 1044 | } |
| 1045 | |
| 1046 | void EndBlockGrowBuffer() { |
| 1047 | ASSERT(block_buffer_growth_); |
| 1048 | block_buffer_growth_ = false; |
| 1049 | } |
| 1050 | |
| 1051 | bool is_buffer_growth_blocked() const { |
| 1052 | return block_buffer_growth_; |
| 1053 | } |
| 1054 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1055 | private: |
| 1056 | // Code buffer: |
| 1057 | // The buffer into which code and relocation info are generated. |
| 1058 | byte* buffer_; |
| 1059 | int buffer_size_; |
| 1060 | // True if the assembler owns the buffer, false if buffer is external. |
| 1061 | bool own_buffer_; |
| 1062 | |
| 1063 | // Buffer size and constant pool distance are checked together at regular |
| 1064 | // intervals of kBufferCheckInterval emitted bytes. |
| 1065 | static const int kBufferCheckInterval = 1*KB/2; |
| 1066 | |
| 1067 | // Code generation. |
| 1068 | // The relocation writer's position is at least kGap bytes below the end of |
| 1069 | // the generated instructions. This is so that multi-instruction sequences do |
| 1070 | // not have to check for overflow. The same is true for writes of large |
| 1071 | // relocation info entries. |
| 1072 | static const int kGap = 32; |
| 1073 | byte* pc_; // The program counter - moves forward. |
| 1074 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1075 | |
| 1076 | // Repeated checking whether the trampoline pool should be emitted is rather |
| 1077 | // expensive. By default we only check again once a number of instructions |
| 1078 | // has been generated. |
| 1079 | static const int kCheckConstIntervalInst = 32; |
| 1080 | static const int kCheckConstInterval = kCheckConstIntervalInst * kInstrSize; |
| 1081 | |
| 1082 | int next_buffer_check_; // pc offset of next buffer check. |
| 1083 | |
| 1084 | // Emission of the trampoline pool may be blocked in some code sequences. |
| 1085 | int trampoline_pool_blocked_nesting_; // Block emission if this is not zero. |
| 1086 | int no_trampoline_pool_before_; // Block emission before this pc offset. |
| 1087 | |
| 1088 | // Keep track of the last emitted pool to guarantee a maximal distance. |
| 1089 | int last_trampoline_pool_end_; // pc offset of the end of the last pool. |
| 1090 | |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1091 | // Automatic growth of the assembly buffer may be blocked for some sequences. |
| 1092 | bool block_buffer_growth_; // Block growth when true. |
| 1093 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1094 | // Relocation information generation. |
| 1095 | // Each relocation is encoded as a variable size value. |
| 1096 | static const int kMaxRelocSize = RelocInfoWriter::kMaxSize; |
| 1097 | RelocInfoWriter reloc_info_writer; |
| 1098 | |
| 1099 | // The bound position, before this we cannot do instruction elimination. |
| 1100 | int last_bound_pos_; |
| 1101 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1102 | // Code emission. |
| 1103 | inline void CheckBuffer(); |
| 1104 | void GrowBuffer(); |
| 1105 | inline void emit(Instr x); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1106 | inline void CheckTrampolinePoolQuick(); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1107 | |
| 1108 | // Instruction generation. |
| 1109 | // We have 3 different kind of encoding layout on MIPS. |
| 1110 | // However due to many different types of objects encoded in the same fields |
| 1111 | // we have quite a few aliases for each mode. |
| 1112 | // Using the same structure to refer to Register and FPURegister would spare a |
| 1113 | // few aliases, but mixing both does not look clean to me. |
| 1114 | // Anyway we could surely implement this differently. |
| 1115 | |
| 1116 | void GenInstrRegister(Opcode opcode, |
| 1117 | Register rs, |
| 1118 | Register rt, |
| 1119 | Register rd, |
| 1120 | uint16_t sa = 0, |
| 1121 | SecondaryField func = NULLSF); |
| 1122 | |
| 1123 | void GenInstrRegister(Opcode opcode, |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1124 | Register rs, |
| 1125 | Register rt, |
| 1126 | uint16_t msb, |
| 1127 | uint16_t lsb, |
| 1128 | SecondaryField func); |
| 1129 | |
| 1130 | void GenInstrRegister(Opcode opcode, |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1131 | SecondaryField fmt, |
| 1132 | FPURegister ft, |
| 1133 | FPURegister fs, |
| 1134 | FPURegister fd, |
| 1135 | SecondaryField func = NULLSF); |
| 1136 | |
| 1137 | void GenInstrRegister(Opcode opcode, |
| 1138 | SecondaryField fmt, |
| 1139 | Register rt, |
| 1140 | FPURegister fs, |
| 1141 | FPURegister fd, |
| 1142 | SecondaryField func = NULLSF); |
| 1143 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1144 | void GenInstrRegister(Opcode opcode, |
| 1145 | SecondaryField fmt, |
| 1146 | Register rt, |
| 1147 | FPUControlRegister fs, |
| 1148 | SecondaryField func = NULLSF); |
| 1149 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1150 | |
| 1151 | void GenInstrImmediate(Opcode opcode, |
| 1152 | Register rs, |
| 1153 | Register rt, |
| 1154 | int32_t j); |
| 1155 | void GenInstrImmediate(Opcode opcode, |
| 1156 | Register rs, |
| 1157 | SecondaryField SF, |
| 1158 | int32_t j); |
| 1159 | void GenInstrImmediate(Opcode opcode, |
| 1160 | Register r1, |
| 1161 | FPURegister r2, |
| 1162 | int32_t j); |
| 1163 | |
| 1164 | |
| 1165 | void GenInstrJump(Opcode opcode, |
| 1166 | uint32_t address); |
| 1167 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1168 | // Helpers. |
| 1169 | void LoadRegPlusOffsetToAt(const MemOperand& src); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1170 | |
| 1171 | // Labels. |
| 1172 | void print(Label* L); |
| 1173 | void bind_to(Label* L, int pos); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1174 | void next(Label* L); |
| 1175 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1176 | // One trampoline consists of: |
| 1177 | // - space for trampoline slots, |
| 1178 | // - space for labels. |
| 1179 | // |
| 1180 | // Space for trampoline slots is equal to slot_count * 2 * kInstrSize. |
| 1181 | // Space for trampoline slots preceeds space for labels. Each label is of one |
| 1182 | // instruction size, so total amount for labels is equal to |
| 1183 | // label_count * kInstrSize. |
| 1184 | class Trampoline { |
| 1185 | public: |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1186 | Trampoline() { |
| 1187 | start_ = 0; |
| 1188 | next_slot_ = 0; |
| 1189 | free_slot_count_ = 0; |
| 1190 | end_ = 0; |
| 1191 | } |
| 1192 | Trampoline(int start, int slot_count) { |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1193 | start_ = start; |
| 1194 | next_slot_ = start; |
| 1195 | free_slot_count_ = slot_count; |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1196 | end_ = start + slot_count * kTrampolineSlotsSize; |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1197 | } |
| 1198 | int start() { |
| 1199 | return start_; |
| 1200 | } |
| 1201 | int end() { |
| 1202 | return end_; |
| 1203 | } |
| 1204 | int take_slot() { |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 1205 | int trampoline_slot = kInvalidSlotPos; |
| 1206 | if (free_slot_count_ <= 0) { |
| 1207 | // We have run out of space on trampolines. |
| 1208 | // Make sure we fail in debug mode, so we become aware of each case |
| 1209 | // when this happens. |
| 1210 | ASSERT(0); |
| 1211 | // Internal exception will be caught. |
| 1212 | } else { |
| 1213 | trampoline_slot = next_slot_; |
| 1214 | free_slot_count_--; |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1215 | next_slot_ += kTrampolineSlotsSize; |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 1216 | } |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1217 | return trampoline_slot; |
| 1218 | } |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame^] | 1219 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1220 | private: |
| 1221 | int start_; |
| 1222 | int end_; |
| 1223 | int next_slot_; |
| 1224 | int free_slot_count_; |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1225 | }; |
| 1226 | |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1227 | int32_t get_trampoline_entry(int32_t pos); |
| 1228 | int unbound_labels_count_; |
| 1229 | // If trampoline is emitted, generated code is becoming large. As this is |
| 1230 | // already a slow case which can possibly break our code generation for the |
| 1231 | // extreme case, we use this information to trigger different mode of |
| 1232 | // branch instruction generation, where we use jump instructions rather |
| 1233 | // than regular branch instructions. |
| 1234 | bool trampoline_emitted_; |
| 1235 | static const int kTrampolineSlotsSize = 4 * kInstrSize; |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1236 | static const int kMaxBranchOffset = (1 << (18 - 1)) - 1; |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 1237 | static const int kInvalidSlotPos = -1; |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1238 | |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1239 | Trampoline trampoline_; |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 1240 | bool internal_trampoline_exception_; |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1241 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1242 | friend class RegExpMacroAssemblerMIPS; |
| 1243 | friend class RelocInfo; |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1244 | friend class CodePatcher; |
| 1245 | friend class BlockTrampolinePoolScope; |
| 1246 | |
| 1247 | PositionsRecorder positions_recorder_; |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1248 | bool emit_debug_code_; |
| 1249 | friend class PositionsRecorder; |
| 1250 | friend class EnsureSpace; |
| 1251 | }; |
| 1252 | |
| 1253 | |
| 1254 | class EnsureSpace BASE_EMBEDDED { |
| 1255 | public: |
| 1256 | explicit EnsureSpace(Assembler* assembler) { |
| 1257 | assembler->CheckBuffer(); |
| 1258 | } |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1259 | }; |
| 1260 | |
| 1261 | } } // namespace v8::internal |
| 1262 | |
| 1263 | #endif // V8_ARM_ASSEMBLER_MIPS_H_ |