Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1 | // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 | // All Rights Reserved. |
| 3 | // |
| 4 | // Redistribution and use in source and binary forms, with or without |
| 5 | // modification, are permitted provided that the following conditions are |
| 6 | // met: |
| 7 | // |
| 8 | // - Redistributions of source code must retain the above copyright notice, |
| 9 | // this list of conditions and the following disclaimer. |
| 10 | // |
| 11 | // - Redistribution in binary form must reproduce the above copyright |
| 12 | // notice, this list of conditions and the following disclaimer in the |
| 13 | // documentation and/or other materials provided with the distribution. |
| 14 | // |
| 15 | // - Neither the name of Sun Microsystems or the names of contributors may |
| 16 | // be used to endorse or promote products derived from this software without |
| 17 | // specific prior written permission. |
| 18 | // |
| 19 | // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS |
| 20 | // IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, |
| 21 | // THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
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| 23 | // CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, |
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| 28 | // NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 29 | // SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 30 | |
| 31 | // The original source code covered by the above license above has been |
| 32 | // modified significantly by Google Inc. |
Ben Murdoch | 3ef787d | 2012-04-12 10:51:47 +0100 | [diff] [blame] | 33 | // Copyright 2012 the V8 project authors. All rights reserved. |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 34 | |
| 35 | |
| 36 | #ifndef V8_MIPS_ASSEMBLER_MIPS_H_ |
| 37 | #define V8_MIPS_ASSEMBLER_MIPS_H_ |
| 38 | |
| 39 | #include <stdio.h> |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 40 | |
| 41 | #include "src/assembler.h" |
| 42 | #include "src/mips/constants-mips.h" |
| 43 | #include "src/serialize.h" |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 44 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 45 | namespace v8 { |
| 46 | namespace internal { |
| 47 | |
| 48 | // CPU Registers. |
| 49 | // |
| 50 | // 1) We would prefer to use an enum, but enum values are assignment- |
| 51 | // compatible with int, which has caused code-generation bugs. |
| 52 | // |
| 53 | // 2) We would prefer to use a class instead of a struct but we don't like |
| 54 | // the register initialization to depend on the particular initialization |
| 55 | // order (which appears to be different on OS X, Linux, and Windows for the |
| 56 | // installed versions of C++ we tried). Using a struct permits C-style |
| 57 | // "initialization". Also, the Register objects cannot be const as this |
| 58 | // forces initialization stubs in MSVC, making us dependent on initialization |
| 59 | // order. |
| 60 | // |
| 61 | // 3) By not using an enum, we are possibly preventing the compiler from |
| 62 | // doing certain constant folds, which may significantly reduce the |
| 63 | // code generated for some assembly instructions (because they boil down |
| 64 | // to a few constants). If this is a problem, we could change the code |
| 65 | // such that we use an enum in optimized mode, and the struct in debug |
| 66 | // mode. This way we get the compile-time error checking in debug mode |
| 67 | // and best performance in optimized code. |
| 68 | |
| 69 | |
| 70 | // ----------------------------------------------------------------------------- |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 71 | // Implementation of Register and FPURegister. |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 72 | |
| 73 | // Core register. |
| 74 | struct Register { |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 75 | static const int kNumRegisters = v8::internal::kNumRegisters; |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 76 | static const int kMaxNumAllocatableRegisters = 14; // v0 through t6 and cp. |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 77 | static const int kSizeInBytes = 4; |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 78 | static const int kCpRegister = 23; // cp (s7) is the 23rd register. |
| 79 | |
| 80 | #if defined(V8_TARGET_LITTLE_ENDIAN) |
| 81 | static const int kMantissaOffset = 0; |
| 82 | static const int kExponentOffset = 4; |
| 83 | #elif defined(V8_TARGET_BIG_ENDIAN) |
| 84 | static const int kMantissaOffset = 4; |
| 85 | static const int kExponentOffset = 0; |
| 86 | #else |
| 87 | #error Unknown endianness |
| 88 | #endif |
| 89 | |
| 90 | inline static int NumAllocatableRegisters(); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 91 | |
| 92 | static int ToAllocationIndex(Register reg) { |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 93 | DCHECK((reg.code() - 2) < (kMaxNumAllocatableRegisters - 1) || |
| 94 | reg.is(from_code(kCpRegister))); |
| 95 | return reg.is(from_code(kCpRegister)) ? |
| 96 | kMaxNumAllocatableRegisters - 1 : // Return last index for 'cp'. |
| 97 | reg.code() - 2; // zero_reg and 'at' are skipped. |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 98 | } |
| 99 | |
| 100 | static Register FromAllocationIndex(int index) { |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 101 | DCHECK(index >= 0 && index < kMaxNumAllocatableRegisters); |
| 102 | return index == kMaxNumAllocatableRegisters - 1 ? |
| 103 | from_code(kCpRegister) : // Last index is always the 'cp' register. |
| 104 | from_code(index + 2); // zero_reg and 'at' are skipped. |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 105 | } |
| 106 | |
| 107 | static const char* AllocationIndexToString(int index) { |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 108 | DCHECK(index >= 0 && index < kMaxNumAllocatableRegisters); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 109 | const char* const names[] = { |
| 110 | "v0", |
| 111 | "v1", |
| 112 | "a0", |
| 113 | "a1", |
| 114 | "a2", |
| 115 | "a3", |
| 116 | "t0", |
| 117 | "t1", |
| 118 | "t2", |
| 119 | "t3", |
| 120 | "t4", |
| 121 | "t5", |
| 122 | "t6", |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 123 | "s7", |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 124 | }; |
| 125 | return names[index]; |
| 126 | } |
| 127 | |
| 128 | static Register from_code(int code) { |
| 129 | Register r = { code }; |
| 130 | return r; |
| 131 | } |
| 132 | |
Kristian Monsen | 0d5e116 | 2010-09-30 15:31:59 +0100 | [diff] [blame] | 133 | bool is_valid() const { return 0 <= code_ && code_ < kNumRegisters; } |
| 134 | bool is(Register reg) const { return code_ == reg.code_; } |
| 135 | int code() const { |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 136 | DCHECK(is_valid()); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 137 | return code_; |
| 138 | } |
Kristian Monsen | 0d5e116 | 2010-09-30 15:31:59 +0100 | [diff] [blame] | 139 | int bit() const { |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 140 | DCHECK(is_valid()); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 141 | return 1 << code_; |
| 142 | } |
| 143 | |
| 144 | // Unfortunately we can't make this private in a struct. |
| 145 | int code_; |
| 146 | }; |
| 147 | |
Ben Murdoch | db1b438 | 2012-04-26 19:03:50 +0100 | [diff] [blame] | 148 | #define REGISTER(N, C) \ |
| 149 | const int kRegister_ ## N ## _Code = C; \ |
| 150 | const Register N = { C } |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 151 | |
Ben Murdoch | db1b438 | 2012-04-26 19:03:50 +0100 | [diff] [blame] | 152 | REGISTER(no_reg, -1); |
| 153 | // Always zero. |
| 154 | REGISTER(zero_reg, 0); |
| 155 | // at: Reserved for synthetic instructions. |
| 156 | REGISTER(at, 1); |
| 157 | // v0, v1: Used when returning multiple values from subroutines. |
| 158 | REGISTER(v0, 2); |
| 159 | REGISTER(v1, 3); |
| 160 | // a0 - a4: Used to pass non-FP parameters. |
| 161 | REGISTER(a0, 4); |
| 162 | REGISTER(a1, 5); |
| 163 | REGISTER(a2, 6); |
| 164 | REGISTER(a3, 7); |
| 165 | // t0 - t9: Can be used without reservation, act as temporary registers and are |
| 166 | // allowed to be destroyed by subroutines. |
| 167 | REGISTER(t0, 8); |
| 168 | REGISTER(t1, 9); |
| 169 | REGISTER(t2, 10); |
| 170 | REGISTER(t3, 11); |
| 171 | REGISTER(t4, 12); |
| 172 | REGISTER(t5, 13); |
| 173 | REGISTER(t6, 14); |
| 174 | REGISTER(t7, 15); |
| 175 | // s0 - s7: Subroutine register variables. Subroutines that write to these |
| 176 | // registers must restore their values before exiting so that the caller can |
| 177 | // expect the values to be preserved. |
| 178 | REGISTER(s0, 16); |
| 179 | REGISTER(s1, 17); |
| 180 | REGISTER(s2, 18); |
| 181 | REGISTER(s3, 19); |
| 182 | REGISTER(s4, 20); |
| 183 | REGISTER(s5, 21); |
| 184 | REGISTER(s6, 22); |
| 185 | REGISTER(s7, 23); |
| 186 | REGISTER(t8, 24); |
| 187 | REGISTER(t9, 25); |
| 188 | // k0, k1: Reserved for system calls and interrupt handlers. |
| 189 | REGISTER(k0, 26); |
| 190 | REGISTER(k1, 27); |
| 191 | // gp: Reserved. |
| 192 | REGISTER(gp, 28); |
| 193 | // sp: Stack pointer. |
| 194 | REGISTER(sp, 29); |
| 195 | // fp: Frame pointer. |
| 196 | REGISTER(fp, 30); |
| 197 | // ra: Return address pointer. |
| 198 | REGISTER(ra, 31); |
| 199 | |
| 200 | #undef REGISTER |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 201 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 202 | |
| 203 | int ToNumber(Register reg); |
| 204 | |
| 205 | Register ToRegister(int num); |
| 206 | |
| 207 | // Coprocessor register. |
| 208 | struct FPURegister { |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 209 | static const int kMaxNumRegisters = v8::internal::kNumFPURegisters; |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame] | 210 | |
| 211 | // TODO(plind): Warning, inconsistent numbering here. kNumFPURegisters refers |
| 212 | // to number of 32-bit FPU regs, but kNumAllocatableRegisters refers to |
| 213 | // number of Double regs (64-bit regs, or FPU-reg-pairs). |
| 214 | |
| 215 | // A few double registers are reserved: one as a scratch register and one to |
| 216 | // hold 0.0. |
| 217 | // f28: 0.0 |
| 218 | // f30: scratch register. |
| 219 | static const int kNumReservedRegisters = 2; |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 220 | static const int kMaxNumAllocatableRegisters = kMaxNumRegisters / 2 - |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame] | 221 | kNumReservedRegisters; |
| 222 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 223 | inline static int NumRegisters(); |
| 224 | inline static int NumAllocatableRegisters(); |
Ben Murdoch | 3ef787d | 2012-04-12 10:51:47 +0100 | [diff] [blame] | 225 | inline static int ToAllocationIndex(FPURegister reg); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 226 | static const char* AllocationIndexToString(int index); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 227 | |
| 228 | static FPURegister FromAllocationIndex(int index) { |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 229 | DCHECK(index >= 0 && index < kMaxNumAllocatableRegisters); |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame] | 230 | return from_code(index * 2); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 231 | } |
| 232 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 233 | static FPURegister from_code(int code) { |
| 234 | FPURegister r = { code }; |
| 235 | return r; |
| 236 | } |
| 237 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 238 | bool is_valid() const { return 0 <= code_ && code_ < kMaxNumRegisters ; } |
Kristian Monsen | 0d5e116 | 2010-09-30 15:31:59 +0100 | [diff] [blame] | 239 | bool is(FPURegister creg) const { return code_ == creg.code_; } |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame] | 240 | FPURegister low() const { |
| 241 | // Find low reg of a Double-reg pair, which is the reg itself. |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 242 | DCHECK(code_ % 2 == 0); // Specified Double reg must be even. |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame] | 243 | FPURegister reg; |
| 244 | reg.code_ = code_; |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 245 | DCHECK(reg.is_valid()); |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame] | 246 | return reg; |
| 247 | } |
| 248 | FPURegister high() const { |
| 249 | // Find high reg of a Doubel-reg pair, which is reg + 1. |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 250 | DCHECK(code_ % 2 == 0); // Specified Double reg must be even. |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame] | 251 | FPURegister reg; |
| 252 | reg.code_ = code_ + 1; |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 253 | DCHECK(reg.is_valid()); |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame] | 254 | return reg; |
| 255 | } |
| 256 | |
Kristian Monsen | 0d5e116 | 2010-09-30 15:31:59 +0100 | [diff] [blame] | 257 | int code() const { |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 258 | DCHECK(is_valid()); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 259 | return code_; |
| 260 | } |
Kristian Monsen | 0d5e116 | 2010-09-30 15:31:59 +0100 | [diff] [blame] | 261 | int bit() const { |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 262 | DCHECK(is_valid()); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 263 | return 1 << code_; |
| 264 | } |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 265 | void setcode(int f) { |
| 266 | code_ = f; |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 267 | DCHECK(is_valid()); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 268 | } |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 269 | // Unfortunately we can't make this private in a struct. |
| 270 | int code_; |
| 271 | }; |
| 272 | |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame] | 273 | // V8 now supports the O32 ABI, and the FPU Registers are organized as 32 |
| 274 | // 32-bit registers, f0 through f31. When used as 'double' they are used |
| 275 | // in pairs, starting with the even numbered register. So a double operation |
| 276 | // on f0 really uses f0 and f1. |
| 277 | // (Modern mips hardware also supports 32 64-bit registers, via setting |
| 278 | // (priviledged) Status Register FR bit to 1. This is used by the N32 ABI, |
| 279 | // but it is not in common use. Someday we will want to support this in v8.) |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 280 | |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame] | 281 | // For O32 ABI, Floats and Doubles refer to same set of 32 32-bit registers. |
| 282 | typedef FPURegister DoubleRegister; |
| 283 | typedef FPURegister FloatRegister; |
| 284 | |
| 285 | const FPURegister no_freg = { -1 }; |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 286 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 287 | const FPURegister f0 = { 0 }; // Return value in hard float mode. |
| 288 | const FPURegister f1 = { 1 }; |
| 289 | const FPURegister f2 = { 2 }; |
| 290 | const FPURegister f3 = { 3 }; |
| 291 | const FPURegister f4 = { 4 }; |
| 292 | const FPURegister f5 = { 5 }; |
| 293 | const FPURegister f6 = { 6 }; |
| 294 | const FPURegister f7 = { 7 }; |
| 295 | const FPURegister f8 = { 8 }; |
| 296 | const FPURegister f9 = { 9 }; |
| 297 | const FPURegister f10 = { 10 }; |
| 298 | const FPURegister f11 = { 11 }; |
| 299 | const FPURegister f12 = { 12 }; // Arg 0 in hard float mode. |
| 300 | const FPURegister f13 = { 13 }; |
| 301 | const FPURegister f14 = { 14 }; // Arg 1 in hard float mode. |
| 302 | const FPURegister f15 = { 15 }; |
| 303 | const FPURegister f16 = { 16 }; |
| 304 | const FPURegister f17 = { 17 }; |
| 305 | const FPURegister f18 = { 18 }; |
| 306 | const FPURegister f19 = { 19 }; |
| 307 | const FPURegister f20 = { 20 }; |
| 308 | const FPURegister f21 = { 21 }; |
| 309 | const FPURegister f22 = { 22 }; |
| 310 | const FPURegister f23 = { 23 }; |
| 311 | const FPURegister f24 = { 24 }; |
| 312 | const FPURegister f25 = { 25 }; |
| 313 | const FPURegister f26 = { 26 }; |
| 314 | const FPURegister f27 = { 27 }; |
| 315 | const FPURegister f28 = { 28 }; |
| 316 | const FPURegister f29 = { 29 }; |
| 317 | const FPURegister f30 = { 30 }; |
| 318 | const FPURegister f31 = { 31 }; |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 319 | |
Ben Murdoch | 3ef787d | 2012-04-12 10:51:47 +0100 | [diff] [blame] | 320 | // Register aliases. |
| 321 | // cp is assumed to be a callee saved register. |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 322 | // Defined using #define instead of "static const Register&" because Clang |
| 323 | // complains otherwise when a compilation unit that includes this header |
| 324 | // doesn't use the variables. |
| 325 | #define kRootRegister s6 |
| 326 | #define cp s7 |
| 327 | #define kLithiumScratchReg s3 |
| 328 | #define kLithiumScratchReg2 s4 |
| 329 | #define kLithiumScratchDouble f30 |
| 330 | #define kDoubleRegZero f28 |
| 331 | // Used on mips32r6 for compare operations. |
| 332 | #define kDoubleCompareReg f31 |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame] | 333 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 334 | // FPU (coprocessor 1) control registers. |
| 335 | // Currently only FCSR (#31) is implemented. |
| 336 | struct FPUControlRegister { |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 337 | bool is_valid() const { return code_ == kFCSRRegister; } |
| 338 | bool is(FPUControlRegister creg) const { return code_ == creg.code_; } |
| 339 | int code() const { |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 340 | DCHECK(is_valid()); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 341 | return code_; |
| 342 | } |
| 343 | int bit() const { |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 344 | DCHECK(is_valid()); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 345 | return 1 << code_; |
| 346 | } |
| 347 | void setcode(int f) { |
| 348 | code_ = f; |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 349 | DCHECK(is_valid()); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 350 | } |
| 351 | // Unfortunately we can't make this private in a struct. |
| 352 | int code_; |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 353 | }; |
| 354 | |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 355 | const FPUControlRegister no_fpucreg = { kInvalidFPUControlRegister }; |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 356 | const FPUControlRegister FCSR = { kFCSRRegister }; |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 357 | |
| 358 | |
| 359 | // ----------------------------------------------------------------------------- |
| 360 | // Machine instruction Operands. |
| 361 | |
| 362 | // Class Operand represents a shifter operand in data processing instructions. |
| 363 | class Operand BASE_EMBEDDED { |
| 364 | public: |
| 365 | // Immediate. |
| 366 | INLINE(explicit Operand(int32_t immediate, |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 367 | RelocInfo::Mode rmode = RelocInfo::NONE32)); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 368 | INLINE(explicit Operand(const ExternalReference& f)); |
| 369 | INLINE(explicit Operand(const char* s)); |
| 370 | INLINE(explicit Operand(Object** opp)); |
| 371 | INLINE(explicit Operand(Context** cpp)); |
| 372 | explicit Operand(Handle<Object> handle); |
| 373 | INLINE(explicit Operand(Smi* value)); |
| 374 | |
| 375 | // Register. |
| 376 | INLINE(explicit Operand(Register rm)); |
| 377 | |
| 378 | // Return true if this is a register operand. |
| 379 | INLINE(bool is_reg() const); |
| 380 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 381 | inline int32_t immediate() const { |
| 382 | DCHECK(!is_reg()); |
| 383 | return imm32_; |
| 384 | } |
| 385 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 386 | Register rm() const { return rm_; } |
| 387 | |
| 388 | private: |
| 389 | Register rm_; |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 390 | int32_t imm32_; // Valid if rm_ == no_reg. |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 391 | RelocInfo::Mode rmode_; |
| 392 | |
| 393 | friend class Assembler; |
| 394 | friend class MacroAssembler; |
| 395 | }; |
| 396 | |
| 397 | |
| 398 | // On MIPS we have only one adressing mode with base_reg + offset. |
| 399 | // Class MemOperand represents a memory operand in load and store instructions. |
| 400 | class MemOperand : public Operand { |
| 401 | public: |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 402 | // Immediate value attached to offset. |
| 403 | enum OffsetAddend { |
| 404 | offset_minus_one = -1, |
| 405 | offset_zero = 0 |
| 406 | }; |
| 407 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 408 | explicit MemOperand(Register rn, int32_t offset = 0); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 409 | explicit MemOperand(Register rn, int32_t unit, int32_t multiplier, |
| 410 | OffsetAddend offset_addend = offset_zero); |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 411 | int32_t offset() const { return offset_; } |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 412 | |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame] | 413 | bool OffsetIsInt16Encodable() const { |
| 414 | return is_int16(offset_); |
| 415 | } |
| 416 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 417 | private: |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 418 | int32_t offset_; |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 419 | |
| 420 | friend class Assembler; |
| 421 | }; |
| 422 | |
| 423 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 424 | class Assembler : public AssemblerBase { |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 425 | public: |
| 426 | // Create an assembler. Instructions and relocation information are emitted |
| 427 | // into a buffer, with the instructions starting from the beginning and the |
| 428 | // relocation information starting from the end of the buffer. See CodeDesc |
| 429 | // for a detailed comment on the layout (globals.h). |
| 430 | // |
| 431 | // If the provided buffer is NULL, the assembler allocates and grows its own |
| 432 | // buffer, and buffer_size determines the initial buffer size. The buffer is |
| 433 | // owned by the assembler and deallocated upon destruction of the assembler. |
| 434 | // |
| 435 | // If the provided buffer is not NULL, the assembler uses the provided buffer |
| 436 | // for code generation and assumes its size to be buffer_size. If the buffer |
| 437 | // is too small, a fatal error occurs. No deallocation of the buffer is done |
| 438 | // upon destruction of the assembler. |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 439 | Assembler(Isolate* isolate, void* buffer, int buffer_size); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 440 | virtual ~Assembler() { } |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 441 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 442 | // GetCode emits any pending (non-emitted) code and fills the descriptor |
| 443 | // desc. GetCode() is idempotent; it returns the same result if no other |
| 444 | // Assembler functions are invoked in between GetCode() calls. |
| 445 | void GetCode(CodeDesc* desc); |
| 446 | |
| 447 | // Label operations & relative jumps (PPUM Appendix D). |
| 448 | // |
| 449 | // Takes a branch opcode (cc) and a label (L) and generates |
| 450 | // either a backward branch or a forward branch and links it |
| 451 | // to the label fixup chain. Usage: |
| 452 | // |
| 453 | // Label L; // unbound label |
| 454 | // j(cc, &L); // forward branch to unbound label |
| 455 | // bind(&L); // bind label to the current pc |
| 456 | // j(cc, &L); // backward branch to bound label |
| 457 | // bind(&L); // illegal: a label may be bound only once |
| 458 | // |
| 459 | // Note: The same Label can be used for forward and backward branches |
| 460 | // but it may be bound only once. |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 461 | void bind(Label* L); // Binds an unbound label L to current code position. |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 462 | // Determines if Label is bound and near enough so that branch instruction |
| 463 | // can be used to reach it, instead of jump instruction. |
| 464 | bool is_near(Label* L); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 465 | |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 466 | // Returns the branch offset to the given label from the current code |
| 467 | // position. Links the label to the current position if it is still unbound. |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 468 | // Manages the jump elimination optimization if the second parameter is true. |
| 469 | int32_t branch_offset(Label* L, bool jump_elimination_allowed); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 470 | int32_t branch_offset_compact(Label* L, bool jump_elimination_allowed); |
| 471 | int32_t branch_offset21(Label* L, bool jump_elimination_allowed); |
| 472 | int32_t branch_offset21_compact(Label* L, bool jump_elimination_allowed); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 473 | int32_t shifted_branch_offset(Label* L, bool jump_elimination_allowed) { |
| 474 | int32_t o = branch_offset(L, jump_elimination_allowed); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 475 | DCHECK((o & 3) == 0); // Assert the offset is aligned. |
| 476 | return o >> 2; |
| 477 | } |
| 478 | int32_t shifted_branch_offset_compact(Label* L, |
| 479 | bool jump_elimination_allowed) { |
| 480 | int32_t o = branch_offset_compact(L, jump_elimination_allowed); |
| 481 | DCHECK((o & 3) == 0); // Assert the offset is aligned. |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 482 | return o >> 2; |
| 483 | } |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 484 | uint32_t jump_address(Label* L); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 485 | |
| 486 | // Puts a labels target address at the given position. |
| 487 | // The high 8 bits are set to zero. |
| 488 | void label_at_put(Label* L, int at_offset); |
| 489 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 490 | // Read/Modify the code target address in the branch/call instruction at pc. |
| 491 | static Address target_address_at(Address pc); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 492 | static void set_target_address_at(Address pc, |
| 493 | Address target, |
| 494 | ICacheFlushMode icache_flush_mode = |
| 495 | FLUSH_ICACHE_IF_NEEDED); |
| 496 | // On MIPS there is no Constant Pool so we skip that parameter. |
| 497 | INLINE(static Address target_address_at(Address pc, |
| 498 | ConstantPoolArray* constant_pool)) { |
| 499 | return target_address_at(pc); |
| 500 | } |
| 501 | INLINE(static void set_target_address_at(Address pc, |
| 502 | ConstantPoolArray* constant_pool, |
| 503 | Address target, |
| 504 | ICacheFlushMode icache_flush_mode = |
| 505 | FLUSH_ICACHE_IF_NEEDED)) { |
| 506 | set_target_address_at(pc, target, icache_flush_mode); |
| 507 | } |
| 508 | INLINE(static Address target_address_at(Address pc, Code* code)) { |
| 509 | ConstantPoolArray* constant_pool = code ? code->constant_pool() : NULL; |
| 510 | return target_address_at(pc, constant_pool); |
| 511 | } |
| 512 | INLINE(static void set_target_address_at(Address pc, |
| 513 | Code* code, |
| 514 | Address target, |
| 515 | ICacheFlushMode icache_flush_mode = |
| 516 | FLUSH_ICACHE_IF_NEEDED)) { |
| 517 | ConstantPoolArray* constant_pool = code ? code->constant_pool() : NULL; |
| 518 | set_target_address_at(pc, constant_pool, target, icache_flush_mode); |
| 519 | } |
| 520 | |
| 521 | // Return the code target address at a call site from the return address |
| 522 | // of that call in the instruction stream. |
| 523 | inline static Address target_address_from_return_address(Address pc); |
| 524 | |
| 525 | // Return the code target address of the patch debug break slot |
| 526 | inline static Address break_address_from_return_address(Address pc); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 527 | |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame] | 528 | static void JumpLabelToJumpRegister(Address pc); |
| 529 | |
Ben Murdoch | db1b438 | 2012-04-26 19:03:50 +0100 | [diff] [blame] | 530 | static void QuietNaN(HeapObject* nan); |
| 531 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 532 | // This sets the branch destination (which gets loaded at the call address). |
Ben Murdoch | 3ef787d | 2012-04-12 10:51:47 +0100 | [diff] [blame] | 533 | // This is for calls and branches within generated code. The serializer |
| 534 | // has already deserialized the lui/ori instructions etc. |
| 535 | inline static void deserialization_set_special_target_at( |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 536 | Address instruction_payload, Code* code, Address target) { |
Ben Murdoch | 3ef787d | 2012-04-12 10:51:47 +0100 | [diff] [blame] | 537 | set_target_address_at( |
| 538 | instruction_payload - kInstructionsFor32BitConstant * kInstrSize, |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 539 | code, |
Ben Murdoch | 3ef787d | 2012-04-12 10:51:47 +0100 | [diff] [blame] | 540 | target); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 541 | } |
| 542 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 543 | // Size of an instruction. |
| 544 | static const int kInstrSize = sizeof(Instr); |
| 545 | |
| 546 | // Difference between address of current opcode and target address offset. |
| 547 | static const int kBranchPCOffset = 4; |
| 548 | |
| 549 | // Here we are patching the address in the LUI/ORI instruction pair. |
| 550 | // These values are used in the serialization process and must be zero for |
| 551 | // MIPS platform, as Code, Embedded Object or External-reference pointers |
| 552 | // are split across two consecutive instructions and don't exist separately |
| 553 | // in the code, so the serializer should not step forwards in memory after |
| 554 | // a target is resolved and written. |
Ben Murdoch | 3ef787d | 2012-04-12 10:51:47 +0100 | [diff] [blame] | 555 | static const int kSpecialTargetSize = 0; |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 556 | |
| 557 | // Number of consecutive instructions used to store 32bit constant. |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame] | 558 | // Before jump-optimizations, this constant was used in |
| 559 | // RelocInfo::target_address_address() function to tell serializer address of |
| 560 | // the instruction that follows LUI/ORI instruction pair. Now, with new jump |
| 561 | // optimization, where jump-through-register instruction that usually |
| 562 | // follows LUI/ORI pair is substituted with J/JAL, this constant equals |
| 563 | // to 3 instructions (LUI+ORI+J/JAL/JR/JALR). |
| 564 | static const int kInstructionsFor32BitConstant = 3; |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 565 | |
| 566 | // Distance between the instruction referring to the address of the call |
| 567 | // target and the return address. |
| 568 | static const int kCallTargetAddressOffset = 4 * kInstrSize; |
| 569 | |
| 570 | // Distance between start of patched return sequence and the emitted address |
| 571 | // to jump to. |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 572 | static const int kPatchReturnSequenceAddressOffset = 0; |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 573 | |
Ben Murdoch | 7f4d5bd | 2010-06-15 11:15:29 +0100 | [diff] [blame] | 574 | // Distance between start of patched debug break slot and the emitted address |
| 575 | // to jump to. |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 576 | static const int kPatchDebugBreakSlotAddressOffset = 0 * kInstrSize; |
| 577 | |
| 578 | // Difference between address of current opcode and value read from pc |
| 579 | // register. |
| 580 | static const int kPcLoadDelta = 4; |
| 581 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 582 | static const int kPatchDebugBreakSlotReturnOffset = 4 * kInstrSize; |
| 583 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 584 | // Number of instructions used for the JS return sequence. The constant is |
| 585 | // used by the debugger to patch the JS return sequence. |
| 586 | static const int kJSReturnSequenceInstructions = 7; |
| 587 | static const int kDebugBreakSlotInstructions = 4; |
| 588 | static const int kDebugBreakSlotLength = |
| 589 | kDebugBreakSlotInstructions * kInstrSize; |
| 590 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 591 | |
| 592 | // --------------------------------------------------------------------------- |
| 593 | // Code generation. |
| 594 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 595 | // Insert the smallest number of nop instructions |
| 596 | // possible to align the pc offset to a multiple |
| 597 | // of m. m must be a power of 2 (>= 4). |
| 598 | void Align(int m); |
| 599 | // Aligns code to something that's optimal for a jump target for the platform. |
| 600 | void CodeTargetAlign(); |
| 601 | |
| 602 | // Different nop operations are used by the code generator to detect certain |
| 603 | // states of the generated code. |
| 604 | enum NopMarkerTypes { |
| 605 | NON_MARKING_NOP = 0, |
| 606 | DEBUG_BREAK_NOP, |
| 607 | // IC markers. |
| 608 | PROPERTY_ACCESS_INLINED, |
| 609 | PROPERTY_ACCESS_INLINED_CONTEXT, |
| 610 | PROPERTY_ACCESS_INLINED_CONTEXT_DONT_DELETE, |
| 611 | // Helper values. |
| 612 | LAST_CODE_MARKER, |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 613 | FIRST_IC_MARKER = PROPERTY_ACCESS_INLINED, |
| 614 | // Code aging |
| 615 | CODE_AGE_MARKER_NOP = 6, |
| 616 | CODE_AGE_SEQUENCE_NOP |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 617 | }; |
| 618 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 619 | // Type == 0 is the default non-marking nop. For mips this is a |
| 620 | // sll(zero_reg, zero_reg, 0). We use rt_reg == at for non-zero |
| 621 | // marking, to avoid conflict with ssnop and ehb instructions. |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 622 | void nop(unsigned int type = 0) { |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 623 | DCHECK(type < 32); |
| 624 | Register nop_rt_reg = (type == 0) ? zero_reg : at; |
| 625 | sll(zero_reg, nop_rt_reg, type, true); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 626 | } |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 627 | |
| 628 | |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 629 | // --------Branch-and-jump-instructions---------- |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 630 | // We don't use likely variant of instructions. |
| 631 | void b(int16_t offset); |
| 632 | void b(Label* L) { b(branch_offset(L, false)>>2); } |
| 633 | void bal(int16_t offset); |
| 634 | void bal(Label* L) { bal(branch_offset(L, false)>>2); } |
| 635 | |
| 636 | void beq(Register rs, Register rt, int16_t offset); |
| 637 | void beq(Register rs, Register rt, Label* L) { |
| 638 | beq(rs, rt, branch_offset(L, false) >> 2); |
| 639 | } |
| 640 | void bgez(Register rs, int16_t offset); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 641 | void bgezc(Register rt, int16_t offset); |
| 642 | void bgezc(Register rt, Label* L) { |
| 643 | bgezc(rt, branch_offset_compact(L, false)>>2); |
| 644 | } |
| 645 | void bgeuc(Register rs, Register rt, int16_t offset); |
| 646 | void bgeuc(Register rs, Register rt, Label* L) { |
| 647 | bgeuc(rs, rt, branch_offset_compact(L, false)>>2); |
| 648 | } |
| 649 | void bgec(Register rs, Register rt, int16_t offset); |
| 650 | void bgec(Register rs, Register rt, Label* L) { |
| 651 | bgec(rs, rt, branch_offset_compact(L, false)>>2); |
| 652 | } |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 653 | void bgezal(Register rs, int16_t offset); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 654 | void bgezalc(Register rt, int16_t offset); |
| 655 | void bgezalc(Register rt, Label* L) { |
| 656 | bgezalc(rt, branch_offset_compact(L, false)>>2); |
| 657 | } |
| 658 | void bgezall(Register rs, int16_t offset); |
| 659 | void bgezall(Register rs, Label* L) { |
| 660 | bgezall(rs, branch_offset(L, false)>>2); |
| 661 | } |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 662 | void bgtz(Register rs, int16_t offset); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 663 | void bgtzc(Register rt, int16_t offset); |
| 664 | void bgtzc(Register rt, Label* L) { |
| 665 | bgtzc(rt, branch_offset_compact(L, false)>>2); |
| 666 | } |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 667 | void blez(Register rs, int16_t offset); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 668 | void blezc(Register rt, int16_t offset); |
| 669 | void blezc(Register rt, Label* L) { |
| 670 | blezc(rt, branch_offset_compact(L, false)>>2); |
| 671 | } |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 672 | void bltz(Register rs, int16_t offset); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 673 | void bltzc(Register rt, int16_t offset); |
| 674 | void bltzc(Register rt, Label* L) { |
| 675 | bltzc(rt, branch_offset_compact(L, false)>>2); |
| 676 | } |
| 677 | void bltuc(Register rs, Register rt, int16_t offset); |
| 678 | void bltuc(Register rs, Register rt, Label* L) { |
| 679 | bltuc(rs, rt, branch_offset_compact(L, false)>>2); |
| 680 | } |
| 681 | void bltc(Register rs, Register rt, int16_t offset); |
| 682 | void bltc(Register rs, Register rt, Label* L) { |
| 683 | bltc(rs, rt, branch_offset_compact(L, false)>>2); |
| 684 | } |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 685 | void bltzal(Register rs, int16_t offset); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 686 | void blezalc(Register rt, int16_t offset); |
| 687 | void blezalc(Register rt, Label* L) { |
| 688 | blezalc(rt, branch_offset_compact(L, false)>>2); |
| 689 | } |
| 690 | void bltzalc(Register rt, int16_t offset); |
| 691 | void bltzalc(Register rt, Label* L) { |
| 692 | bltzalc(rt, branch_offset_compact(L, false)>>2); |
| 693 | } |
| 694 | void bgtzalc(Register rt, int16_t offset); |
| 695 | void bgtzalc(Register rt, Label* L) { |
| 696 | bgtzalc(rt, branch_offset_compact(L, false)>>2); |
| 697 | } |
| 698 | void beqzalc(Register rt, int16_t offset); |
| 699 | void beqzalc(Register rt, Label* L) { |
| 700 | beqzalc(rt, branch_offset_compact(L, false)>>2); |
| 701 | } |
| 702 | void beqc(Register rs, Register rt, int16_t offset); |
| 703 | void beqc(Register rs, Register rt, Label* L) { |
| 704 | beqc(rs, rt, branch_offset_compact(L, false)>>2); |
| 705 | } |
| 706 | void beqzc(Register rs, int32_t offset); |
| 707 | void beqzc(Register rs, Label* L) { |
| 708 | beqzc(rs, branch_offset21_compact(L, false)>>2); |
| 709 | } |
| 710 | void bnezalc(Register rt, int16_t offset); |
| 711 | void bnezalc(Register rt, Label* L) { |
| 712 | bnezalc(rt, branch_offset_compact(L, false)>>2); |
| 713 | } |
| 714 | void bnec(Register rs, Register rt, int16_t offset); |
| 715 | void bnec(Register rs, Register rt, Label* L) { |
| 716 | bnec(rs, rt, branch_offset_compact(L, false)>>2); |
| 717 | } |
| 718 | void bnezc(Register rt, int32_t offset); |
| 719 | void bnezc(Register rt, Label* L) { |
| 720 | bnezc(rt, branch_offset21_compact(L, false)>>2); |
| 721 | } |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 722 | void bne(Register rs, Register rt, int16_t offset); |
| 723 | void bne(Register rs, Register rt, Label* L) { |
| 724 | bne(rs, rt, branch_offset(L, false)>>2); |
| 725 | } |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 726 | void bovc(Register rs, Register rt, int16_t offset); |
| 727 | void bovc(Register rs, Register rt, Label* L) { |
| 728 | bovc(rs, rt, branch_offset_compact(L, false)>>2); |
| 729 | } |
| 730 | void bnvc(Register rs, Register rt, int16_t offset); |
| 731 | void bnvc(Register rs, Register rt, Label* L) { |
| 732 | bnvc(rs, rt, branch_offset_compact(L, false)>>2); |
| 733 | } |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 734 | |
| 735 | // Never use the int16_t b(l)cond version with a branch offset |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 736 | // instead of using the Label* version. |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 737 | |
Ben Murdoch | 3ef787d | 2012-04-12 10:51:47 +0100 | [diff] [blame] | 738 | // Jump targets must be in the current 256 MB-aligned region. i.e. 28 bits. |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 739 | void j(int32_t target); |
| 740 | void jal(int32_t target); |
| 741 | void jalr(Register rs, Register rd = ra); |
| 742 | void jr(Register target); |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame] | 743 | void j_or_jr(int32_t target, Register rs); |
| 744 | void jal_or_jalr(int32_t target, Register rs); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 745 | |
| 746 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 747 | // -------Data-processing-instructions--------- |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 748 | |
| 749 | // Arithmetic. |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 750 | void addu(Register rd, Register rs, Register rt); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 751 | void subu(Register rd, Register rs, Register rt); |
| 752 | void mult(Register rs, Register rt); |
| 753 | void multu(Register rs, Register rt); |
| 754 | void div(Register rs, Register rt); |
| 755 | void divu(Register rs, Register rt); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 756 | void div(Register rd, Register rs, Register rt); |
| 757 | void divu(Register rd, Register rs, Register rt); |
| 758 | void mod(Register rd, Register rs, Register rt); |
| 759 | void modu(Register rd, Register rs, Register rt); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 760 | void mul(Register rd, Register rs, Register rt); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 761 | void muh(Register rd, Register rs, Register rt); |
| 762 | void mulu(Register rd, Register rs, Register rt); |
| 763 | void muhu(Register rd, Register rs, Register rt); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 764 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 765 | void addiu(Register rd, Register rs, int32_t j); |
| 766 | |
| 767 | // Logical. |
| 768 | void and_(Register rd, Register rs, Register rt); |
| 769 | void or_(Register rd, Register rs, Register rt); |
| 770 | void xor_(Register rd, Register rs, Register rt); |
| 771 | void nor(Register rd, Register rs, Register rt); |
| 772 | |
| 773 | void andi(Register rd, Register rs, int32_t j); |
| 774 | void ori(Register rd, Register rs, int32_t j); |
| 775 | void xori(Register rd, Register rs, int32_t j); |
| 776 | void lui(Register rd, int32_t j); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 777 | void aui(Register rs, Register rt, int32_t j); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 778 | |
| 779 | // Shifts. |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 780 | // Please note: sll(zero_reg, zero_reg, x) instructions are reserved as nop |
| 781 | // and may cause problems in normal code. coming_from_nop makes sure this |
| 782 | // doesn't happen. |
| 783 | void sll(Register rd, Register rt, uint16_t sa, bool coming_from_nop = false); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 784 | void sllv(Register rd, Register rt, Register rs); |
| 785 | void srl(Register rd, Register rt, uint16_t sa); |
| 786 | void srlv(Register rd, Register rt, Register rs); |
| 787 | void sra(Register rt, Register rd, uint16_t sa); |
| 788 | void srav(Register rt, Register rd, Register rs); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 789 | void rotr(Register rd, Register rt, uint16_t sa); |
| 790 | void rotrv(Register rd, Register rt, Register rs); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 791 | |
| 792 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 793 | // ------------Memory-instructions------------- |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 794 | |
| 795 | void lb(Register rd, const MemOperand& rs); |
| 796 | void lbu(Register rd, const MemOperand& rs); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 797 | void lh(Register rd, const MemOperand& rs); |
| 798 | void lhu(Register rd, const MemOperand& rs); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 799 | void lw(Register rd, const MemOperand& rs); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 800 | void lwl(Register rd, const MemOperand& rs); |
| 801 | void lwr(Register rd, const MemOperand& rs); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 802 | void sb(Register rd, const MemOperand& rs); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 803 | void sh(Register rd, const MemOperand& rs); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 804 | void sw(Register rd, const MemOperand& rs); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 805 | void swl(Register rd, const MemOperand& rs); |
| 806 | void swr(Register rd, const MemOperand& rs); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 807 | |
| 808 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 809 | // ----------------Prefetch-------------------- |
| 810 | |
| 811 | void pref(int32_t hint, const MemOperand& rs); |
| 812 | |
| 813 | |
| 814 | // -------------Misc-instructions-------------- |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 815 | |
| 816 | // Break / Trap instructions. |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 817 | void break_(uint32_t code, bool break_as_stop = false); |
| 818 | void stop(const char* msg, uint32_t code = kMaxStopCode); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 819 | void tge(Register rs, Register rt, uint16_t code); |
| 820 | void tgeu(Register rs, Register rt, uint16_t code); |
| 821 | void tlt(Register rs, Register rt, uint16_t code); |
| 822 | void tltu(Register rs, Register rt, uint16_t code); |
| 823 | void teq(Register rs, Register rt, uint16_t code); |
| 824 | void tne(Register rs, Register rt, uint16_t code); |
| 825 | |
| 826 | // Move from HI/LO register. |
| 827 | void mfhi(Register rd); |
| 828 | void mflo(Register rd); |
| 829 | |
| 830 | // Set on less than. |
| 831 | void slt(Register rd, Register rs, Register rt); |
| 832 | void sltu(Register rd, Register rs, Register rt); |
| 833 | void slti(Register rd, Register rs, int32_t j); |
| 834 | void sltiu(Register rd, Register rs, int32_t j); |
| 835 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 836 | // Conditional move. |
| 837 | void movz(Register rd, Register rs, Register rt); |
| 838 | void movn(Register rd, Register rs, Register rt); |
| 839 | void movt(Register rd, Register rs, uint16_t cc = 0); |
| 840 | void movf(Register rd, Register rs, uint16_t cc = 0); |
| 841 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 842 | void sel(SecondaryField fmt, FPURegister fd, FPURegister ft, |
| 843 | FPURegister fs, uint8_t sel); |
| 844 | void seleqz(Register rs, Register rt, Register rd); |
| 845 | void seleqz(SecondaryField fmt, FPURegister fd, FPURegister ft, |
| 846 | FPURegister fs); |
| 847 | void selnez(Register rs, Register rt, Register rd); |
| 848 | void selnez(SecondaryField fmt, FPURegister fd, FPURegister ft, |
| 849 | FPURegister fs); |
| 850 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 851 | // Bit twiddling. |
| 852 | void clz(Register rd, Register rs); |
| 853 | void ins_(Register rt, Register rs, uint16_t pos, uint16_t size); |
| 854 | void ext_(Register rt, Register rs, uint16_t pos, uint16_t size); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 855 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 856 | // --------Coprocessor-instructions---------------- |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 857 | |
| 858 | // Load, store, and move. |
| 859 | void lwc1(FPURegister fd, const MemOperand& src); |
| 860 | void ldc1(FPURegister fd, const MemOperand& src); |
| 861 | |
| 862 | void swc1(FPURegister fs, const MemOperand& dst); |
| 863 | void sdc1(FPURegister fs, const MemOperand& dst); |
| 864 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 865 | void mtc1(Register rt, FPURegister fs); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 866 | void mthc1(Register rt, FPURegister fs); |
| 867 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 868 | void mfc1(Register rt, FPURegister fs); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 869 | void mfhc1(Register rt, FPURegister fs); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 870 | |
| 871 | void ctc1(Register rt, FPUControlRegister fs); |
| 872 | void cfc1(Register rt, FPUControlRegister fs); |
| 873 | |
| 874 | // Arithmetic. |
| 875 | void add_d(FPURegister fd, FPURegister fs, FPURegister ft); |
| 876 | void sub_d(FPURegister fd, FPURegister fs, FPURegister ft); |
| 877 | void mul_d(FPURegister fd, FPURegister fs, FPURegister ft); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 878 | void madd_d(FPURegister fd, FPURegister fr, FPURegister fs, FPURegister ft); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 879 | void div_d(FPURegister fd, FPURegister fs, FPURegister ft); |
| 880 | void abs_d(FPURegister fd, FPURegister fs); |
| 881 | void mov_d(FPURegister fd, FPURegister fs); |
| 882 | void neg_d(FPURegister fd, FPURegister fs); |
| 883 | void sqrt_d(FPURegister fd, FPURegister fs); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 884 | |
| 885 | // Conversion. |
| 886 | void cvt_w_s(FPURegister fd, FPURegister fs); |
| 887 | void cvt_w_d(FPURegister fd, FPURegister fs); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 888 | void trunc_w_s(FPURegister fd, FPURegister fs); |
| 889 | void trunc_w_d(FPURegister fd, FPURegister fs); |
| 890 | void round_w_s(FPURegister fd, FPURegister fs); |
| 891 | void round_w_d(FPURegister fd, FPURegister fs); |
| 892 | void floor_w_s(FPURegister fd, FPURegister fs); |
| 893 | void floor_w_d(FPURegister fd, FPURegister fs); |
| 894 | void ceil_w_s(FPURegister fd, FPURegister fs); |
| 895 | void ceil_w_d(FPURegister fd, FPURegister fs); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 896 | |
| 897 | void cvt_l_s(FPURegister fd, FPURegister fs); |
| 898 | void cvt_l_d(FPURegister fd, FPURegister fs); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 899 | void trunc_l_s(FPURegister fd, FPURegister fs); |
| 900 | void trunc_l_d(FPURegister fd, FPURegister fs); |
| 901 | void round_l_s(FPURegister fd, FPURegister fs); |
| 902 | void round_l_d(FPURegister fd, FPURegister fs); |
| 903 | void floor_l_s(FPURegister fd, FPURegister fs); |
| 904 | void floor_l_d(FPURegister fd, FPURegister fs); |
| 905 | void ceil_l_s(FPURegister fd, FPURegister fs); |
| 906 | void ceil_l_d(FPURegister fd, FPURegister fs); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 907 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 908 | void min(SecondaryField fmt, FPURegister fd, FPURegister ft, FPURegister fs); |
| 909 | void mina(SecondaryField fmt, FPURegister fd, FPURegister ft, FPURegister fs); |
| 910 | void max(SecondaryField fmt, FPURegister fd, FPURegister ft, FPURegister fs); |
| 911 | void maxa(SecondaryField fmt, FPURegister fd, FPURegister ft, FPURegister fs); |
| 912 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 913 | void cvt_s_w(FPURegister fd, FPURegister fs); |
| 914 | void cvt_s_l(FPURegister fd, FPURegister fs); |
| 915 | void cvt_s_d(FPURegister fd, FPURegister fs); |
| 916 | |
| 917 | void cvt_d_w(FPURegister fd, FPURegister fs); |
| 918 | void cvt_d_l(FPURegister fd, FPURegister fs); |
| 919 | void cvt_d_s(FPURegister fd, FPURegister fs); |
| 920 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 921 | // Conditions and branches for MIPSr6. |
| 922 | void cmp(FPUCondition cond, SecondaryField fmt, |
| 923 | FPURegister fd, FPURegister ft, FPURegister fs); |
| 924 | |
| 925 | void bc1eqz(int16_t offset, FPURegister ft); |
| 926 | void bc1eqz(Label* L, FPURegister ft) { |
| 927 | bc1eqz(branch_offset(L, false)>>2, ft); |
| 928 | } |
| 929 | void bc1nez(int16_t offset, FPURegister ft); |
| 930 | void bc1nez(Label* L, FPURegister ft) { |
| 931 | bc1nez(branch_offset(L, false)>>2, ft); |
| 932 | } |
| 933 | |
| 934 | // Conditions and branches for non MIPSr6. |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 935 | void c(FPUCondition cond, SecondaryField fmt, |
| 936 | FPURegister ft, FPURegister fs, uint16_t cc = 0); |
| 937 | |
| 938 | void bc1f(int16_t offset, uint16_t cc = 0); |
| 939 | void bc1f(Label* L, uint16_t cc = 0) { bc1f(branch_offset(L, false)>>2, cc); } |
| 940 | void bc1t(int16_t offset, uint16_t cc = 0); |
| 941 | void bc1t(Label* L, uint16_t cc = 0) { bc1t(branch_offset(L, false)>>2, cc); } |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 942 | void fcmp(FPURegister src1, const double src2, FPUCondition cond); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 943 | |
| 944 | // Check the code size generated from label to here. |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 945 | int SizeOfCodeGeneratedSince(Label* label) { |
| 946 | return pc_offset() - label->pos(); |
| 947 | } |
| 948 | |
| 949 | // Check the number of instructions generated from label to here. |
| 950 | int InstructionsGeneratedSince(Label* label) { |
| 951 | return SizeOfCodeGeneratedSince(label) / kInstrSize; |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 952 | } |
| 953 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 954 | // Class for scoping postponing the trampoline pool generation. |
| 955 | class BlockTrampolinePoolScope { |
| 956 | public: |
| 957 | explicit BlockTrampolinePoolScope(Assembler* assem) : assem_(assem) { |
| 958 | assem_->StartBlockTrampolinePool(); |
| 959 | } |
| 960 | ~BlockTrampolinePoolScope() { |
| 961 | assem_->EndBlockTrampolinePool(); |
| 962 | } |
| 963 | |
| 964 | private: |
| 965 | Assembler* assem_; |
| 966 | |
| 967 | DISALLOW_IMPLICIT_CONSTRUCTORS(BlockTrampolinePoolScope); |
| 968 | }; |
| 969 | |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 970 | // Class for postponing the assembly buffer growth. Typically used for |
| 971 | // sequences of instructions that must be emitted as a unit, before |
| 972 | // buffer growth (and relocation) can occur. |
| 973 | // This blocking scope is not nestable. |
| 974 | class BlockGrowBufferScope { |
| 975 | public: |
| 976 | explicit BlockGrowBufferScope(Assembler* assem) : assem_(assem) { |
| 977 | assem_->StartBlockGrowBuffer(); |
| 978 | } |
| 979 | ~BlockGrowBufferScope() { |
| 980 | assem_->EndBlockGrowBuffer(); |
| 981 | } |
| 982 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 983 | private: |
| 984 | Assembler* assem_; |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 985 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 986 | DISALLOW_IMPLICIT_CONSTRUCTORS(BlockGrowBufferScope); |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 987 | }; |
| 988 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 989 | // Debugging. |
| 990 | |
| 991 | // Mark address of the ExitJSFrame code. |
| 992 | void RecordJSReturn(); |
| 993 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 994 | // Mark address of a debug break slot. |
| 995 | void RecordDebugBreakSlot(); |
| 996 | |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 997 | // Record the AST id of the CallIC being compiled, so that it can be placed |
| 998 | // in the relocation information. |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 999 | void SetRecordedAstId(TypeFeedbackId ast_id) { |
| 1000 | DCHECK(recorded_ast_id_.IsNone()); |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1001 | recorded_ast_id_ = ast_id; |
| 1002 | } |
| 1003 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 1004 | TypeFeedbackId RecordedAstId() { |
| 1005 | DCHECK(!recorded_ast_id_.IsNone()); |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1006 | return recorded_ast_id_; |
| 1007 | } |
| 1008 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 1009 | void ClearRecordedAstId() { recorded_ast_id_ = TypeFeedbackId::None(); } |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 1010 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1011 | // Record a comment relocation entry that can be used by a disassembler. |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1012 | // Use --code-comments to enable. |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1013 | void RecordComment(const char* msg); |
| 1014 | |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1015 | static int RelocateInternalReference(byte* pc, intptr_t pc_delta); |
| 1016 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1017 | // Writes a single byte or word of data in the code stream. Used for |
| 1018 | // inline tables, e.g., jump-tables. |
| 1019 | void db(uint8_t data); |
| 1020 | void dd(uint32_t data); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1021 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 1022 | // Emits the address of the code stub's first instruction. |
| 1023 | void emit_code_stub_address(Code* stub); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1024 | |
| 1025 | PositionsRecorder* positions_recorder() { return &positions_recorder_; } |
| 1026 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1027 | // Postpone the generation of the trampoline pool for the specified number of |
| 1028 | // instructions. |
| 1029 | void BlockTrampolinePoolFor(int instructions); |
| 1030 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1031 | // Check if there is less than kGap bytes available in the buffer. |
| 1032 | // If this is the case, we need to grow the buffer before emitting |
| 1033 | // an instruction or relocation information. |
| 1034 | inline bool overflow() const { return pc_ >= reloc_info_writer.pos() - kGap; } |
| 1035 | |
| 1036 | // Get the number of bytes available in the buffer. |
| 1037 | inline int available_space() const { return reloc_info_writer.pos() - pc_; } |
| 1038 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1039 | // Read/patch instructions. |
| 1040 | static Instr instr_at(byte* pc) { return *reinterpret_cast<Instr*>(pc); } |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1041 | static void instr_at_put(byte* pc, Instr instr) { |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1042 | *reinterpret_cast<Instr*>(pc) = instr; |
| 1043 | } |
| 1044 | Instr instr_at(int pos) { return *reinterpret_cast<Instr*>(buffer_ + pos); } |
| 1045 | void instr_at_put(int pos, Instr instr) { |
| 1046 | *reinterpret_cast<Instr*>(buffer_ + pos) = instr; |
| 1047 | } |
| 1048 | |
| 1049 | // Check if an instruction is a branch of some kind. |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1050 | static bool IsBranch(Instr instr); |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 1051 | static bool IsBeq(Instr instr); |
| 1052 | static bool IsBne(Instr instr); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1053 | |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1054 | static bool IsJump(Instr instr); |
| 1055 | static bool IsJ(Instr instr); |
| 1056 | static bool IsLui(Instr instr); |
| 1057 | static bool IsOri(Instr instr); |
| 1058 | |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame] | 1059 | static bool IsJal(Instr instr); |
| 1060 | static bool IsJr(Instr instr); |
| 1061 | static bool IsJalr(Instr instr); |
| 1062 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1063 | static bool IsNop(Instr instr, unsigned int type); |
| 1064 | static bool IsPop(Instr instr); |
| 1065 | static bool IsPush(Instr instr); |
| 1066 | static bool IsLwRegFpOffset(Instr instr); |
| 1067 | static bool IsSwRegFpOffset(Instr instr); |
| 1068 | static bool IsLwRegFpNegOffset(Instr instr); |
| 1069 | static bool IsSwRegFpNegOffset(Instr instr); |
| 1070 | |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 1071 | static Register GetRtReg(Instr instr); |
| 1072 | static Register GetRsReg(Instr instr); |
| 1073 | static Register GetRdReg(Instr instr); |
| 1074 | |
| 1075 | static uint32_t GetRt(Instr instr); |
| 1076 | static uint32_t GetRtField(Instr instr); |
| 1077 | static uint32_t GetRs(Instr instr); |
| 1078 | static uint32_t GetRsField(Instr instr); |
| 1079 | static uint32_t GetRd(Instr instr); |
| 1080 | static uint32_t GetRdField(Instr instr); |
| 1081 | static uint32_t GetSa(Instr instr); |
| 1082 | static uint32_t GetSaField(Instr instr); |
| 1083 | static uint32_t GetOpcodeField(Instr instr); |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1084 | static uint32_t GetFunction(Instr instr); |
| 1085 | static uint32_t GetFunctionField(Instr instr); |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 1086 | static uint32_t GetImmediate16(Instr instr); |
| 1087 | static uint32_t GetLabelConst(Instr instr); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1088 | |
| 1089 | static int32_t GetBranchOffset(Instr instr); |
| 1090 | static bool IsLw(Instr instr); |
| 1091 | static int16_t GetLwOffset(Instr instr); |
| 1092 | static Instr SetLwOffset(Instr instr, int16_t offset); |
| 1093 | |
| 1094 | static bool IsSw(Instr instr); |
| 1095 | static Instr SetSwOffset(Instr instr, int16_t offset); |
| 1096 | static bool IsAddImmediate(Instr instr); |
| 1097 | static Instr SetAddImmediateOffset(Instr instr, int16_t offset); |
| 1098 | |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 1099 | static bool IsAndImmediate(Instr instr); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 1100 | static bool IsEmittedConstant(Instr instr); |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 1101 | |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1102 | void CheckTrampolinePool(); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1103 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 1104 | // Allocate a constant pool of the correct size for the generated code. |
| 1105 | Handle<ConstantPoolArray> NewConstantPool(Isolate* isolate); |
| 1106 | |
| 1107 | // Generate the constant pool for the generated code. |
| 1108 | void PopulateConstantPool(ConstantPoolArray* constant_pool); |
| 1109 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1110 | protected: |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 1111 | // Relocation for a type-recording IC has the AST id added to it. This |
| 1112 | // member variable is a way to pass the information from the call site to |
| 1113 | // the relocation info. |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 1114 | TypeFeedbackId recorded_ast_id_; |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1115 | |
| 1116 | int32_t buffer_space() const { return reloc_info_writer.pos() - pc_; } |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1117 | |
| 1118 | // Decode branch instruction at pos and return branch target pos. |
| 1119 | int target_at(int32_t pos); |
| 1120 | |
| 1121 | // Patch branch instruction at pos to branch to given branch target pos. |
| 1122 | void target_at_put(int32_t pos, int32_t target_pos); |
| 1123 | |
| 1124 | // Say if we need to relocate with this mode. |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1125 | bool MustUseReg(RelocInfo::Mode rmode); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1126 | |
| 1127 | // Record reloc info for current pc_. |
| 1128 | void RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data = 0); |
| 1129 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1130 | // Block the emission of the trampoline pool before pc_offset. |
| 1131 | void BlockTrampolinePoolBefore(int pc_offset) { |
| 1132 | if (no_trampoline_pool_before_ < pc_offset) |
| 1133 | no_trampoline_pool_before_ = pc_offset; |
| 1134 | } |
| 1135 | |
| 1136 | void StartBlockTrampolinePool() { |
| 1137 | trampoline_pool_blocked_nesting_++; |
| 1138 | } |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1139 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1140 | void EndBlockTrampolinePool() { |
| 1141 | trampoline_pool_blocked_nesting_--; |
| 1142 | } |
| 1143 | |
| 1144 | bool is_trampoline_pool_blocked() const { |
| 1145 | return trampoline_pool_blocked_nesting_ > 0; |
| 1146 | } |
| 1147 | |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 1148 | bool has_exception() const { |
| 1149 | return internal_trampoline_exception_; |
| 1150 | } |
| 1151 | |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame] | 1152 | void DoubleAsTwoUInt32(double d, uint32_t* lo, uint32_t* hi); |
| 1153 | |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1154 | bool is_trampoline_emitted() const { |
| 1155 | return trampoline_emitted_; |
| 1156 | } |
| 1157 | |
| 1158 | // Temporarily block automatic assembly buffer growth. |
| 1159 | void StartBlockGrowBuffer() { |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 1160 | DCHECK(!block_buffer_growth_); |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1161 | block_buffer_growth_ = true; |
| 1162 | } |
| 1163 | |
| 1164 | void EndBlockGrowBuffer() { |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 1165 | DCHECK(block_buffer_growth_); |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1166 | block_buffer_growth_ = false; |
| 1167 | } |
| 1168 | |
| 1169 | bool is_buffer_growth_blocked() const { |
| 1170 | return block_buffer_growth_; |
| 1171 | } |
| 1172 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1173 | private: |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1174 | // Buffer size and constant pool distance are checked together at regular |
| 1175 | // intervals of kBufferCheckInterval emitted bytes. |
| 1176 | static const int kBufferCheckInterval = 1*KB/2; |
| 1177 | |
| 1178 | // Code generation. |
| 1179 | // The relocation writer's position is at least kGap bytes below the end of |
| 1180 | // the generated instructions. This is so that multi-instruction sequences do |
| 1181 | // not have to check for overflow. The same is true for writes of large |
| 1182 | // relocation info entries. |
| 1183 | static const int kGap = 32; |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1184 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1185 | |
| 1186 | // Repeated checking whether the trampoline pool should be emitted is rather |
| 1187 | // expensive. By default we only check again once a number of instructions |
| 1188 | // has been generated. |
| 1189 | static const int kCheckConstIntervalInst = 32; |
| 1190 | static const int kCheckConstInterval = kCheckConstIntervalInst * kInstrSize; |
| 1191 | |
| 1192 | int next_buffer_check_; // pc offset of next buffer check. |
| 1193 | |
| 1194 | // Emission of the trampoline pool may be blocked in some code sequences. |
| 1195 | int trampoline_pool_blocked_nesting_; // Block emission if this is not zero. |
| 1196 | int no_trampoline_pool_before_; // Block emission before this pc offset. |
| 1197 | |
| 1198 | // Keep track of the last emitted pool to guarantee a maximal distance. |
| 1199 | int last_trampoline_pool_end_; // pc offset of the end of the last pool. |
| 1200 | |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1201 | // Automatic growth of the assembly buffer may be blocked for some sequences. |
| 1202 | bool block_buffer_growth_; // Block growth when true. |
| 1203 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1204 | // Relocation information generation. |
| 1205 | // Each relocation is encoded as a variable size value. |
| 1206 | static const int kMaxRelocSize = RelocInfoWriter::kMaxSize; |
| 1207 | RelocInfoWriter reloc_info_writer; |
| 1208 | |
| 1209 | // The bound position, before this we cannot do instruction elimination. |
| 1210 | int last_bound_pos_; |
| 1211 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1212 | // Code emission. |
| 1213 | inline void CheckBuffer(); |
| 1214 | void GrowBuffer(); |
| 1215 | inline void emit(Instr x); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1216 | inline void CheckTrampolinePoolQuick(); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1217 | |
| 1218 | // Instruction generation. |
| 1219 | // We have 3 different kind of encoding layout on MIPS. |
| 1220 | // However due to many different types of objects encoded in the same fields |
| 1221 | // we have quite a few aliases for each mode. |
| 1222 | // Using the same structure to refer to Register and FPURegister would spare a |
| 1223 | // few aliases, but mixing both does not look clean to me. |
| 1224 | // Anyway we could surely implement this differently. |
| 1225 | |
| 1226 | void GenInstrRegister(Opcode opcode, |
| 1227 | Register rs, |
| 1228 | Register rt, |
| 1229 | Register rd, |
| 1230 | uint16_t sa = 0, |
| 1231 | SecondaryField func = NULLSF); |
| 1232 | |
| 1233 | void GenInstrRegister(Opcode opcode, |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1234 | Register rs, |
| 1235 | Register rt, |
| 1236 | uint16_t msb, |
| 1237 | uint16_t lsb, |
| 1238 | SecondaryField func); |
| 1239 | |
| 1240 | void GenInstrRegister(Opcode opcode, |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1241 | SecondaryField fmt, |
| 1242 | FPURegister ft, |
| 1243 | FPURegister fs, |
| 1244 | FPURegister fd, |
| 1245 | SecondaryField func = NULLSF); |
| 1246 | |
| 1247 | void GenInstrRegister(Opcode opcode, |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 1248 | FPURegister fr, |
| 1249 | FPURegister ft, |
| 1250 | FPURegister fs, |
| 1251 | FPURegister fd, |
| 1252 | SecondaryField func = NULLSF); |
| 1253 | |
| 1254 | void GenInstrRegister(Opcode opcode, |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1255 | SecondaryField fmt, |
| 1256 | Register rt, |
| 1257 | FPURegister fs, |
| 1258 | FPURegister fd, |
| 1259 | SecondaryField func = NULLSF); |
| 1260 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1261 | void GenInstrRegister(Opcode opcode, |
| 1262 | SecondaryField fmt, |
| 1263 | Register rt, |
| 1264 | FPUControlRegister fs, |
| 1265 | SecondaryField func = NULLSF); |
| 1266 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1267 | |
| 1268 | void GenInstrImmediate(Opcode opcode, |
| 1269 | Register rs, |
| 1270 | Register rt, |
| 1271 | int32_t j); |
| 1272 | void GenInstrImmediate(Opcode opcode, |
| 1273 | Register rs, |
| 1274 | SecondaryField SF, |
| 1275 | int32_t j); |
| 1276 | void GenInstrImmediate(Opcode opcode, |
| 1277 | Register r1, |
| 1278 | FPURegister r2, |
| 1279 | int32_t j); |
| 1280 | |
| 1281 | |
| 1282 | void GenInstrJump(Opcode opcode, |
| 1283 | uint32_t address); |
| 1284 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1285 | // Helpers. |
| 1286 | void LoadRegPlusOffsetToAt(const MemOperand& src); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1287 | |
| 1288 | // Labels. |
| 1289 | void print(Label* L); |
| 1290 | void bind_to(Label* L, int pos); |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1291 | void next(Label* L); |
| 1292 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1293 | // One trampoline consists of: |
| 1294 | // - space for trampoline slots, |
| 1295 | // - space for labels. |
| 1296 | // |
| 1297 | // Space for trampoline slots is equal to slot_count * 2 * kInstrSize. |
| 1298 | // Space for trampoline slots preceeds space for labels. Each label is of one |
| 1299 | // instruction size, so total amount for labels is equal to |
| 1300 | // label_count * kInstrSize. |
| 1301 | class Trampoline { |
| 1302 | public: |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1303 | Trampoline() { |
| 1304 | start_ = 0; |
| 1305 | next_slot_ = 0; |
| 1306 | free_slot_count_ = 0; |
| 1307 | end_ = 0; |
| 1308 | } |
| 1309 | Trampoline(int start, int slot_count) { |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1310 | start_ = start; |
| 1311 | next_slot_ = start; |
| 1312 | free_slot_count_ = slot_count; |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1313 | end_ = start + slot_count * kTrampolineSlotsSize; |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1314 | } |
| 1315 | int start() { |
| 1316 | return start_; |
| 1317 | } |
| 1318 | int end() { |
| 1319 | return end_; |
| 1320 | } |
| 1321 | int take_slot() { |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 1322 | int trampoline_slot = kInvalidSlotPos; |
| 1323 | if (free_slot_count_ <= 0) { |
| 1324 | // We have run out of space on trampolines. |
| 1325 | // Make sure we fail in debug mode, so we become aware of each case |
| 1326 | // when this happens. |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame^] | 1327 | DCHECK(0); |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 1328 | // Internal exception will be caught. |
| 1329 | } else { |
| 1330 | trampoline_slot = next_slot_; |
| 1331 | free_slot_count_--; |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1332 | next_slot_ += kTrampolineSlotsSize; |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 1333 | } |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1334 | return trampoline_slot; |
| 1335 | } |
Ben Murdoch | 589d697 | 2011-11-30 16:04:58 +0000 | [diff] [blame] | 1336 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1337 | private: |
| 1338 | int start_; |
| 1339 | int end_; |
| 1340 | int next_slot_; |
| 1341 | int free_slot_count_; |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1342 | }; |
| 1343 | |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1344 | int32_t get_trampoline_entry(int32_t pos); |
| 1345 | int unbound_labels_count_; |
| 1346 | // If trampoline is emitted, generated code is becoming large. As this is |
| 1347 | // already a slow case which can possibly break our code generation for the |
| 1348 | // extreme case, we use this information to trigger different mode of |
| 1349 | // branch instruction generation, where we use jump instructions rather |
| 1350 | // than regular branch instructions. |
| 1351 | bool trampoline_emitted_; |
| 1352 | static const int kTrampolineSlotsSize = 4 * kInstrSize; |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1353 | static const int kMaxBranchOffset = (1 << (18 - 1)) - 1; |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 1354 | static const int kInvalidSlotPos = -1; |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1355 | |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1356 | Trampoline trampoline_; |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 1357 | bool internal_trampoline_exception_; |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1358 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1359 | friend class RegExpMacroAssemblerMIPS; |
| 1360 | friend class RelocInfo; |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1361 | friend class CodePatcher; |
| 1362 | friend class BlockTrampolinePoolScope; |
| 1363 | |
| 1364 | PositionsRecorder positions_recorder_; |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1365 | friend class PositionsRecorder; |
| 1366 | friend class EnsureSpace; |
| 1367 | }; |
| 1368 | |
| 1369 | |
| 1370 | class EnsureSpace BASE_EMBEDDED { |
| 1371 | public: |
| 1372 | explicit EnsureSpace(Assembler* assembler) { |
| 1373 | assembler->CheckBuffer(); |
| 1374 | } |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 1375 | }; |
| 1376 | |
| 1377 | } } // namespace v8::internal |
| 1378 | |
| 1379 | #endif // V8_ARM_ASSEMBLER_MIPS_H_ |