commit 3a3f57f1ef05dc31db06fa1148a84cf48bd4636a
author mjw <mjw@a5019735-40e9-0310-863c-91ae7b9d1cf9> Thu Aug 21 14:44:48 2014 +0000
committer mjw <mjw@a5019735-40e9-0310-863c-91ae7b9d1cf9> Thu Aug 21 14:44:48 2014 +0000
tree 2397b835c03c3c019955be7183d757dff8606751
parent e25d54b2a995a492c3014bc12cb491ddc7503ef3

Bug 338445 amd64 vbit-test fails with unknown opcodes used by arm64 VEX.

git-svn-id: svn://svn.valgrind.org/valgrind/trunk@14327 a5019735-40e9-0310-863c-91ae7b9d1cf9

NEWS

diff --git a/NEWS b/NEWS
index 2c1ae5a..465ab22 100644
--- a/NEWS
+++ b/NEWS
@@ -211,6 +211,7 @@
 338115  DRD: computed conflict set differs from actual after fork
 338160  implement display of thread local storage in gdbsrv
 338205  configure.ac and check for -Wno-tautological-compare
+338445  amd64 vbit-test fails with unknown opcodes used by arm64 VEX
 n-i-bz  Fix KVM_CREATE_IRQCHIP ioctl handling
 n-i-bz  s390x: Fix memory corruption for multithreaded applications
 n-i-bz  vex arm->IR: allow PC as basereg in some LDRD cases

memcheck/tests/vbit-test/irops.c

diff --git a/memcheck/tests/vbit-test/irops.c b/memcheck/tests/vbit-test/irops.c
index 985d36b..8a26869 100644
--- a/memcheck/tests/vbit-test/irops.c
+++ b/memcheck/tests/vbit-test/irops.c
@@ -667,6 +667,16 @@
   { DEFOP(Iop_QAdd16Sx8, UNDEF_UNKNOWN), },
   { DEFOP(Iop_QAdd32Sx4, UNDEF_UNKNOWN), },
   { DEFOP(Iop_QAdd64Sx2, UNDEF_UNKNOWN), },
+
+  { DEFOP(Iop_QAddExtUSsatSS8x16, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QAddExtUSsatSS16x8, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QAddExtUSsatSS32x4, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QAddExtUSsatSS64x2, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QAddExtSUsatUU8x16, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QAddExtSUsatUU16x8, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QAddExtSUsatUU32x4, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QAddExtSUsatUU64x2, UNDEF_UNKNOWN), },
+
   { DEFOP(Iop_Sub8x16, UNDEF_UNKNOWN), },
   { DEFOP(Iop_Sub16x8, UNDEF_UNKNOWN), },
   { DEFOP(Iop_Sub32x4, UNDEF_UNKNOWN), },
@@ -814,6 +824,58 @@
   { DEFOP(Iop_QShlNsatSS16x8, UNDEF_UNKNOWN), },
   { DEFOP(Iop_QShlNsatSS32x4, UNDEF_UNKNOWN), },
   { DEFOP(Iop_QShlNsatSS64x2, UNDEF_UNKNOWN), },
+
+  { DEFOP(Iop_QandUQsh8x16, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandUQsh16x8, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandUQsh32x4, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandUQsh64x2, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandSQsh8x16, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandSQsh16x8, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandSQsh32x4, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandSQsh64x2, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandUQRsh8x16, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandUQRsh16x8, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandUQRsh32x4, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandUQRsh64x2, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandSQRsh8x16, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandSQRsh16x8, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandSQRsh32x4, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandSQRsh64x2, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_Sh8Sx16, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_Sh16Sx8, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_Sh32Sx4, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_Sh64Sx2, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_Sh8Ux16, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_Sh16Ux8, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_Sh32Ux4, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_Sh64Ux2, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_Rsh8Sx16, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_Rsh16Sx8, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_Rsh32Sx4, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_Rsh64Sx2, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_Rsh8Ux16, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_Rsh16Ux8, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_Rsh32Ux4, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_Rsh64Ux2, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandQShrNnarrow16Uto8Ux8, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandQShrNnarrow32Uto16Ux4, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandQShrNnarrow64Uto32Ux2, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandQSarNnarrow16Sto8Sx8, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandQSarNnarrow32Sto16Sx4, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandQSarNnarrow64Sto32Sx2, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandQSarNnarrow16Sto8Ux8, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandQSarNnarrow32Sto16Ux4, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandQSarNnarrow64Sto32Ux2, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandQRShrNnarrow16Uto8Ux8, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandQRShrNnarrow32Uto16Ux4, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandQRShrNnarrow64Uto32Ux2, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandQRSarNnarrow16Sto8Sx8, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandQRSarNnarrow32Sto16Sx4, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandQRSarNnarrow64Sto32Sx2, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandQRSarNnarrow16Sto8Ux8, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandQRSarNnarrow32Sto16Ux4, UNDEF_UNKNOWN), },
+  { DEFOP(Iop_QandQRSarNnarrow64Sto32Ux2, UNDEF_UNKNOWN), },
+
   { DEFOP(Iop_QNarrowBin16Sto8Ux16, UNDEF_UNKNOWN), },
   { DEFOP(Iop_QNarrowBin32Sto16Ux8, UNDEF_UNKNOWN), },
   { DEFOP(Iop_QNarrowBin16Sto8Sx16, UNDEF_UNKNOWN), },