Removed all uses of register numbers (eg. arch-specific ones like R_EAX, and
arch-neutral ones like R_STACK_PTR). Where they were used, we now always talk
about an offset into the Vex guest state, and an offset. As a result,
the shadow register get/set functions had to change. They now also use
an offset and size, and in an arch-neutral way.
Also, I combined the five the post_reg_write* functions into a single one that
takes a 'CorePart' parameter (plus also a ThreadId). Also, I added more
arguments (the CorePart, and the ThreadId) to the post_mem_write event, for
consistency with the pre_mem_* events.
Also, I reduced the number of register names that must be specified by each
arch, by factoring out duplication; and shortened their names for the core (eg.
ARCH_STACK_PTR is now STACK_PTR).
Plus some related minor cleanups in syscall wrappers.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@3094 a5019735-40e9-0310-863c-91ae7b9d1cf9
diff --git a/coregrind/vg_main.c b/coregrind/vg_main.c
index 091391b..114ad1e 100644
--- a/coregrind/vg_main.c
+++ b/coregrind/vg_main.c
@@ -326,7 +326,7 @@
/* Get the simulated stack pointer */
Addr VG_(get_stack_pointer) ( ThreadId tid )
{
- return ARCH_STACK_PTR( VG_(threads)[tid].arch );
+ return STACK_PTR( VG_(threads)[tid].arch );
}
/* Initialize the PID and PGRP of scheduler LWP; this is also called